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公开(公告)号:US10234504B1
公开(公告)日:2019-03-19
申请号:US15452526
申请日:2017-03-07
Applicant: Cadence Design Systems, Inc.
Inventor: Subhasish Mukherjee , Jagjot Kaur , Vivek Chickermane , Susan Marie Genova
IPC: G01R31/28 , G01R31/317 , G01R31/3177
Abstract: According to certain aspects, the present embodiments relate to optimizing core wrappers in an integrated circuit to facilitate core-based testing of the integrated circuit. In some embodiments, an integrated circuit design flow is adjusted so as to increase the use of shared wrapper cells in inserted core wrappers, and to reduce the use of dedicated wrapper cells in such core wrappers, thereby improving timing and other integrated circuit design features. In these and other embodiments, the increased use of shared wrapper cells is performed even in the presence of shift registers in the integrated circuit design.
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公开(公告)号:US12007440B1
公开(公告)日:2024-06-11
申请号:US17847421
申请日:2022-06-23
Applicant: Cadence Design Systems, Inc.
Inventor: Puneet Arora , Subhasish Mukherjee , Sarthak Singhal , Christos Papameletis , Brian Foutz , Krishna V Chakravadhanula , Ankit Bandejia , Norman Card
IPC: G01R31/3185 , G01R31/317 , G06F11/267 , G06F30/333 , G11C29/32
CPC classification number: G01R31/318536 , G01R31/318547 , G01R31/31704 , G01R31/3185 , G01R31/318558 , G01R31/318563 , G01R31/318583 , G06F11/267 , G06F30/333 , G11C29/32 , G11C2029/3202
Abstract: This disclosure relates scan chain stitching. In one example, scan chain elements from a scan chain element space can be received for a scan chain partition. The scan chain elements can be grouped based on scan chain element grouping criteria to form scan chain groups. Scan chain data identifying a number of scan chains for the scan chain partition can be received. The scan chains can be scan chain balanced across the scan chain groups to assign each scan chain to one of the scan chain groups. The scan chain elements associated with each scan chain of the scan chains can be scan chain element balanced. Scan chain elements for each associated scan chain can be connected to form a scan chain data test path during a generation of scan chain circuitry in response to the scan chain element balancing.
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公开(公告)号:US11256839B1
公开(公告)日:2022-02-22
申请号:US17228282
申请日:2021-04-12
Applicant: Cadence Design Systems, Inc.
Inventor: Vivek Chickermane , Subhasish Mukherjee
IPC: G06F30/333 , G06F30/347 , G06F30/343
Abstract: A scan chain engine can determine a set number of EXTEST scan chains for the IP block and based on a predetermined maximum number of EXTEST wrapper cells per EXTEST scan chain. The scan chain engine iteratively executes partitioning on the IP block to generate a set of partitions. Each partition in the set of partitions has a number of EXTEST wrapper cells that does not exceed the maximum number of EXTEST wrapper cells per EXTEST scan chain. The scan chain engine selectively merges partitions of the set of partitions to form a set of populated partitions that each include an EXTEST wrapper cell. The number of partitions is equal to the set number of EXTEST scan chains for the IP block. The scan chain engine generates wire paths connecting EXTEST wrapper cells of each populated partition to construct the set number of EXTEST scan chains for the IP block.
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