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    MOS transistors having inverted T-shaped gate electrodes
    2.
    发明授权
    MOS transistors having inverted T-shaped gate electrodes 失效
    MOS晶体管具有倒置的T形栅电极

    公开(公告)号：US07154154B2

    公开(公告)日：2006-12-26

    申请号：US10683782

    申请日：2003-10-10

    申请人： Shin-Ae Lee ,  Dong-gun Park ,  Chang-sub Lee ,  Jeong-dong Choe ,  Sung-min Kim ,  Seong-ho Kim

    发明人： Shin-Ae Lee ,  Dong-gun Park ,  Chang-sub Lee ,  Jeong-dong Choe ,  Sung-min Kim ,  Seong-ho Kim

    IPC分类号： H01L29/76

    CPC分类号： H01L29/66583 ,  H01L21/28114 ,  H01L21/823842 ,  H01L21/82385 ,  H01L21/823864 ,  H01L29/42376 ,  H01L29/665 ,  H01L29/66537 ,  H01L29/66553

    摘要： MOS transistors have an active region defined in a portion of a semiconductor substrate, a gate electrode on the active region, and drain and source regions in the substrate. First and second lateral protrusions extend from the lower portions of respective sidewalls of the gate electrode. The drain region has a first lightly-doped drain region under the first lateral protrusion, a second lightly-doped drain region adjacent the first lightly-doped drain region, and a heavily-doped drain region adjacent to the second lightly-doped drain region. The source region similarly has a first lightly-doped source region under the second lateral protrusion, a second lightly-doped source region adjacent the first lightly-doped source region, and a heavily-doped source region adjacent to the second lightly-doped source region. The second lightly-doped regions are deeper than the first lightly-doped regions, and the gate electrode may have an inverted T-shape.

    摘要翻译： MOS晶体管具有限定在半导体衬底的一部分中的有源区，有源区上的栅电极和衬底中的漏极和源极区。 第一和第二横向突起从栅电极的相应侧壁的下部延伸。 漏极区域在第一横向突起下方具有第一轻掺杂漏极区域，与第一轻掺杂漏极区域相邻的第二轻掺杂漏极区域和与第二轻掺杂漏极区域相邻的重掺杂漏极区域。 源极区域类似地在第二横向突起下方具有第一轻掺杂源极区域，与第一轻掺杂源极区域相邻的第二轻掺杂源极区域和与第二轻掺杂源极区域相邻的重掺杂源极区域 。 第二轻掺杂区域比第一轻掺杂区域深，并且栅电极可以具有倒置T形。

    Double gate MOS transistors
    3.
    发明授权
    Double gate MOS transistors 失效
    双栅MOS晶体管

    公开(公告)号：US06940129B2

    公开(公告)日：2005-09-06

    申请号：US10715664

    申请日：2003-11-18

    申请人： Sung-Min Kim ,  Dong-Gun Park ,  Chang-Sub Lee ,  Jeong-Dong Choe ,  Shin-Ae Lee ,  Seong-Ho Kim

    发明人： Sung-Min Kim ,  Dong-Gun Park ,  Chang-Sub Lee ,  Jeong-Dong Choe ,  Shin-Ae Lee ,  Seong-Ho Kim

    IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786

    CPC分类号： H01L29/66772 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/78621 ,  H01L29/78645 ,  H01L29/78648 ,  H01L29/78654

    摘要： A double gate MOS transistor includes a substrate active region defined in a semiconductor substrate and a transistor active region located over the substrate active region and overlapped with the substrate active region. At least one semiconductor pillar penetrates the transistor active region and is in contact with the substrate active region. The semiconductor pillar supports the transistor active region so that the transistor active region is spaced apart from the substrate active region. At least one bottom gate electrode fills a space between the transistor active region and the substrate active region. The bottom gate electrode is insulated from the substrate active region, the transistor active region and the semiconductor pillar. At least one top gate electrode crosses over the transistor active region and has at least one end that is in contact with a sidewall of the bottom gate electrode. The top gate electrode overlaps with the bottom gate electrode and is insulated from the transistor active region. Methods of fabricating such transistors are also provided.

    摘要翻译： 双栅MOS晶体管包括限定在半导体衬底中的衬底有源区和位于衬底有源区上方并与衬底有源区重叠的晶体管有源区。 至少一个半导体柱穿透晶体管有源区并与衬底有源区接触。 半导体柱支撑晶体管有源区，使得晶体管有源区与衬底有源区间隔开。 至少一个底栅电极填充晶体管有源区和衬底有源区之间的空间。 底栅电极与衬底有源区，晶体管有源区和半导体柱绝缘。 至少一个顶栅电极跨越晶体管有源区，并且具有与底栅电极的侧壁接触的至少一个端。 顶栅电极与底栅电极重叠并与晶体管有源区绝缘。 还提供制造这种晶体管的方法。

    Methods of fabricating field effect transistors having multiple stacked channels
    5.
    发明授权
    Methods of fabricating field effect transistors having multiple stacked channels 有权
    制造具有多个堆叠通道的场效应晶体管的方法

    公开(公告)号：US07381601B2

    公开(公告)日：2008-06-03

    申请号：US10841870

    申请日：2004-05-07

    申请人： Sung-Min Kim ,  Dong-Gun Park ,  Chang-Sub Lee ,  Jeong-Dong Choe ,  Shin-Ae Lee ,  Seong-Ho Kim

    发明人： Sung-Min Kim ,  Dong-Gun Park ,  Chang-Sub Lee ,  Jeong-Dong Choe ,  Shin-Ae Lee ,  Seong-Ho Kim

    IPC分类号： H01L21/8234 ,  H01L21/336

    CPC分类号： H01L29/785 ,  H01L21/823412 ,  H01L29/42356 ,  H01L29/42384 ,  H01L29/42392 ,  H01L29/66477 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/66772 ,  H01L29/66787 ,  H01L29/78 ,  H01L29/78642 ,  H01L29/78654 ,  H01L29/78696

    摘要： Integrated circuit field effect transistor devices include a substrate having a surface and an active channel pattern on the surface. The active channel pattern includes channels that are stacked upon one another and are spaced apart from one another to define at least one tunnel between adjacent channels. A gate electrode surrounds the channels and extends through the at least one tunnel. A pair of source/drain regions also is provided. Integrated circuit field effect transistors are manufactured, by forming a pre-active pattern on a surface of a substrate. The pre-active pattern includes a series of interchannel layers and channel layers stacked alternately upon each other. Source/drain regions are formed on the substrate at opposite ends of the pre-active pattern. The interchannel layers are selectively removed to form tunnels. A gate electrode is formed in the tunnels and surrounding the channels.

    摘要翻译： 集成电路场效应晶体管器件包括在表面上具有表面和有源沟道图案的衬底。 活动通道图案包括彼此堆叠并且彼此间隔开以限定相邻通道之间的至少一个通道的通道。 栅电极围绕通道并延伸穿过至少一个通道。 还提供了一对源极/漏极区域。 通过在衬底的表面上形成预活性图案来制造集成电路场效应晶体管。 预激活图案包括彼此交替堆叠的一系列通道间层和沟道层。 源极/漏极区域在预活化图案的相对端处在衬底上形成。 选择性地去除通道间层以形成隧道。 在隧道中形成栅电极并围绕通道。

    Methods of fabricating field effect transistors having multiple stacked channels
    7.
    发明授权
    Methods of fabricating field effect transistors having multiple stacked channels 有权
    制造具有多个堆叠通道的场效应晶体管的方法

    公开(公告)号：US07615429B2

    公开(公告)日：2009-11-10

    申请号：US11948175

    申请日：2007-11-30

    申请人： Sung-Min Kim ,  Dong-Gun Park ,  Chang-Sub Lee ,  Jeong-Dong Choe ,  Shin-Ae Lee ,  Seong-Ho Kim

    发明人： Sung-Min Kim ,  Dong-Gun Park ,  Chang-Sub Lee ,  Jeong-Dong Choe ,  Shin-Ae Lee ,  Seong-Ho Kim

    IPC分类号： H01L21/336

    CPC分类号： H01L29/785 ,  H01L21/823412 ,  H01L29/42356 ,  H01L29/42384 ,  H01L29/42392 ,  H01L29/66477 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/66772 ,  H01L29/66787 ,  H01L29/78 ,  H01L29/78642 ,  H01L29/78654 ,  H01L29/78696

    摘要： Integrated circuit field effect transistor devices include a substrate having a surface and an active channel pattern on the surface. The active channel pattern includes channels that are stacked upon one another and are spaced apart from one another to define at least one tunnel between adjacent channels. A gate electrode surrounds the channels and extends through the at least one tunnel. A pair of source/drain regions also is provided. Integrated circuit field effect transistors are manufactured, by forming a pre-active pattern on a surface of a substrate. The pre-active pattern includes a series of interchannel layers and channel layers stacked alternately upon each other. Source/drain regions are formed on the substrate at opposite ends of the pre-active pattern. The interchannel layers are selectively removed to form tunnels. A gate electrode is formed in the tunnels and surrounding the channels.

    摘要翻译： 集成电路场效应晶体管器件包括在表面上具有表面和有源沟道图案的衬底。 活动通道图案包括彼此堆叠并且彼此间隔开以限定相邻通道之间的至少一个通道的通道。 栅电极围绕通道并延伸穿过至少一个通道。 还提供了一对源极/漏极区域。 通过在衬底的表面上形成预活性图案来制造集成电路场效应晶体管。 预激活图案包括彼此交替堆叠的一系列通道间层和沟道层。 在预活化图案的相对端处，在衬底上形成源极/漏极区域。 选择性地去除通道间层以形成隧道。 在隧道中形成栅电极并围绕通道。

    MOS Transistors having inverted T-shaped gate electrodes and fabrication methods thereof
    8.
    发明授权
    MOS Transistors having inverted T-shaped gate electrodes and fabrication methods thereof 失效
    具有反相T形栅电极的MOS晶体管及其制造方法

    公开(公告)号：US07534707B2

    公开(公告)日：2009-05-19

    申请号：US11560556

    申请日：2006-11-16

    申请人： Shin-Ae Lee ,  Dong-gun Park ,  Chang-sub Lee ,  Jeong-dong Choe ,  Sung-min Kim ,  Seong-ho Kim

    发明人： Shin-Ae Lee ,  Dong-gun Park ,  Chang-sub Lee ,  Jeong-dong Choe ,  Sung-min Kim ,  Seong-ho Kim

    IPC分类号： H01L21/3205

    CPC分类号： H01L29/66583 ,  H01L21/28114 ,  H01L21/823842 ,  H01L21/82385 ,  H01L21/823864 ,  H01L29/42376 ,  H01L29/665 ,  H01L29/66537 ,  H01L29/66553

    摘要： MOS transistors have an active region defined in a portion of a semiconductor substrate, a gate electrode on the active region, and drain and source regions in the substrate. First and second lateral protrusions extend from the lower portions of respective sidewalls of the gate electrode. The drain region has a first lightly-doped drain region under the first lateral protrusion, a second lightly-doped drain region adjacent the first lightly-doped drain region, and a heavily-doped drain region adjacent to the second lightly-doped drain region. The source region similarly has a first lightly-doped source region under the second lateral protrusion, a second lightly-doped source region adjacent the first lightly-doped source region, and a heavily-doped source region adjacent to the second lightly-doped source region. The second lightly-doped regions are deeper than the first lightly-doped regions, and the gate electrode may have an inverted T-shape.

    摘要翻译： MOS晶体管具有限定在半导体衬底的一部分中的有源区，有源区上的栅电极和衬底中的漏极和源极区。 第一和第二横向突起从栅电极的相应侧壁的下部延伸。 漏极区域在第一横向突起下方具有第一轻掺杂漏极区域，与第一轻掺杂漏极区域相邻的第二轻掺杂漏极区域和与第二轻掺杂漏极区域相邻的重掺杂漏极区域。 源极区域类似地在第二横向突起下方具有第一轻掺杂源极区域，与第一轻掺杂源极区域相邻的第二轻掺杂源极区域和与第二轻掺杂源极区域相邻的重掺杂源极区域 。 第二轻掺杂区域比第一轻掺杂区域深，并且栅电极可以具有倒置T形。

    METHODS OF FABRICATING FIELD EFFECT TRANSISTORS HAVING MULTIPLE STACKED CHANNELS
    10.
    发明申请
    METHODS OF FABRICATING FIELD EFFECT TRANSISTORS HAVING MULTIPLE STACKED CHANNELS 有权
    制作具有多个堆叠通道的场效应晶体管的方法

    公开(公告)号：US20080090362A1

    公开(公告)日：2008-04-17

    申请号：US11948175

    申请日：2007-11-30

    申请人： Sung-Min Kim ,  Dong-Gun Park ,  Chang-Sub Lee ,  Jeong-Dong Choe ,  Shin-Ae Lee ,  Seong-Ho Kim

    发明人： Sung-Min Kim ,  Dong-Gun Park ,  Chang-Sub Lee ,  Jeong-Dong Choe ,  Shin-Ae Lee ,  Seong-Ho Kim

    IPC分类号： H01L21/336

    CPC分类号： H01L29/785 ,  H01L21/823412 ,  H01L29/42356 ,  H01L29/42384 ,  H01L29/42392 ,  H01L29/66477 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/66772 ,  H01L29/66787 ,  H01L29/78 ,  H01L29/78642 ,  H01L29/78654 ,  H01L29/78696

    摘要： Integrated circuit field effect transistor devices include a substrate having a surface and an active channel pattern on the surface. The active channel pattern includes channels that are stacked upon one another and are spaced apart from one another to define at least one tunnel between adjacent channels. A gate electrode surrounds the channels and extends through the at least one tunnel. A pair of source/drain regions also is provided. Integrated circuit field effect transistors are manufactured, by forming a pre-active pattern on a surface of a substrate. The pre-active pattern includes a series of interchannel layers and channel layers stacked alternately upon each other. Source/drain regions are formed on the substrate at opposite ends of the pre-active pattern. The interchannel layers are selectively removed to form tunnels. A gate electrode is formed in the tunnels and surrounding the channels.

    摘要翻译： 集成电路场效应晶体管器件包括在表面上具有表面和有源沟道图案的衬底。 活动通道图案包括彼此堆叠并且彼此间隔开以限定相邻通道之间的至少一个通道的通道。 栅电极围绕通道并延伸穿过至少一个通道。 还提供了一对源极/漏极区域。 通过在衬底的表面上形成预活性图案来制造集成电路场效应晶体管。 预激活图案包括彼此交替堆叠的一系列通道间层和沟道层。 在预活化图案的相对端处，在衬底上形成源极/漏极区域。 选择性地去除通道间层以形成隧道。 在隧道中形成栅电极并围绕通道。