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公开(公告)号：US07663693B2
公开(公告)日：2010-02-16
申请号：US10791410
申请日：2004-03-01
IPC分类号： H04N5/225
CPC分类号： H04N5/2253 , H01L27/14618 , H01L27/14625 , H01L27/14634 , H01L27/14636 , H01L31/0203 , H01L2224/16225 , H04N2101/00 , H01L2224/48091 , H01L2924/00014
摘要： A camera module is provided. The camera module comprises: a lens; a holder having a lower portion, the holder holding the lens; a circuit board; and an image sensing and processing unit including an image sensing device and an optional signal processing device stacked on and electrically connected to the image sensing device, the image sensing and processing unit being packaged on one side of the circuit board; wherein the holder is fixed on the circuit board, the image sensing and processing unit inside the lower portion of the holder. Further, if the circuit board is a flexible circuit board, then a hard plate can be disposed on the other side of the flexible PCB corresponding to the image sensing and processing unit in order to enhance the mechanical strength.
摘要翻译： 提供相机模块。 相机模块包括：透镜; 具有下部的保持器，保持器保持透镜; 电路板; 以及图像感知和处理单元，其包括层叠在图像感测装置上并与其电连接的图像感测装置和可选的信号处理装置，所述图像感测处理单元被封装在所述电路板的一侧上; 其中，所述保持器固定在所述电路板上，所述图像感测处理单元位于所述保持器的下部内部。 此外，如果电路板是柔性电路板，则可以在对应于图像感测和处理单元的柔性PCB的另一侧上设置硬板，以增强机械强度。
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2.发明申请Chip on photosensitive device package structure and electrical connection thereof 失效芯片上的感光器件封装结构及其电气连接公开(公告)号：US20050189624A1
公开(公告)日：2005-09-01
申请号：US10791325
申请日：2004-03-01
IPC分类号： H01L23/495 , H01L27/148
CPC分类号： H01L27/14618 , H01L27/148 , H01L2224/48091 , H01L2924/00014
摘要： A chip on photosensitive device package structure is provided. The package mainly comprises a photosensitive device, a transparent plate and a chip. The photosensitive device has an illumination area and a non-illumination area. The transparent plate has a first surface and a corresponding second surface. The transparent plate is set over the photosensitive device with the first surface covering both the illumination area and the non-illumination area. The chip is set on the second surface of the transparent plate above the non-illumination area of the photosensitive device.
摘要翻译： 提供了一种感光器件封装结构的芯片。 封装主要包括光敏元件，透明板和芯片。 感光装置具有照明区域和非照明区域。 透明板具有第一表面和相应的第二表面。 透明板设置在感光装置上，第一表面覆盖照明区域和非照明区域。 芯片设置在感光装置的非照明区域上方的透明板的第二表面上。
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公开(公告)号：US06930398B1
公开(公告)日：2005-08-16
申请号：US10708761
申请日：2004-03-24
IPC分类号： H01L23/48
CPC分类号： H01L27/14618 , H01L2224/48091 , H01L2924/00014
摘要： A package structure for optical image sensing devices is disclosed. The package structure includes an image sensing integrated circuit chip having a light receiving side and a backside. The image sensing integrated circuit chip has a light sensing area on the light receiving side. A plurality of light sensing devices are arranged in the light sensing area for converting incident light into electrical signals. A plurality of bonding pads are arranged along one or two sides of the light sensing area. Black sealing glue is asymmetrically coated on the outskirts of the light sensing area. The black sealing glue has at least two coating widths. A glass lid is glued over the light sensing area with the sealing glue.
摘要翻译： 公开了一种用于光学图像感测装置的封装结构。 封装结构包括具有光接收侧和背面的图像感测集成电路芯片。 图像感测集成电路芯片在光接收侧具有光感测区域。 在光检测区域中布置有多个光感测装置，用于将入射光转换成电信号。 多个接合焊盘沿着光感测区域的一侧或两侧布置。 黑色密封胶不对称地涂在感光区域的郊区。 黑色密封胶具有至少两个涂层宽度。 玻璃盖用密封胶粘在感光区上。
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公开(公告)号：US20060057764A1
公开(公告)日：2006-03-16
申请号：US10711377
申请日：2004-09-15
IPC分类号： H01L21/00
CPC分类号： H01L27/14618 , H01L27/14621 , H01L27/14627 , H01L27/14636 , H01L27/1464 , H01L27/14685 , H01L2924/0002 , H01L2924/00
摘要： An image sensor comprising an image sensing device layer, a silicon-on-insulator (SOI) layer, an optical device array and a substrate is provided. The SOI layer has a first surface and a second surface. The image sensing device layer is formed on the first surface of the SOI layer. The optical device array is formed on the second surface of the SOI layer. The substrate is disposed above the second surface of the SOI layer and the optical device array is disposed between the substrate and the SOI layer. An incident light coming from the outside environment, passes through the optical device array and the SOI layer, and is received by sensing devices formed in the image sensing device layer. In this manner, the probability of absorption or reflection of the incident light is reduced. Therefore, the sensing performance and the yield of the image sensor of the present invention is improved.
摘要翻译： 提供了包括图像感测装置层，绝缘体上硅（SOI）层，光学装置阵列和基板的图像传感器。 SOI层具有第一表面和第二表面。 图像感测装置层形成在SOI层的第一表面上。 光学器件阵列形成在SOI层的第二表面上。 衬底设置在SOI层的第二表面上方，并且光学器件阵列设置在衬底和SOI层之间。 来自外部环境的入射光通过光学器件阵列和SOI层，并且由形成在图像感测器件层中的感测器件接收。 以这种方式，入射光的吸收或反射的概率降低。 因此，提高了本发明的图像传感器的感测性能和产量。
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5.发明授权Chip on photosensitive device package structure and electrical connection thereof 失效芯片上的感光器件封装结构及其电气连接公开(公告)号：US07009287B2
公开(公告)日：2006-03-07
申请号：US10791325
申请日：2004-03-01
CPC分类号： H01L27/14618 , H01L27/148 , H01L2224/48091 , H01L2924/00014
摘要： A chip on photosensitive device package structure is provided. The package mainly comprises a photosensitive device, a transparent plate and a chip. The photosensitive device has an illumination area and a non-illumination area. The transparent plate has a first surface and a corresponding second surface. The transparent plate is set over the photosensitive device with the first surface covering both the illumination area and the non-illumination area. The chip is set on the second surface of the transparent plate above the non-illumination area of the photosensitive device.
摘要翻译： 提供了一种感光器件封装结构的芯片。 封装主要包括光敏元件，透明板和芯片。 感光装置具有照明区域和非照明区域。 透明板具有第一表面和相应的第二表面。 透明板设置在感光装置上，第一表面覆盖照明区域和非照明区域。 芯片设置在感光装置的非照明区域上方的透明板的第二表面上。
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公开(公告)号：US07060592B2
公开(公告)日：2006-06-13
申请号：US10711377
申请日：2004-09-15
CPC分类号： H01L27/14618 , H01L27/14621 , H01L27/14627 , H01L27/14636 , H01L27/1464 , H01L27/14685 , H01L2924/0002 , H01L2924/00
摘要： An image sensor comprising an image sensing device layer, a silicon-on-insulator (SOI) layer, an optical device array and a substrate is provided. The SOI layer has a first surface and a second surface. The image sensing device layer is formed on the first surface of the SOI layer. The optical device array is formed on the second surface of the SOI layer. The substrate is disposed above the second surface of the SOI layer and the optical device array is disposed between the substrate and the SOI layer. An incident light coming from the outside environment, passes through the optical device array and the SOI layer, and is received by sensing devices formed in the image sensing device layer. In this manner, the probability of absorption or reflection of the incident light is reduced. Therefore, the sensing performance and the yield of the image sensor of the present invention is improved.
摘要翻译： 提供了包括图像感测装置层，绝缘体上硅（SOI）层，光学装置阵列和基板的图像传感器。 SOI层具有第一表面和第二表面。 图像感测装置层形成在SOI层的第一表面上。 光学器件阵列形成在SOI层的第二表面上。 衬底设置在SOI层的第二表面上方，并且光学器件阵列设置在衬底和SOI层之间。 来自外部环境的入射光通过光学器件阵列和SOI层，并且由形成在图像感测器件层中的感测器件接收。 以这种方式，入射光的吸收或反射的概率降低。 因此，提高了本发明的图像传感器的感测性能和产量。
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公开(公告)号：US20050190290A1
公开(公告)日：2005-09-01
申请号：US10791410
申请日：2004-03-01
IPC分类号： H01L27/00 , H01L27/146 , H01L31/0203 , H04N1/00 , H04N5/225
CPC分类号： H04N5/2253 , H01L27/14618 , H01L27/14625 , H01L27/14634 , H01L27/14636 , H01L31/0203 , H01L2224/16225 , H04N2101/00 , H01L2224/48091 , H01L2924/00014
摘要： A camera module is provided. The camera module comprises: a lens; a holder having a lower portion, the holder holding the lens; a circuit board; and an image sensing and processing unit including an image sensing device and an optional signal processing device stacked on and electrically connected to the image sensing device, the image sensing and processing unit being packaged on one side of the circuit board; wherein the holder is fixed on the circuit board, the image sensing and processing unit inside the lower portion of the holder. Further, if the circuit board is a flexible circuit board, then a hard plate can be disposed on the other side of the flexible PCB corresponding to the image sensing and processing unit in order to enhance the mechanical strength.
摘要翻译： 提供相机模块。 相机模块包括：透镜; 具有下部的保持器，保持器保持透镜; 电路板; 以及图像感知和处理单元，其包括层叠在图像感测装置上并与其电连接的图像感测装置和可选的信号处理装置，所述图像感测处理单元被封装在所述电路板的一侧上; 其中，所述保持器固定在所述电路板上，所述图像感测处理单元位于所述保持器的下部内部。 此外，如果电路板是柔性电路板，则可以在对应于图像感测和处理单元的柔性PCB的另一侧上设置硬板，以增强机械强度。
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公开(公告)号：US20060131723A1
公开(公告)日：2006-06-22
申请号：US11307872
申请日：2006-02-26
申请人： Jui-Hsiang Pan , Kuang-Shin Lee , Cheng-Kuang Sun
发明人： Jui-Hsiang Pan , Kuang-Shin Lee , Cheng-Kuang Sun
IPC分类号： H01L23/48
CPC分类号： H01L23/49827 , H01L24/45 , H01L24/48 , H01L2224/05571 , H01L2224/05573 , H01L2224/16 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2224/05599 , H01L2924/00012
摘要： The present invention provides a method for fabricating a quad flat no-lead package structure, comprising a chip carrier and at least a chip. The chip is disposed on the top surface of the chip carrier, while the back surface of the chip carrier includes a plurality of flat no-lead conductive leads as I/O pads of the chip carrier for the external circuitry. A plurality of pads, corresponding to bonding pads of the chip, is disposed on the top surface of the chip carrier. The aforementioned package structure can employ wiring bonding technology, flip chip technology or surface mount technology to attach the chip to the chip carrier.
摘要翻译： 本发明提供一种制造四边形扁平无引线封装结构的方法，其包括芯片载体和至少芯片。 芯片设置在芯片载体的顶表面上，而芯片载体的背面包括多个平坦的无引线导线作为用于外部电路的芯片载体的I / O焊盘。 对应于芯片的接合焊盘的多个焊盘设置在芯片载体的顶表面上。 上述封装结构可以采用布线接合技术，倒装芯片技术或表面贴装技术将芯片附接到芯片载体。
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公开(公告)号：US20050074916A1
公开(公告)日：2005-04-07
申请号：US10681458
申请日：2003-10-07
申请人： Cheng-Kuang Sun , Kuang-Shin Lee , Jui-Hsiang Pan
发明人： Cheng-Kuang Sun , Kuang-Shin Lee , Jui-Hsiang Pan
IPC分类号： H01L21/00 , H01L27/146
CPC分类号： H01L27/14632 , H01L27/14601 , H01L27/14623 , H01L27/14625 , H01L27/14636 , H01L2224/48091 , H01L2224/73265 , H01L2924/13091 , H01L2924/00014 , H01L2924/00
摘要： A process for fabricating a semiconductor device is provided. The process integrates a cutting film process into the front-end of semiconductor process. The cutting film is directly formed on the curved surface of the micro-lens or a passivation layer is formed on the micro-lens before covering the passivation layer with the cutting film. In addition to micro-particle contamination due to sawing, the process is able to simplify chip packaging and reduce the size of a photosensitive module.
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![[QUAD FLAT NO-LEAD PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF]](/abs-image/US/2005/04/07/US20050073055A1/abs.jpg.150x150.jpg)
10.发明申请公开(公告)号：US20050073055A1
公开(公告)日：2005-04-07
申请号：US10710933
申请日：2004-08-13
申请人： Jui-Hsiang Pan , Kuang-Shin Lee , Cheng-Kuang Sun
发明人： Jui-Hsiang Pan , Kuang-Shin Lee , Cheng-Kuang Sun
IPC分类号： H01L23/498 , H01L21/48 , H01L23/053
CPC分类号： H01L23/49827 , H01L24/45 , H01L24/48 , H01L2224/05571 , H01L2224/05573 , H01L2224/16 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2224/05599 , H01L2924/00012
摘要： The present invention provides a QFN package structure, comprising a chip carrier and at least a chip. The chip is disposed on the top surface of the chip carrier, while the back surface of the chip carrier includes a plurality of flat no-lead conductive leads as I/O pads of the chip carrier for the external circuitry. A plurality of pads, corresponding to bonding pads of the chip, is disposed on the top surface of the chip carrier. The aforementioned package structure can employ wiring bonding technology, flip chip technology or surface mount technology to attach the chip to the chip carrier.
摘要翻译： 本发明提供一种包括芯片载体和至少芯片的QFN封装结构。 芯片设置在芯片载体的顶表面上，而芯片载体的背面包括多个平坦的无引线导线作为用于外部电路的芯片载体的I / O焊盘。 对应于芯片的接合焊盘的多个焊盘设置在芯片载体的顶表面上。 上述封装结构可以采用布线接合技术，倒装芯片技术或表面贴装技术将芯片附接到芯片载体。
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