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    Short yoke length planar writer with low DC coil resistance
    2.
    发明申请
    Short yoke length planar writer with low DC coil resistance 有权
    具有低直流线圈电阻的短轭长度平面刻录机

    公开(公告)号：US20050024769A1

    公开(公告)日：2005-02-03

    申请号：US10633105

    申请日：2003-08-01

    申请人： Cherng Han ,  Mao-Min Chen

    发明人： Cherng Han ,  Mao-Min Chen

    IPC分类号： G11B5/147 ,  G11B5/31 ,  G11B5/39

    CPC分类号： G11B5/3932 ,  G11B5/3106 ,  Y10T29/49032

    摘要： Present processes used for planarizing a cavity filled with a coil and hard baked photoresist require that a significant amount of the thickness of the coils be removed. This increases the DC resistance of the coil. In the present invention a layer of alumina is deposited onto the surface of the excess photoresist, following which CMP is initiated. The presence of the alumina serves to stabilize the photoresist so that it does not delaminate. CMP is terminated as soon as the coils are exposed, allowing their full thickness to be retained and resulting in minimum DC resistance. Application of this process to the manufacture of a two coil planar magnetic write head is described.

    摘要翻译： 用于平坦化填充有线圈和硬烘烤光致抗蚀剂的空腔的现有方法需要去除大量的线圈厚度。 这增加了线圈的直流电阻。 在本发明中，一层氧化铝沉积在多余的光致抗蚀剂的表面上，随后开始CMP。 氧化铝的存在用于使光致抗蚀剂稳定，使其不分层。 一旦线圈被暴露，CMP就被终止，允许其保持其全部厚度并导致最小的直流电阻。 描述了该方法在制造双线圈平面磁性写入头上的应用。

    Underlayer for high performance magnetic tunneling junction MRAM
    3.
    发明授权
    Underlayer for high performance magnetic tunneling junction MRAM 有权
    高性能磁隧道结MRAM底层

    公开(公告)号：US08673654B2

    公开(公告)日：2014-03-18

    申请号：US12589465

    申请日：2009-10-23

    申请人： Liubo Hong ,  Cheng Horng ,  Mao-Min Chen ,  Ru-Yin Tong

    发明人： Liubo Hong ,  Cheng Horng ,  Mao-Min Chen ,  Ru-Yin Tong

    IPC分类号： H01L21/00

    CPC分类号： H01L43/12 ,  B82Y10/00 ,  B82Y25/00 ,  B82Y40/00 ,  G01R33/09 ,  G01R33/093 ,  G01R33/098 ,  G11B5/3906 ,  G11B5/3909 ,  G11C11/161 ,  G11C11/1673 ,  H01F10/30 ,  H01F10/3254 ,  H01F10/3259 ,  H01F10/3272 ,  H01F10/3295 ,  H01F41/307 ,  H01L43/08 ,  H01L43/10 ,  Y10T428/1114

    摘要： An MRAM structure is disclosed in which the bottom electrode has an amorphous TaN capping layer to consistently provide smooth and dense growth for AFM, pinned, tunnel barrier, and free layers in an overlying MTJ. Unlike a conventional Ta capping layer, TaN is oxidation resistant and has high resistivity to avoid shunting of a sense current caused by redeposition of the capping layer on the sidewalls of the tunnel barrier layer. Alternatively, the α-TaN layer is the seed layer in the MTJ. Furthermore, the seed layer may be a composite layer comprised of a NiCr, NiFe, or NiFeCr layer on the α-TaN layer. An α-TaN capping layer or seed layer can also be used in a TMR read head. An MTJ formed on an α-TaN capping layer has a high MR ratio, high Vb, and a RA similar to results obtained from MTJs based on an optimized Ta capping layer.

    摘要翻译： 公开了一种MRAM结构，其中底部电极具有无定形TaN覆盖层，以一致地提供在覆盖的MTJ中的AFM，固定，隧道势垒和自由层的平滑且致密的生长。 与传统的Ta覆盖层不同，TaN是抗氧化的并且具有高电阻率以避免由于覆盖层在隧道势垒层的侧壁上的再沉积引起的感测电流的分流。 或者，α-TaN层是MTJ中的种子层。 此外，种子层可以是由α-TaN层上的NiCr，NiFe或NiFeCr层构成的复合层。 也可以在TMR读取头中使用α-TaN覆盖层或种子层。 在α-TaN覆盖层上形成的MTJ具有高MR比，高Vb和RA，其类似于基于优化的Ta覆盖层的MTJ获得的结果。

    Spacer structure in MRAM cell and method of its fabrication
    4.
    发明授权
    Spacer structure in MRAM cell and method of its fabrication 有权
    MRAM单元的间隔结构及其制作方法

    公开(公告)号：US07880249B2

    公开(公告)日：2011-02-01

    申请号：US11290763

    申请日：2005-11-30

    申请人： Jun Yuan ,  Liubo Hong ,  Mao-Min Chen

    发明人： Jun Yuan ,  Liubo Hong ,  Mao-Min Chen

    IPC分类号： H01L29/82

    CPC分类号： H01L43/12 ,  H01L27/222 ,  H01L43/08

    摘要： Methods are presented for fabricating an MTJ element having a precisely controlled spacing between its free layer and a bit line and, in addition, having a protective spacer layer formed abutting the lateral sides of the MTJ element to eliminate leakage currents between MTJ layers and the bit line. Each method forms a dielectric spacer layer on the lateral sides of the MTJ element and, depending on the method, includes an additional layer that protects the spacer layer during etching processes used to form a Cu damascene bit line. At various stages in the process, a dielectric layer is also formed to act as a CMP stop layer so that the capping layer on the MTJ element is not thinned by the CMP process that planarizes the surrounding insulation. Subsequent to planarization, the stop layer is removed by an anisotropic etch of such precision that the MTJ element capping layer is not thinned and serves to maintain an exact spacing between the bit line and the MTJ free layer.

    摘要翻译： 提出了用于制造在其自由层和位线之间具有精确控制的间隔的MTJ元件的方法，此外，具有邻接MTJ元件的侧面形成的保护性间隔层以消除MTJ层与钻头之间的泄漏电流 线。 每种方法在MTJ元件的侧面上形成电介质间隔层，并且根据该方法，包括在用于形成Cu镶嵌位线的蚀刻工艺期间保护间隔层的附加层。 在该过程的各个阶段，还形成介电层以用作CMP停止层，使得MTJ元件上的覆盖层不会通过使周围绝缘平坦化的CMP工艺变薄。 在平坦化之后，通过各向异性蚀刻去除停止层，其精度使得MTJ元件覆盖层不变薄并且用于保持位线和MTJ自由层之间的精确间隔。

    ABS through aggressive stitching
    6.
    发明授权
    ABS through aggressive stitching 失效
    ABS通过积极的拼接

    公开(公告)号：US07251102B2

    公开(公告)日：2007-07-31

    申请号：US10782496

    申请日：2004-02-19

    申请人： Cherng-Chyi Han ,  Mao-Min Chen ,  Laurie Lauchlan ,  Lei Zhang

    发明人： Cherng-Chyi Han ,  Mao-Min Chen ,  Laurie Lauchlan ,  Lei Zhang

    IPC分类号： G11B5/127

    CPC分类号： G11B5/33 ,  Y10T29/49041 ,  Y10T29/49043 ,  Y10T29/49044 ,  Y10T29/49046 ,  Y10T29/49048 ,  Y10T29/4906 ,  Y10T29/49062 ,  Y10T29/49064

    摘要： Aggressive (i.e. tight tolerance) stitching offers several advantages for magnetic write heads but at the cost of some losses during pole trimming. This problem has been overcome by replacing the alumina filler layer, that is used to protect the stitched pole during trimming, with a layer of electro-plated material. Because of the superior step coverage associated with the plating method of deposition, pole trimming can then proceed without the introduction of stresses to the stitched pole while it is being trimmed.

    摘要翻译： 积极（即紧公差）缝合为磁性写入头提供了几个优点，但是在极修整期间以一些损失为代价。 通过用一层电镀材料代替在修整期间用于保护缝合极的氧化铝填料层已经克服了这个问题。 由于与沉积电镀方法相关的优越的台阶覆盖，因此可以进行极细修剪，而不会在缝合极被修剪时引入应力。

    Method to make abutted junction GMR head without lead shunting
    7.
    发明授权
    Method to make abutted junction GMR head without lead shunting 失效
    在没有引线分流的情况下制造对接接头GMR头的方法

    公开(公告)号：US07196876B2

    公开(公告)日：2007-03-27

    申请号：US10236359

    申请日：2002-09-06

    申请人： Cherng-Chyi Han ,  Mao-Min Chen ,  Pokang Wang

    发明人： Cherng-Chyi Han ,  Mao-Min Chen ,  Pokang Wang

    IPC分类号： G11B5/39 ,  G11B5/33 ,  G11B5/127

    CPC分类号： B82Y25/00 ,  B82Y10/00 ,  G01R33/093 ,  G11B5/3116 ,  G11B5/313 ,  G11B5/3163 ,  G11B5/3903 ,  Y10T29/49044 ,  Y10T29/49052

    摘要： A method for forming an abutted junction GMR bottom spin valve sensor in which the free layer has a maximum effective length due to the elimination or minimization of bias layer and conducting lead layer overspreading onto the sensor element and the consequent reduction of current shunting. The overspreading is eliminated by forming a thin dielectric layer on the upper surface of the sensor element. When the biasing and conducting leads are formed on the abutted junction, they overspread onto this layer and the overspread can be removed by an ion-milling process during which the dielectric layer protects the sensor.

    摘要翻译： 用于形成邻接结GMR底部自旋阀传感器的方法，其中自由层由于偏置层的消除或最小化而导致最大有效长度，并且导致引线层过度传播到传感器元件上，从而减少了电流分流。 通过在传感器元件的上表面上形成薄的电介质层来消除超扩展。 当偏置和导电引线形成在邻接接头上时，它们被扩展到该层上，并且可以通过离子铣削工艺去除超扩展，其中电介质层保护传感器。

    Low DC coil resistance planar writer
    8.
    发明授权
    Low DC coil resistance planar writer 失效
    低直流线圈电阻平面写入器

    公开(公告)号：US07126789B2

    公开(公告)日：2006-10-24

    申请号：US10633133

    申请日：2003-08-01

    申请人： Cherng Chyi Han ,  Mao-Min Chen

    发明人： Cherng Chyi Han ,  Mao-Min Chen

    IPC分类号： G11B5/147

    CPC分类号： G11B5/3103 ,  Y10T29/49032

    摘要： Present processes used for planarizing a cavity filled with a coil and hard baked photoresist require that a significant amount of the thickness of the coils be removed. This increases the DC resistance of the coil. In the present invention, CMP is terminated as soon as the coils are exposed, allowing their full thickness to be retained and resulting in minimum DC resistance. Application of this process to the manufacture of a planar magnetic write head is described.

    摘要翻译： 用于平坦化填充有线圈和硬烘烤光致抗蚀剂的空腔的现有方法需要去除大量的线圈厚度。 这增加了线圈的直流电阻。 在本发明中，一旦线圈暴露，CMP就终止，允许其保持其全部厚度并且导致最小的直流电阻。 描述了该方法在平面磁写头的制造中的应用。

    Novel hard bias design for sensor applications
    10.
    发明申请
    Novel hard bias design for sensor applications 有权
    传感器应用的新型硬偏置设计

    公开(公告)号：US20060132988A1

    公开(公告)日：2006-06-22

    申请号：US11016506

    申请日：2004-12-17

    申请人： Kunliang Zhang ,  Mao-Min Chen ,  Chyu-Jiuh Torng ,  Min Li ,  Chen-Jung Chien

    发明人： Kunliang Zhang ,  Mao-Min Chen ,  Chyu-Jiuh Torng ,  Min Li ,  Chen-Jung Chien

    IPC分类号： G11B5/33 ,  G11B5/127

    CPC分类号： B82Y25/00 ,  B82Y10/00 ,  G11B5/3932 ,  G11B2005/3996 ,  Y10T29/49032

    摘要： A hard bias structure for biasing a free layer in a MR element within a magnetic read head is comprised of a soft magnetic underlayer such as NiFe and a hard bias layer comprised of Co78.6Cr5.2Pt16.2 or Co65Cr15Pt20 that are rigidly exchange coupled to ensure a well aligned longitudinal biasing direction with minimal dispersions. The hard bias structure is formed on a BCC seed layer such as CrTi to improve lattice matching. The hard bias structure may be laminated in which each of the underlayers and hard bias layers has a thickness that is adjusted to optimize the total HC, Mrt, and S values. The present invention encompasses CIP and CPP spin values, MTJ devices, and multi-layer sensors. A larger process window for fabricating the hard bias structure is realized and lower asymmetry output and NBLW reject rates during a read operation are achieved.

    摘要翻译： 用于偏置磁读头内的MR元件中的自由层的硬偏压结构由诸如NiFe的软磁性底层和由Co ++ 78.6Cr 5.2构成的硬偏置层组成， 或刚性交换耦合以确保良好对准的/SUB>Pt16.2 或Co 15 Cr 15 纵向偏置方向最小分散。 在诸如CrTi的BCC种子层上形成硬偏压结构以改善晶格匹配。 可以层压硬偏压结构，其中每个底层和硬偏压层具有被调节以使总H C，M L t和S的最大化的厚度 价值观。 本发明包括CIP和CPP旋转值，MTJ装置和多层传感器。 实现了用于制造硬偏置结构的更大的工艺窗口，并且实现了读操作期间较低的不对称输出和NBLW废弃率。