公开(公告)号：US07314815B2

公开(公告)日：2008-01-01

申请号：US11308550

申请日：2006-04-06

申请人： Chia-Hua Ho ,  Yen-Hao Shih ,  Hsiang-Lan Lung ,  Shih-Ping Hong ,  Shih-Chin Lee

发明人： Chia-Hua Ho ,  Yen-Hao Shih ,  Hsiang-Lan Lung ,  Shih-Ping Hong ,  Shih-Chin Lee

IPC分类号： H01L21/336 ,  H01L21/326 ,  H01L21/479 ,  H01L21/44

CPC分类号： H01L27/101 ,  G11C17/16 ,  H01L27/1021

摘要： An one-time programmable read only memory is provided. An N-type doping region and a first P-type doping layer are disposed in a P-type semiconductor substrate sequentially. A second P-type doping layer is disposed between the first P-type doping layer and the N-type doping region. The second P-type doping layer with higher doping level, which has a linear structure, is served as a bit line. An electrically conductive layer is disposed over the P-type semiconductor substrate. The electrically conductive layer also has a linear structure that crosses over the first P-type doping layer. The first N-type doping layer is disposed in the P-type semiconductor substrate between the electrically conductive layer and the first P-type doping layer. The arrangement of N-type and P-type doping layer is used to be selective diode device. An anti-fuse layer is disposed between the electrically conductive layer and the first N-type doping layer.

摘要翻译： 提供一次性可编程只读存储器。 顺序地在P型半导体衬底中设置N型掺杂区和第一P型掺杂层。 第二P型掺杂层设置在第一P型掺杂层和N型掺杂区之间。 具有线性结构的具有较高掺杂度的第二P型掺杂层用作位线。 导电层设置在P型半导体衬底上。 导电层还具有与第一P型掺杂层交叉的线性结构。 第一N型掺杂层设置在P型半导体衬底之间的导电层和第一P型掺杂层之间。 N型和P型掺杂层的布置用作选择性二极管器件。 在导电层和第一N型掺杂层之间设置反熔丝层。

公开(公告)号：US20060199361A1

公开(公告)日：2006-09-07

申请号：US11308550

申请日：2006-04-06

申请人： Chia-Hua Ho ,  Yen-Hao Shih ,  Hsiang-Lan Lung ,  Shih-Ping Hong ,  Shih-Chin Lee

发明人： Chia-Hua Ho ,  Yen-Hao Shih ,  Hsiang-Lan Lung ,  Shih-Ping Hong ,  Shih-Chin Lee

IPC分类号： G11C17/00 ,  H01L21/44

CPC分类号： H01L27/101 ,  G11C17/16 ,  H01L27/1021

摘要： An one-time programmable read only memory is provided. An N-type doping region and a first P-type doping layer are disposed in a P-type semiconductor substrate sequentially. A second P-type doping layer is disposed between the first P-type doping layer and the N-type doping region. The second P-type doping layer with higher doping level, which has a linear structure, is served as a bit line. An electrically conductive layer is disposed over the P-type semiconductor substrate. The electrically conductive layer also has a linear structure that crosses over the first P-type doping layer. The first N-type doping layer is disposed in the P-type semiconductor substrate between the electrically conductive layer and the first P-type doping layer. The arrangement of N-type and P-type doping layer is used to be selective diode device. An anti-fuse layer is disposed between the electrically conductive layer and the first N-type doping layer.

摘要翻译： 提供一次性可编程只读存储器。 顺序地在P型半导体衬底中设置N型掺杂区和第一P型掺杂层。 第二P型掺杂层设置在第一P型掺杂层和N型掺杂区之间。 具有线性结构的具有较高掺杂度的第二P型掺杂层用作位线。 导电层设置在P型半导体衬底上。 导电层还具有与第一P型掺杂层交叉的线性结构。 第一N型掺杂层设置在P型半导体衬底之间的导电层和第一P型掺杂层之间。 N型和P型掺杂层的布置用作选择性二极管器件。 在导电层和第一N型掺杂层之间设置反熔丝层。

公开(公告)号：US07053406B1

公开(公告)日：2006-05-30

申请号：US10907442

申请日：2005-04-01

申请人： ChiaHua Ho ,  Yen-Hao Shih ,  Hsiang-Lan Lung ,  Shih-Ping Hong ,  Shih-Chin Lee

发明人： ChiaHua Ho ,  Yen-Hao Shih ,  Hsiang-Lan Lung ,  Shih-Ping Hong ,  Shih-Chin Lee

IPC分类号： H01L29/72

CPC分类号： H01L27/1021 ,  H01L23/5252 ,  H01L27/12 ,  H01L2924/0002 ,  H01L2924/00

摘要： An one-time programmable read only memory is provided. An N-type doping region and a first P-type doping layer are disposed in a P-type semiconductor substrate sequentially. A second P-type doping layer is disposed between the first P-type doping layer and the N-type doping region. The second P-type doping layer with higher doping level, which has a linear structure, is served as a bit line. An electrically conductive layer is disposed over the P-type semiconductor substrate. The electrically conductive layer also has a linear structure that crosses over the first P-type doping layer. The first N-type doping layer is disposed in the P-type semiconductor substrate between the electrically conductive layer and the first P-type doping layer. The arrangement of N-type and P-type doping layer is used to be selective diode device. An anti-fuse layer is disposed between the electrically conductive layer and the first N-type doping layer.

摘要翻译： 提供一次性可编程只读存储器。 顺序地在P型半导体衬底中设置N型掺杂区和第一P型掺杂层。 第二P型掺杂层设置在第一P型掺杂层和N型掺杂区之间。 具有线性结构的具有较高掺杂度的第二P型掺杂层用作位线。 导电层设置在P型半导体衬底上。 导电层还具有与第一P型掺杂层交叉的线性结构。 第一N型掺杂层设置在P型半导体衬底之间的导电层和第一P型掺杂层之间。 N型和P型掺杂层的布置用作选择性二极管器件。 在导电层和第一N型掺杂层之间设置反熔丝层。

公开(公告)号：US08440576B2

公开(公告)日：2013-05-14

申请号：US12109982

申请日：2008-04-25

申请人： Shih-Ping Hong

发明人： Shih-Ping Hong

IPC分类号： H01L21/337

CPC分类号： H01L21/31144 ,  H01L21/0337 ,  H01L21/0338

摘要： A method for patterning a material is provided. The method includes patterning a second material over a first material over a substrate. A surface portion of the patterned second material is converted to form a third material and a remaining patterned second material, wherein the third material is around the remaining patterned second material. One of the remaining patterned second material and the third material is removed to form a mask. The first material is patterned by using the mask.

摘要翻译： 提供了图案化材料的方法。 该方法包括在第一材料上在衬底上图形化第二材料。 图案化的第二材料的表面部分被转化以形成第三材料和剩余的图案化的第二材料，其中第三材料围绕剩余的图案化的第二材料。 除去剩余的图案化第二材料和第三材料中的一个以形成掩模。 通过使用掩模对第一材料进行图案化。

公开(公告)号：US20090286364A1

公开(公告)日：2009-11-19

申请号：US12121382

申请日：2008-05-15

申请人： Shih-Ping Hong ,  Han-Hui Hsu

发明人： Shih-Ping Hong ,  Han-Hui Hsu

IPC分类号： H01L21/28 ,  H01L21/336

CPC分类号： H01L21/28211 ,  C23C8/36 ,  H01J37/321 ,  H01L29/51 ,  H01L29/78

摘要： A method for forming a dielectric is provided. The method includes providing a substrate having a silicon-containing semiconductor layer within a process chamber. The process chamber is capable of ionizing a process precursor to a plasma comprising an oxygen-containing element and a fluorocarbon-containing element. A surface portion of the silicon-containing material is oxidized by using the plasma to convert the surface portion into an oxidized dielectric material.

摘要翻译： 提供了形成电介质的方法。 该方法包括在处理室内提供具有含硅半导体层的衬底。 处理室能够将工艺前体电离到包含含氧元素和含氟烃元素的等离子体中。 通过使用等离子体将含硅材料的表面部分氧化，将表面部分转化为氧化的电介质材料。

公开(公告)号：US07279114B1

公开(公告)日：2007-10-09

申请号：US11430674

申请日：2006-05-08

申请人： Shih-Ping Hong

发明人： Shih-Ping Hong

IPC分类号： G01L21/30 ,  H01L21/00

CPC分类号： H01L21/31116 ,  H01L22/26

摘要： The invention is directed to an etching method for patterning a first material layer over a second material layer to expose a portion of the second material layer. The etching method comprises steps of performing a first etching process to remove a portion of the first material layer in an etching chamber and then performing an etching environment adjustment process in the etching chamber. A second etching process is performed on the first material layer and, meanwhile, a real-time etching monitor process is performed for generating an endpoint detection spectrum subsequent to the etching environment adjustment process, wherein at least one of signals of the endpoint detection spectrum is stabilized by the inert gas plasma treatment.

摘要翻译： 本发明涉及用于在第二材料层上图案化第一材料层以暴露第二材料层的一部分的蚀刻方法。 蚀刻方法包括以下步骤：执行第一蚀刻工艺以去除蚀刻室中的第一材料层的一部分，然后在蚀刻室中进行蚀刻环境调整处理。 在第一材料层上执行第二蚀刻工艺，同时执行蚀刻环境调整过程之后的生成端点检测光谱的实时蚀刻监测处理，其中端点检测光谱的信号中的至少一个为 通过惰性气体等离子体处理来稳定。

公开(公告)号：US08748323B2

公开(公告)日：2014-06-10

申请号：US12217645

申请日：2008-07-07

申请人： Han-Hui Hsu ,  Shih-Ping Hong ,  An-Chi Wei ,  Ming-Tsung Wu

发明人： Han-Hui Hsu ,  Shih-Ping Hong ,  An-Chi Wei ,  Ming-Tsung Wu

IPC分类号： H01L21/768 ,  H01L21/3105 ,  H01L21/314

CPC分类号： H01L21/76838 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32136 ,  H01L21/32139

摘要： A patterning method is provided. First, a substrate having an objective material layer thereon is provided. Thereafter, a mask layer is formed on the objective material layer. Afterwards, a patterned layer is formed over the mask layer, wherein a material of the patterned layer includes a metal-containing substance. Then, the mask layer is patterned to form a patterned mask layer. Further, the objective material layer is patterned, using the patterned mask layer as a mask.

摘要翻译： 提供了图案化方法。 首先，提供其上具有目标材料层的基板。 此后，在目标材料层上形成掩模层。 之后，在掩模层上形成图案层，其中图案化层的材料包括含金属的物质。 然后，将掩模层图案化以形成图案化掩模层。 此外，使用图案化掩模层作为掩模来对目标材料层进行图案化。

公开(公告)号：US20100206230A1

公开(公告)日：2010-08-19

申请号：US12769445

申请日：2010-04-28

申请人： Shih-Ping Hong ,  Han-Hui Hsu

发明人： Shih-Ping Hong ,  Han-Hui Hsu

IPC分类号： C23C16/513

CPC分类号： H01L21/28211 ,  C23C8/36 ,  H01J37/321 ,  H01L29/51 ,  H01L29/78

摘要： An apparatus for forming a dielectric layer includes a process chamber configured for disposing a substrate therein, a gas inlet for delivering a mixture gas to the process chamber, and an RF generator for producing a plasma from the mixture gas. The plasma includes an oxygen-containing element and a fluorocarbon-containing element. The apparatus also has a heating element configured for maintaining the chamber temperature at a desired process temperature, for example, at 800° C. or lower, and a connector to a vacuum pump for maintaining a process pressure. The apparatus is configured for using the plasma to convert a surface portion of the substrate into an oxidized dielectric material.

摘要翻译： 用于形成电介质层的装置包括：被配置为将基板设置在其中的处理室，用于将混合气体输送到处理室的气体入口和用于从混合气体产生等离子体的RF发生器。 等离子体包括含氧元素和含氟烃元素。 该装置还具有加热元件，该加热元件被配置为将室温度维持在期望的处理温度，例如800℃或更低，以及用于维持过程压力的真空泵的连接器。 该装置被配置为使用等离子体将基板的表面部分转换成氧化介电材料。

公开(公告)号：US20100000969A1

公开(公告)日：2010-01-07

申请号：US12217645

申请日：2008-07-07

申请人： Han-Hui Hsu ,  Shih-Ping Hong ,  An-Chi Wei ,  Ming-Tsung Wu

发明人： Han-Hui Hsu ,  Shih-Ping Hong ,  An-Chi Wei ,  Ming-Tsung Wu

IPC分类号： C23F1/00

CPC分类号： H01L21/76838 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32136 ,  H01L21/32139

摘要： A patterning method is provided. First, a substrate having an objective material layer thereon is provided. Thereafter, a mask layer is formed on the objective material layer. Afterwards, a patterned layer is formed over the mask layer, wherein a material of the patterned layer includes a metal-containing substance. Then, the mask layer is patterned to form a patterned mask layer. Further, the objective material layer is patterned, using the patterned mask layer as a mask.

摘要翻译： 提供了图案化方法。 首先，提供其上具有目标材料层的基板。 此后，在目标材料层上形成掩模层。 之后，在掩模层上形成图案层，其中图案化层的材料包括含金属的物质。 然后，将掩模层图案化以形成图案化掩模层。 此外，使用图案化掩模层作为掩模来对目标材料层进行图案化。

公开(公告)号：US07410593B2

公开(公告)日：2008-08-12

申请号：US11359787

申请日：2006-02-22

申请人： Hong-Ji Lee ,  Shih-Ping Hong ,  An-Chyi Wei

发明人： Hong-Ji Lee ,  Shih-Ping Hong ,  An-Chyi Wei

IPC分类号： B44C1/22 ,  H01L21/302

CPC分类号： H01L21/3065

摘要： Methods are described which comprise: providing a plasma etching apparatus having an etching chamber; disposing a substrate to be etched in the chamber; introducing N2 gas and one or more process gases into the chamber; and etching the substrate, wherein the introduction of the N2 gas is stopped prior to etching, and wherein etching comprises an initial plasma ignition wherein at least a portion of the N2 gas remains present in the chamber during initial plasma ignition. Additional methods are described which comprise: providing a plasma etching apparatus having an etching chamber; disposing a substrate to be etched in the chamber; introducing N2 gas and one or more process gases into the chamber; applying power to an electrode in the chamber such that an N2 memory species is formed; and etching the substrate, where the introduction of the N2 gas into the chamber can be stopped prior to etching. Other methods are also described which comprise: providing a plasma etching apparatus having an etching chamber; disposing a substrate to be etched in the chamber; introducing N2 gas into the chamber; applying power to an electrode in the chamber such that an N2 memory species is formed; removing the applied power from the electrode in the chamber; stopping the introduction of the N2 gas into the chamber and introducing one or more process gases into the chamber; and etching the substrate.

摘要翻译： 描述了包括：提供具有蚀刻室的等离子体蚀刻装置的方法; 将待蚀刻的基板设置在所述室中; 将N 2 O 2气体和一种或多种工艺气体引入所述室中; 以及蚀刻所述衬底，其中在蚀刻之前停止引入N 2 O 2气体，并且其中蚀刻包括初始等离子体点火，其中N 2 N 2 N 2的至少一部分 初始等离子体点火期间气体保留在腔室中。 描述了附加方法，其包括：提供具有蚀刻室的等离子体蚀刻装置; 将待蚀刻的基板设置在所述室中; 将N 2 O 2气体和一种或多种工艺气体引入所述室中; 向腔室中的电极施加功率，使得形成N 2种记忆物质; 并且在蚀刻之前可以停止引入N 2气体到腔室中的衬底。 还描述了其它方法，其包括：提供具有蚀刻室的等离子体蚀刻装置; 将待蚀刻的基板设置在所述室中; 将N 2 O 2气体引入室中; 向腔室中的电极施加功率，使得形成N 2种记忆物质; 从室中的电极去除施加的功率; 停止将N 2 N 2气体引入室中并将一种或多种工艺气体引入室中; 并蚀刻衬底。