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    INTERCONNECT STRUCTURE WITH IMPROVED ELECTROMIGRATION RESISTANCE AND METHOD OF FABRICATING SAME
    8.
    发明申请
    INTERCONNECT STRUCTURE WITH IMPROVED ELECTROMIGRATION RESISTANCE AND METHOD OF FABRICATING SAME 审中-公开
    具有改进的电阻率的互连结构及其制造方法

    公开(公告)号：US20090072406A1

    公开(公告)日：2009-03-19

    申请号：US11856970

    申请日：2007-09-18

    申请人： Chih-Chao Yang ,  Ping-Chuan Wang ,  Kaushik Chanda

    发明人： Chih-Chao Yang ,  Ping-Chuan Wang ,  Kaushik Chanda

    IPC分类号： H01L21/31

    CPC分类号： H01L21/76843 ,  H01L21/76846 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An interconnect structure in which the electromigration resistance thereof is improved without introducing a gouging feature within the interconnect structure is provided. The interconnect structure includes a metallic interfacial layer that is at least horizontally present at the bottom of an opening located within a second dielectric material that is located atop a first dielectric material that includes a first conductive material embedded therein. The metallic interfacial layer does not form an alloy with an underlying conductive material that is embedded within the first dielectric material. In some embodiments of the present invention, the metallic interfacial layer is also present on exposed sidewalls of the second dielectric material that is located atop the first dielectric material. Atop the metallic interfacial layer there is present a diffusion barrier liner. In some embodiments, the diffusion barrier liner includes a lower layer of a metallic nitride and an upper layer of a metal. In accordance with the present invention, the metallic interfacial layer also does not form an alloy with any portion of the diffusion barrier liner.

    摘要翻译： 提供了一种互连结构，其中在不引入互连结构内的气蚀特征的情况下，其电迁移阻力得到改善。 互连结构包括金属界面层，其至少水平存在于位于第二介电材料内的开口的底部，该第二电介质材料位于第一电介质材料的顶部，该第一介电材料包括嵌入其中的第一导电材料。 金属界面层不与嵌入在第一介电材料内的下面的导电材料形成合金。 在本发明的一些实施例中，金属界面层也存在于位于第一介电材料顶部的第二介电材料的暴露的侧壁上。 在金属界面层顶部存在扩散阻挡层。 在一些实施例中，扩散阻挡衬里包括金属氮化物的下层和金属的上层。 根据本发明，金属界面层也不与扩散阻挡衬里的任何部分形成合金。

    SEMICONDUCTOR WIRING STRUCTURES INCLUDING DIELECTRIC CAP WITHIN METAL CAP LAYER
    9.
    发明申请
    SEMICONDUCTOR WIRING STRUCTURES INCLUDING DIELECTRIC CAP WITHIN METAL CAP LAYER 有权
    半导体接线结构包括金属盖层中的电介质盖

    公开(公告)号：US20080308942A1

    公开(公告)日：2008-12-18

    申请号：US11761495

    申请日：2007-06-12

    申请人： Kaushik Chanda ,  Ronald G. Filippi ,  Ping-Chuan Wang ,  Chih-Chao Yang

    发明人： Kaushik Chanda ,  Ronald G. Filippi ,  Ping-Chuan Wang ,  Chih-Chao Yang

    IPC分类号： H01L23/52 ,  H01L21/4763

    CPC分类号： H01L23/53238 ,  H01L21/76834 ,  H01L21/76865 ,  H01L23/53223 ,  H01L23/53252 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Semiconductor wiring structures including a dielectric layer having a metal wiring line therein, a via extending downwardly from the metal wiring line, a metal cap layer over the metal wiring line, and a local dielectric cap positioned within a portion of the metal cap layer and in contact with the metal wiring line and a related method are disclosed. The local dielectric cap represents an intentionally created weak point in the metal wiring line of a dual-damascene interconnect, which induces electromigration (EM) voiding in the line, rather than at the bottom of a via extending downwardly from the metal wiring line. Since the critical void size in line fails, especially with metal cap layer (liner) redundancy, is much larger than that in via fails, the EM lifetime can be significantly increased.

    摘要翻译： 包括其中具有金属布线的电介质层，从金属布线向下延伸的孔，在金属布线上方的金属盖层和位于金属盖层的一部分内的局部电介质盖的半导体布线结构 公开了与金属布线的接触和相关方法。 局部电介质盖表示在双镶嵌互连的金属布线中有意创造的弱点，其在管线中引起电迁移（EM）空隙，而不是在从金属布线向下延伸的通孔的底部。 由于线路中的临界空隙尺寸失效，特别是金属盖层（衬垫）冗余度，远远大于通孔失效，所以EM寿命可以显着提高。