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公开(公告)号：US08930665B2
公开(公告)日：2015-01-06
申请号：US12251744
申请日：2008-10-15
申请人： Chih-Min Wang , Chao-ping Su , Shih-Jan Wei , Ming-Hong Huang
发明人： Chih-Min Wang , Chao-ping Su , Shih-Jan Wei , Ming-Hong Huang
CPC分类号： G06F1/3225 , G06F1/10 , G06F13/4234 , G06F2213/16
摘要： A data access system and a data access method achieving effects of power saving and access synchronization during data access are provided. The data access system includes a data processing unit, a bridge device and a memory device. The data processing unit sends an access request signal to initiate data access of at least one unit data. The access of unit data is completed within a plurality of clock cycles of a reference clock signal. The bridge device generates an access signal according to the access request signal, the reference clock signal and a leading time. A pulse of the access signal is determined by the leading time within the clock cycles. The memory device executes the access of the unit data according to the access signal.
摘要翻译： 提供了一种在数据访问期间实现节电和访问同步的数据访问系统和数据访问方法。 数据访问系统包括数据处理单元，桥接器件和存储器件。 数据处理单元发送访问请求信号以启动至少一个单元数据的数据访问。 单元数据的访问在参考时钟信号的多个时钟周期内完成。 桥接器件根据访问请求信号，参考时钟信号和引导时间生成访问信号。 接入信号的脉冲由时钟周期内的引导时间决定。 存储器件根据访问信号执行单元数据的访问。
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公开(公告)号：US20090100234A1
公开(公告)日：2009-04-16
申请号：US12251744
申请日：2008-10-15
申请人： Chih-Min Wang , Chao-Ping Su , Shih-Jan Wei , Ming-Hong Huang
发明人： Chih-Min Wang , Chao-Ping Su , Shih-Jan Wei , Ming-Hong Huang
CPC分类号： G06F1/3225 , G06F1/10 , G06F13/4234 , G06F2213/16
摘要： A data access system and a data access method achieving effects of power saving and access synchronization during data access are provided. The data access system includes a data processing unit, a bridge device and a memory device. The data processing unit sends an access request signal to initiate data access of at least one unit data. The access of unit data is completed within a plurality of clock cycles of a reference clock signal. The bridge device generates an access signal according to the access request signal, the reference clock signal and a leading time. A pulse of the access signal is determined by the leading time within the clock cycles. The memory device executes the access of the unit data according to the access signal.
摘要翻译： 提供了一种在数据访问期间实现节电和访问同步的数据访问系统和数据访问方法。 数据访问系统包括数据处理单元，桥接器件和存储器件。 数据处理单元发送访问请求信号以启动至少一个单元数据的数据访问。 单元数据的访问在参考时钟信号的多个时钟周期内完成。 桥接器件根据访问请求信号，参考时钟信号和引导时间生成访问信号。 接入信号的脉冲由时钟周期内的引导时间决定。 存储器件根据访问信号执行单元数据的访问。
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公开(公告)号：US08762683B2
公开(公告)日：2014-06-24
申请号：US12287961
申请日：2008-10-15
申请人： Chih-Min Wang , Chao-Ping Su , Yi-Lung Tsai , Ming-Hong Huang
发明人： Chih-Min Wang , Chao-Ping Su , Yi-Lung Tsai , Ming-Hong Huang
CPC分类号： G06F12/0284 , G06F12/109
摘要： An addressing device and method is provided to enable an electronic system having a less addressing capability to address a memory device having a larger storage space, thereby reducing the manufacture cost of the electronic system. The addressing device includes an address decoder and an address translator. The address decoder receives a first access address belonging to a smaller address space, and determines whether to map the first access address to the larger storage space of the memory device. The address translator is coupled to the address decoder. When the first access address is mapped to the storage space of the memory device, the address translator translates the first access address into a second access address of the larger storage space according to an adjustable base address.
摘要翻译： 提供了寻址装置和方法，以使具有较少寻址能力的电子系统能够寻址具有较大存储空间的存储器件，从而降低了电子系统的制造成本。 寻址装置包括地址解码器和地址转换器。 地址解码器接收属于较小地址空间的第一访问地址，并且确定是否将第一访问地址映射到存储设备的较大存储空间。 地址转换器耦合到地址解码器。 当第一访问地址被映射到存储设备的存储空间时，地址转换器根据可调基地址将第一访问地址转换为较大存储空间的第二访问地址。
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公开(公告)号：US20090100245A1
公开(公告)日：2009-04-16
申请号：US12287961
申请日：2008-10-15
申请人： Chih-Min Wang , Chao-Ping Su , Yi-Lung Tsai , Ming-Hong Huang
发明人： Chih-Min Wang , Chao-Ping Su , Yi-Lung Tsai , Ming-Hong Huang
CPC分类号： G06F12/0284 , G06F12/109
摘要： An addressing device and method is provided to enable an electronic system having a less addressing capability to address a memory device having a larger storage space, thereby reducing the manufacture cost of the electronic system. The addressing device includes an address decoder and an address translator. The address decoder receives a first access address belonging to a smaller address space, and determines whether to map the first access address to the larger storage space of the memory device. The address translator is coupled to the address decoder. When the first access address is mapped to the storage space of the memory device, the address translator translates the first access address into a second access address of the larger storage space according to an adjustable base address.
摘要翻译： 提供了寻址装置和方法，以使具有较少寻址能力的电子系统能够寻址具有较大存储空间的存储器件，从而降低了电子系统的制造成本。 寻址装置包括地址解码器和地址转换器。 地址解码器接收属于较小地址空间的第一访问地址，并且确定是否将第一访问地址映射到存储设备的较大存储空间。 地址转换器耦合到地址解码器。 当第一访问地址被映射到存储设备的存储空间时，地址转换器根据可调基地址将第一访问地址转换为较大存储空间的第二访问地址。
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5.发明申请公开(公告)号：US20130049720A1
公开(公告)日：2013-02-28
申请号：US13594130
申请日：2012-08-24
IPC分类号： G05F1/575
CPC分类号： H02M3/1588 , H02M2001/0025 , H02M2001/0032 , Y02B70/1466 , Y02B70/16
摘要： A voltage regulator controller is disclosed including: a reference voltage generator for generating a reference voltage; a comparison circuit, coupled with the reference voltage generator, for comparing the reference voltage with an output voltage of a voltage regulator; and a control circuit, coupled with the reference voltage generator and the comparison circuit, for controlling the reference voltage generator to stepwise lower the reference voltage when a power saving command is received by the voltage regulator controller.
摘要翻译： 公开了一种电压调节器控制器，包括：用于产生参考电压的参考电压发生器; 与参考电压发生器耦合的比较电路，用于将参考电压与电压调节器的输出电压进行比较; 以及与所述参考电压发生器和所述比较电路耦合的控制电路，用于当所述电压调节器控制器接收到省电命令时，控制所述参考电压发生器逐步降低所述参考电压。
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公开(公告)号：US07658551B1
公开(公告)日：2010-02-09
申请号：US12353794
申请日：2009-01-14
申请人： Chun-Hsiung Wu , Chih-Min Wang , Min-Chao Hsu , Jin Wu , Chia-Chu Lin
发明人： Chun-Hsiung Wu , Chih-Min Wang , Min-Chao Hsu , Jin Wu , Chia-Chu Lin
IPC分类号： G02B6/36
CPC分类号： G02B6/3887 , G02B6/3821
摘要： An optical fiber connector has a rear housing, a reinforcing sleeve and a front housing. The rear housing has a front end, a rear end, a top, a bottom, two opposite sides and two slits longitudinally defined respectively through the top and the bottom at the front end. The reinforcing sleeve is mounted in the rear housing. The front housing is mounted around and the rear housing from the front end of the rear housing and completely covers the slits of the rear housing. The optical fiber connector with the slits has high resistance to the external transverse pulling force and is excellently durable.
摘要翻译： 光纤连接器具有后壳体，加强套筒和前壳体。 后壳体具有分别穿过前端的顶部和底部纵向限定的前端，后端，顶部，底部，两个相对侧和两个狭缝。 加强套筒安装在后壳体中。 前壳体从后壳体的前端安装在后壳体上，并且完全覆盖后壳体的狭缝。 具有狭缝的光纤连接器对外部横向拉力具有很高的抵抗力，并且非常耐用。
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公开(公告)号：US08233531B2
公开(公告)日：2012-07-31
申请号：US12260594
申请日：2008-10-29
申请人： Hung-Kai Ting , Chih-Ta Chen , Weichun Tung , Chih-Min Wang
发明人： Hung-Kai Ting , Chih-Ta Chen , Weichun Tung , Chih-Min Wang
IPC分类号： H04N7/12
CPC分类号： H04N21/42607 , H04N21/4345 , H04N21/6336 , H04N21/8543
摘要： A processing method and a processing apparatus for a digital television are provided. A processing apparatus for a digital television (DTV) to process a DTV stream, comprising: a demultiplexing unit for retrieving a service information from the DTV stream; a memory coupled to the demultiplexing unit for storing the service information; a first processor coupled to the memory for assigning a task by sending a command according to the service information; a second processor coupled to the memory for processing the task according the command; a communication unit coupled to the first processor and the second processor, for receiving the command from the first processor and sending the command to the second processor; and at least one function module coupled to the first processor and the second processor, respectively, controlled by the first processor or the second processor, to process the service information.
摘要翻译： 提供了一种用于数字电视的处理方法和处理装置。 一种用于数字电视（DTV）处理DTV流的处理装置，包括：解复用单元，用于从DTV流中检索服务信息; 存储器，其耦合到所述解复用单元，用于存储所述服务信息; 第一处理器，其耦合到所述存储器，用于通过根据所述服务信息发送命令来分配任务; 耦合到所述存储器的第二处理器，用于根据所述命令处理所述任务; 耦合到第一处理器和第二处理器的通信单元，用于从第一处理器接收命令并将命令发送到第二处理器; 以及分别耦合到由第一处理器或第二处理器控制的第一处理器和第二处理器的至少一个功能模块来处理服务信息。
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8.发明授权公开(公告)号：US08742739B2
公开(公告)日：2014-06-03
申请号：US13594130
申请日：2012-08-24
IPC分类号： G05F1/40
CPC分类号： H02M3/1588 , H02M2001/0025 , H02M2001/0032 , Y02B70/1466 , Y02B70/16
摘要： A voltage regulator controller is disclosed including: a reference voltage generator for generating a reference voltage; a comparison circuit, coupled with the reference voltage generator, for comparing the reference voltage with an output voltage of a voltage regulator; and a control circuit, coupled with the reference voltage generator and the comparison circuit, for controlling the reference voltage generator to stepwise lower the reference voltage when a power saving command is received by the voltage regulator controller.
摘要翻译： 公开了一种电压调节器控制器，包括：用于产生参考电压的参考电压发生器; 与参考电压发生器耦合的比较电路，用于将参考电压与电压调节器的输出电压进行比较; 以及与所述参考电压发生器和所述比较电路耦合的控制电路，用于当所述电压调节器控制器接收到省电指令时，控制所述参考电压发生器逐步降低所述参考电压。
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公开(公告)号：US20090110057A1
公开(公告)日：2009-04-30
申请号：US12260594
申请日：2008-10-29
申请人： HUNG-KAI TING , Chih-Ta Chen , Weichun Tung , Chih-Min Wang
发明人： HUNG-KAI TING , Chih-Ta Chen , Weichun Tung , Chih-Min Wang
IPC分类号： H04N7/12
CPC分类号： H04N21/42607 , H04N21/4345 , H04N21/6336 , H04N21/8543
摘要： A processing method and a processing apparatus for a digital television are provided. A processing apparatus for a digital television (DTV) to process a DTV stream, comprising: a demultiplexing unit for retrieving a service information from the DTV stream; a memory coupled to the demultiplexing unit for storing the service information; a first processor coupled to the memory for assigning a task by sending a command according to the service information; a second processor coupled to the memory for processing the task according the command; a communication unit coupled to the first processor and the second processor, for receiving the command from the first processor and sending the command to the second processor; and at least one function module coupled to the first processor and the second processor, respectively, controlled by the first processor or the second processor, to process the service information.
摘要翻译： 提供了一种用于数字电视的处理方法和处理装置。 一种用于数字电视（DTV）处理DTV流的处理装置，包括：解复用单元，用于从DTV流中检索服务信息; 存储器，其耦合到所述解复用单元，用于存储所述服务信息; 第一处理器，其耦合到所述存储器，用于通过根据所述服务信息发送命令来分配任务; 耦合到所述存储器的第二处理器，用于根据所述命令处理所述任务; 耦合到第一处理器和第二处理器的通信单元，用于从第一处理器接收命令并将命令发送到第二处理器; 以及分别耦合到由第一处理器或第二处理器控制的第一处理器和第二处理器的至少一个功能模块来处理服务信息。
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