公开(公告)号：US06635565B2

公开(公告)日：2003-10-21

申请号：US09789357

申请日：2001-02-20

申请人： Chih-Ning Wu ,  Chan-Lon Yang ,  Sun-Chieh Chien

发明人： Chih-Ning Wu ,  Chan-Lon Yang ,  Sun-Chieh Chien

IPC分类号： H01L214763

CPC分类号： H01L21/02074 ,  C23F1/30 ,  H01L21/02063 ,  H01L21/3212 ,  H01L21/76807 ,  H01L21/76814

摘要： A method of cleaning a dual damascene structure includes forming a first conductive layer in a substrate. A dielectric layer is formed over the substrate. A dual damascene opening is formed in the dielectric layer to expose the first conductive layer. A H2O2 based aqueous solution is used to remove polymer residues in the dual damascene opening. A temperature of the H2O2 based aqueous solution is controlled so that the first conductive layer is not corroded. A diluted HF solution or a diluted HF and HCl solution is used to remove the polymer residues. A second conductive layer is formed over the substrate to fill the dual damascene opening. A chemical mechanical polishing process is performed with the dielectric layer serving as a polishing stop to remove the second conductive layer outside the dual damascene opening. A H2O2 based aqueous solution is used to clean the hydrocarbon particulates from the chemical mechanically polishing step. A diluted HF solution or a diluted HF and HCl solution is used to remove the slurry residues, such as silicon oxide of the slurry, from the chemical mechanical polishing step.

公开(公告)号：US06453915B1

公开(公告)日：2002-09-24

申请号：US09607022

申请日：2000-06-29

申请人： Chih-Ning Wu ,  Chan-Lon Yang

发明人： Chih-Ning Wu ,  Chan-Lon Yang

IPC分类号： H01L21302

CPC分类号： H01L21/02071 ,  H01L21/28061

摘要： A method of cleaning polycide gates after an etching step. A gate oxide layer, a polysilicon layer, a titanium nitride layer, a silicide layer, an anti-reflection layer and a patterned photoresist layer are sequentially formed over a substrate. An etching operation is next carried out to form a gate structure. The gate structure is formed by patterning the polysilicon layer, the titanium nitride layer and the silicide layer. The gate structure is subsequently cleaned in a three-step cleaning operation. In the first cleaning step, minute amount of fluoride-containing compound, hydrogen and inert gas are used as gaseous reactants in a plasma-cleaning operation. The fluoride-containing compound is capable of initiating a free radical chain reaction. In the second cleaning step, a solvent containing ammonium ions is applied to the gate structure. In the third cleaning step, a solution formed by dissolving oxidizing agent in de-ionized water is applied.

摘要翻译： 在蚀刻步骤之后清洁多晶硅栅极的方法。 在衬底上顺序地形成栅氧化层，多晶硅层，氮化钛层，硅化物层，抗反射层和图案化光致抗蚀剂层。 接下来进行蚀刻操作以形成栅极结构。 栅极结构通过图案化多晶硅层，氮化钛层和硅化物层而形成。 随后在三步清洁操作中清洁门结构。 在第一清洗步骤中，在等离子体清洗操作中，使用微量的含氟化合物，氢气和惰性气体作为气态反应物。 含氟化合物能够引发自由基链反应。 在第二清洗步骤中，将含有铵离子的溶剂施加到栅极结构。 在第三清洗工序中，涂布通过将氧化剂溶解在去离子水中形成的溶液。

公开(公告)号：US06440873B1

公开(公告)日：2002-08-27

申请号：US09792952

申请日：2001-02-26

申请人： Chih-Ning Wu ,  Chan-Lon Yang

发明人： Chih-Ning Wu ,  Chan-Lon Yang

IPC分类号： H01L2100

CPC分类号： H01L21/02071 ,  C23G5/028

摘要： A post metal etch cleaning method which begins by providing a wafer with an etched metal layer formed thereon, wherein the etched metal layer is covered with a polymer residue. A fluorine based organic acid solvent is used to clean the metal layer, followed by removing the solvent by a physical method. Next, a de-ionized water is applied to flush the metal layer before performing a drying step on the wafer to dry the metal layer.

摘要翻译： 一种后金属蚀刻清洁方法，其通过为晶片上形成有蚀刻的金属层开始，其中蚀刻的金属层被聚合物残余物覆盖。 使用氟类有机酸溶剂清洗金属层，然后用物理方法除去溶剂。 接下来，在对晶片进行干燥步骤之前，施加去离子水以冲洗金属层以干燥金属层。

公开(公告)号：US06554002B2

公开(公告)日：2003-04-29

申请号：US09789349

申请日：2001-02-21

申请人： Chih-Ning Wu ,  Cheng-Yuan Tsai ,  Chan-Lon Yang

发明人： Chih-Ning Wu ,  Cheng-Yuan Tsai ,  Chan-Lon Yang

IPC分类号： H01L21302

CPC分类号： H01L21/31111 ,  H01L21/31116 ,  H01L21/76807

摘要： A method for removing fluorine-containing etching residues during dual damascene process comprises providing a dual damascene structure having a copper conductor structure therein, a cap layer formed on the copper conductor structure and the dual damascene structure, and a low dielectric constant dielectric layer on the cap layer. The low dielectric constant dielectric layer formed by spin-on polymer method has at least an opening above the copper conductor structure. The cap layer is etched by fluorine-containing plasma to expose the copper conductor structure. The dual damascene structure is cleaned with a solvent and then the fluorine-containing etching residues are removed by plasma sputtering treatment or baking, or by a combination of both. The addition of baking and plasma sputtering treatment can prevent poor adhesion between the subsequent metal diffusion barrier layer and the low dielectric constant dielectric layer.

摘要翻译： 一种在双镶嵌工艺中去除含氟蚀刻残留物的方法包括提供一种其中具有铜导体结构的双镶嵌结构，在铜导体结构上形成的盖层和双镶嵌结构，以及在其上的低介电常数介电层 盖层。 通过旋涂聚合物方法形成的低介电常数介电层在铜导体结构之上至少有一个开口。 盖层被含氟等离子体蚀刻以暴露铜导体结构。 双重镶嵌结构用溶剂清洗，然后通过等离子体溅射处理或烘烤除去含氟蚀刻残渣，或通过两者的组合。 添加烘烤和等离子体溅射处理可以防止后续金属扩散阻挡层和低介电常数介电层之间的粘附性差。

公开(公告)号：US06495472B2

公开(公告)日：2002-12-17

申请号：US09791027

申请日：2001-02-21

申请人： Chih-Ning Wu ,  Chan-Lon Yang

发明人： Chih-Ning Wu ,  Chan-Lon Yang

IPC分类号： H01L21302

CPC分类号： H01L21/76838 ,  H01L21/31116

摘要： A method for avoiding erosion of a conductor structure during a procedure of removing etching residues is provided. The method provides a semiconductor structure and the conductor structure formed therein. A cap layer is formed on the conductor structure and the semiconductor and a dielectric layer formed thereon. The dielectric layer and the cap layer are then etched to partially expose the conductor structure. The etching residues are removed with an amine-containing solution and the amine-containing solution is removed with an intermediate solvent to avoid erosion of the exposed conductor structure. As a key step of the present invention, the intermediate solvent comprises N-methylpyrrolidone or isopropyl alcohol and can protect the conductor structure from erosion.

摘要翻译： 提供了一种在去除蚀刻残留物的过程中避免导体结构侵蚀的方法。 该方法提供半导体结构和其中形成的导体结构。 在导体结构和半导体上形成覆盖层和形成在其上的电介质层。 然后对介电层和盖层进行蚀刻以部分地暴露导体结构。 蚀刻残余物用含胺溶液除去，并且用中间体溶剂除去含胺溶液以避免暴露的导体结构的侵蚀。 作为本发明的关键步骤，中间体溶剂包括N-甲基吡咯烷酮或异丙醇，并且可以保护导体结构免受侵蚀。

公开(公告)号：US06303482B1

公开(公告)日：2001-10-16

申请号：US09597762

申请日：2000-06-19

申请人： Chih-Ning Wu ,  Chan-Lon Yang

发明人： Chih-Ning Wu ,  Chan-Lon Yang

IPC分类号： H01L213205

CPC分类号： H01L21/02071 ,  H01L21/02052 ,  H01L21/31138 ,  H01L21/32137

摘要： A method for cleaning the surface of a semiconductor wafer is disclosed. A plasma ashing process is performed on the surface of the semiconductor wafer. The plasma ashing process is performed in a chamber that contains oxygen and carbon tetrafluoride (CF4). An ozone-containing deionized (DI) water cleaning procedure, an amine-based solvent cleaning procedure and a fluoride-based solvent cleaning procedure are then performed to clean the surface of the semiconductor wafer without over-etching the silicon oxide of the street. Finally, an oxygen plasma cleaning process is performed to remove any residual photo-resist.

摘要翻译： 公开了一种用于清洁半导体晶片表面的方法。 在半导体晶片的表面上进行等离子体灰化处理。 等离子体灰化过程在包含氧和四氟化碳（CF4）的室中进行。 然后执行含臭氧的去离子水（DI）水清洗程序，胺基溶剂清洗程序和基于氟化物的溶剂清洗程序，以清洁半导体晶片的表面，而不会过度蚀刻街道的氧化硅。 最后，进行氧等离子体清洁处理以除去任何残留的光刻胶。

公开(公告)号：US20070072378A1

公开(公告)日：2007-03-29

申请号：US11463299

申请日：2006-08-08

申请人： Chih-Ning Wu ,  Chung - Ju Lee ,  Wei-Tsun Shiau

发明人： Chih-Ning Wu ,  Chung - Ju Lee ,  Wei-Tsun Shiau

IPC分类号： H01L21/336 ,  H01L21/4763

CPC分类号： H01L29/665 ,  H01L21/28518 ,  H01L29/6653 ,  H01L29/6659 ,  H01L29/7843

摘要： A method of manufacturing a metal-oxide-semiconductor transistor device is disclosed. In the method, a silicon nitride spacer is formed and will be removed after an ion implantation process used to form a source/drain region and a salicide process used to form a metal silicide layer on the surface of the source/drain region and the gate electrode. The metal silicide layer is formed to comprise silicon (Si), nickel (Ni) and at least one metal selected from a group consisting of iridium (Ir), iron (Fe), cobalt (Co), platinum (Pt), palladium (Pd), molybdenum (Mo), and tantalum (Ta); therefore, when the silicon nitride spacer is removed by etching, the metal silicide layer is not damaged.

摘要翻译： 公开了一种制造金属氧化物半导体晶体管器件的方法。 在该方法中，形成氮化硅间隔物，并且在用于形成源极/漏极区域的离子注入工艺和用于在源极/漏极区域和栅极的表面上形成金属硅化物层的自对准硅化物工艺之后将被去除 电极。 金属硅化物层形成为包括硅（Si），镍（Ni）和选自铱（Ir），铁（Fe），钴（Co），铂（Pt），钯（ Pd），钼（Mo）和钽（Ta）; 因此，当通过蚀刻除去氮化硅间隔物时，金属硅化物层不被损坏。

公开(公告)号：US20070054447A1

公开(公告)日：2007-03-08

申请号：US11221487

申请日：2005-09-07

申请人： Hsin Tai ,  Chung-Ju Lee ,  Chih-Ning Wu

发明人： Hsin Tai ,  Chung-Ju Lee ,  Chih-Ning Wu

IPC分类号： H01L21/8234 ,  H01L21/302 ,  H01L21/3205 ,  H01L21/336

CPC分类号： H01L29/6656 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7834

摘要： A multi-step etching method is provided. First, a substrate including a gate over the substrate and a spacer over the gate is provided. Then, an anisotropic etching step is performed for etching a first region and a second region in the substrate at two sides of the gate. Thereafter, an isotropic etching step is performed for etching a first external region under the spacer and adjacent to the first region, and etching a second external region under the spacer and adjacent to the second region. Then, a filling step is performed for filling a material into the first region, the first external region, the second region and the second external region.

摘要翻译： 提供了多步蚀刻方法。 首先，提供包括在衬底上的栅极和栅极上的间隔物的衬底。 然后，进行各向异性蚀刻步骤，以蚀刻栅极两侧的基板中的第一区域和第二区域。 此后，进行各向同性蚀刻步骤，用于蚀刻间隔物下方的第一外部区域并与第一区域相邻，并且蚀刻间隔物下方的第二外部区域并与第二区域相邻。 然后，进行用于将材料填充到第一区域，第一外部区域，第二区域和第二外部区域中的填充步骤。

公开(公告)号：US20050239285A1

公开(公告)日：2005-10-27

申请号：US10709278

申请日：2004-04-26

申请人： Wen-Liang Lien ,  Charlie CJ Lee ,  Chih-Ning Wu ,  Jain-Hon Chen

发明人： Wen-Liang Lien ,  Charlie CJ Lee ,  Chih-Ning Wu ,  Jain-Hon Chen

IPC分类号： H01L21/4763 ,  H01L21/768

CPC分类号： H01L21/76811 ,  H01L21/76813

摘要： A method for avoiding resist poisoning during a damascene process is disclosed. A semiconductor substrate is provided with a low-k dielectric layer (k≦2.9) thereon, a SiC layer over the low-k dielectric layer, and a blocking layer over the SiC layer. The blocking layer is used to prevent unpolymerized precursors diffused out from the low-k dielectric layer from contacting an overlying resist. A bottom anti-reflection coating (BARC) layer is formed on the blocking layer. A resist layer is formed on the BARC layer, the resist layer having an opening to expose a portion of the BARC layer. A damascene structure is formed in the low-k dielectric layer by etching the BARC layer, the blocking layer, the SiC layer, and the low-k dielectric layer through the opening.

摘要翻译： 公开了一种在大马士革过程中避免抗蚀剂中毒的方法。 在半导体衬底上设置有低k电介质层（k <= 2.9），在低k电介质层上的SiC层和在SiC层上的阻挡层。 阻挡层用于防止从低k电介质层扩散的未聚合的前体与上覆抗蚀剂接触。 在阻挡层上形成底部防反射涂层（BARC）层。 在BARC层上形成抗蚀剂层，抗蚀剂层具有露出BARC层的一部分的开口。 通过开口蚀刻BARC层，阻挡层，SiC层和低k电介质层，在低k电介质层中形成镶嵌结构。

公开(公告)号：US06794292B2

公开(公告)日：2004-09-21

申请号：US09682054

申请日：2001-07-16

申请人： Chih-Ning Wu

发明人： Chih-Ning Wu

IPC分类号： H01L21302

CPC分类号： H01L21/02063 ,  C23G1/00 ,  H01L21/32134 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/76838

摘要： An extrusion-free wet cleaning process for post-etch Cu-dual damascene structures is developed. The process includes the following steps: (1). providing a wafer having a silicon substrate and at least one post-etch Cu-dual damascene structure, the post-etch Cu-dual damascene structure having a via structure exposing a portion of a Cu wiring line electrically connected with an N+ diffusion region of the silicon substrate, and a trench structure formed on the via structure; (2). applying a diluted H2O2 solution on the wafer to slightly oxidize the surface of the exposed Cu wiring line; (3). washing away cupric oxide generated in the oxidation step by means of an acidic cupric oxide cleaning solution containing diluted HF, NH4F or NH2OH; and (4). providing means for preventing Cu reduction reactions on the Cu wiring line.

摘要翻译： 开发了一种用于后蚀刻铜双镶嵌结构的无挤出湿法清洗工艺。 该过程包括以下步骤：（1）。 提供具有硅衬底和至少一个后蚀刻Cu-双镶嵌结构的晶片，所述后蚀刻Cu-双镶嵌结构具有通孔结构，其暴露与N +扩散电连接的Cu布线的一部分 硅衬底的区域和形成在通孔结构上的沟槽结构; （2）。 将稀释的H 2 O 2溶液施加在晶片上以稍微氧化暴露的Cu布线的表面; （3）。 通过含有稀释的HF，NH4F或NH2OH的酸性氧化铜清洗溶液洗涤在氧化步骤中产生的氧化铜; 和（4）。 提供了防止Cu布线上的Cu还原反应的手段。