公开(公告)号：US20120056295A1

公开(公告)日：2012-03-08

申请号：US13294945

申请日：2011-11-11

申请人： CHIH-PING LIN ,  Pi-Kuang Chuang ,  Hung-Li Chang ,  Shih-Ming Chen ,  Hsiao-Ying Yang

发明人： CHIH-PING LIN ,  Pi-Kuang Chuang ,  Hung-Li Chang ,  Shih-Ming Chen ,  Hsiao-Ying Yang

IPC分类号： H01L27/06

CPC分类号： H01L21/823481 ,  H01L21/823412 ,  H01L21/823493 ,  H01L21/823807 ,  H01L21/823878 ,  H01L21/823892

摘要： A method for fabricating a semiconductor device is provided. A substrate comprising a P-well is provided. A low voltage device area and a high voltage device area are defined in the P-well. A photoresist layer is formed on the substrate. A photomask comprising a shielding region is provided. The shielding region is corresponded to the high voltage device area. A pattern of the photomask is transferred to the photoresist layer on the substrate by a photolithography process using the photomask. A P-type ion field is formed outside of the high-voltage device area by selectively doping P-type ions into the substrate using the photoresist layer as a mask.

摘要翻译： 提供一种制造半导体器件的方法。 提供了包括P阱的衬底。 在P井中定义了低压装置区域和高压装置区域。 在基板上形成光致抗蚀剂层。 提供了包括屏蔽区域的光掩模。 屏蔽区域对应于高电压设备区域。 通过使用光掩模的光刻工艺将光掩模的图案转移到基板上的光致抗蚀剂层。 通过使用光致抗蚀剂层作为掩模，通过将P型离子选择性地掺杂到衬底中，在高电压器件区域的外部形成P型离子场。

公开(公告)号：US20090236665A1

公开(公告)日：2009-09-24

申请号：US12177766

申请日：2008-07-22

申请人： Chih-Ping Lin ,  Pi-Kuang Chuang ,  Hung-Li Chang ,  Shih-Ming Chen ,  Hsiao-Ying Yang ,  Ya-Sheng Liu

发明人： Chih-Ping Lin ,  Pi-Kuang Chuang ,  Hung-Li Chang ,  Shih-Ming Chen ,  Hsiao-Ying Yang ,  Ya-Sheng Liu

IPC分类号： H01L21/336 ,  H01L29/78 ,  H01L21/027

CPC分类号： H01L29/7836 ,  H01L29/0653

摘要： A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a semiconductor substrate which comprise a first type well and a second type well, and a plurality of junction regions therebetween, wherein each of the junction regions adjoins the first and the second type wells. A gate electrode disposed on the semiconductor substrate and overlies at least two of the junction regions. A source and a drain are in the semiconductor substrate oppositely adjacent to the gate electrode.

摘要翻译： 提供半导体器件及其制造方法。 半导体器件包括半导体衬底，其包括第一类型阱和第二类型阱以及它们之间的多个结区域，其中每个连接区域邻接第一和第二类型阱。 栅电极，设置在半导体衬底上并覆盖至少两个接合区域。 源极和漏极在与栅电极相对的半导体衬底中。

公开(公告)号：US20110062500A1

公开(公告)日：2011-03-17

申请号：US12953347

申请日：2010-11-23

申请人： Chih-Ping Lin ,  Pi-Kuang Chuang ,  Hung-Li Chang ,  Shih-Ming Chen ,  Hsiao-Ying Yang ,  Ya-Sheng Liu

发明人： Chih-Ping Lin ,  Pi-Kuang Chuang ,  Hung-Li Chang ,  Shih-Ming Chen ,  Hsiao-Ying Yang ,  Ya-Sheng Liu

IPC分类号： H01L29/80

CPC分类号： H01L29/7836 ,  H01L29/0653

摘要： A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a semiconductor substrate which comprise a first type well and a second type well, and a plurality of junction regions therebetween, wherein each of the junction regions adjoins the first and the second type wells. A gate electrode disposed on the semiconductor substrate and overlies at least two of the junction regions. A source and a drain are in the semiconductor substrate oppositely adjacent to the gate electrode.

摘要翻译： 提供半导体器件及其制造方法。 半导体器件包括半导体衬底，其包括第一类型阱和第二类型阱以及它们之间的多个结区域，其中每个连接区域邻接第一和第二类型阱。 栅电极，设置在半导体衬底上并覆盖至少两个接合区域。 源极和漏极在与栅电极相对的半导体衬底中。

公开(公告)号：US20090236681A1

公开(公告)日：2009-09-24

申请号：US12177779

申请日：2008-07-22

申请人： Chih-Ping Lin ,  Pi-Kuang Chuang ,  Hung-Li Chang ,  Shih-Ming Chen ,  Hsiao-Ying Yang

发明人： Chih-Ping Lin ,  Pi-Kuang Chuang ,  Hung-Li Chang ,  Shih-Ming Chen ,  Hsiao-Ying Yang

IPC分类号： H01L29/00 ,  H01L21/76

CPC分类号： H01L21/823481 ,  H01L21/823412 ,  H01L21/823493 ,  H01L21/823807 ,  H01L21/823878 ,  H01L21/823892

摘要： A method for fabricating a semiconductor device is provided. A substrate comprising a P-well is provided. A low voltage device area and a high voltage device area are defined in the P-well. A photoresist layer is formed on the substrate. A photomask comprising a shielding region is provided. The shielding region is corresponded to the high voltage device area. A pattern of the photomask is transferred to the photoresist layer on the substrate by a photolithography process using the photomask. A P-type ion field is formed outside of the high-voltage device area by selectively doping P-type ions into the substrate using the photoresist layer as a mask.

摘要翻译： 提供一种制造半导体器件的方法。 提供了包括P阱的衬底。 在P井中定义了低压装置区域和高压装置区域。 在基板上形成光致抗蚀剂层。 提供了包括屏蔽区域的光掩模。 屏蔽区域对应于高电压设备区域。 通过使用光掩模的光刻工艺将光掩模的图案转移到基板上的光致抗蚀剂层。 通过使用光致抗蚀剂层作为掩模，通过将P型离子选择性地掺杂到衬底中，在高电压器件区域的外部形成P型离子场。

公开(公告)号：US09219012B2

公开(公告)日：2015-12-22

申请号：US13294945

申请日：2011-11-11

申请人： Chih-Ping Lin ,  Pi-Kuang Chuang ,  Hung-Li Chang ,  Shih-Ming Chen ,  Hsiao-Ying Yang

发明人： Chih-Ping Lin ,  Pi-Kuang Chuang ,  Hung-Li Chang ,  Shih-Ming Chen ,  Hsiao-Ying Yang

IPC分类号： H01L29/00 ,  H01L21/8234 ,  H01L21/8238

CPC分类号： H01L21/823481 ,  H01L21/823412 ,  H01L21/823493 ,  H01L21/823807 ,  H01L21/823878 ,  H01L21/823892

摘要： A method for fabricating a semiconductor device is provided. A substrate comprising a P-well is provided. A low voltage device area and a high voltage device area are defined in the P-well. A photoresist layer is formed on the substrate. A photomask comprising a shielding region is provided. The shielding region is corresponded to the high voltage device area. A pattern of the photomask is transferred to the photoresist layer on the substrate by a photolithography process using the photomask. A P-type ion field is formed outside of the high-voltage device area by selectively doping P-type ions into the substrate using the photoresist layer as a mask.

摘要翻译： 提供一种制造半导体器件的方法。 提供了包括P阱的衬底。 在P井中定义了低压装置区域和高压装置区域。 在基板上形成光致抗蚀剂层。 提供了包括屏蔽区域的光掩模。 屏蔽区域对应于高电压设备区域。 通过使用光掩模的光刻工艺将光掩模的图案转移到基板上的光致抗蚀剂层。 通过使用光致抗蚀剂层作为掩模，通过将P型离子选择性地掺杂到衬底中，在高电压器件区域的外部形成P型离子场。

公开(公告)号：US08080455B2

公开(公告)日：2011-12-20

申请号：US12177779

申请日：2008-07-22

申请人： Chih-Ping Lin ,  Pi-Kuang Chuang ,  Hung-Li Chang ,  Shih-Ming Chen ,  Hsiao-Ying Yang

发明人： Chih-Ping Lin ,  Pi-Kuang Chuang ,  Hung-Li Chang ,  Shih-Ming Chen ,  Hsiao-Ying Yang

IPC分类号： H01L21/8238

CPC分类号： H01L21/823481 ,  H01L21/823412 ,  H01L21/823493 ,  H01L21/823807 ,  H01L21/823878 ,  H01L21/823892

摘要： A method for fabricating a semiconductor device is provided. A substrate comprising a P-well is provided. A low voltage device area and a high voltage device area are defined in the P-well. A photoresist layer is formed on the substrate. A photomask comprising a shielding region is provided. The shielding region is corresponded to the high voltage device area. A pattern of the photomask is transferred to the photoresist layer on the substrate by a photolithography process using the photomask. A P-type ion field is formed outside of the high-voltage device area by selectively doping P-type ions into the substrate using the photoresist layer as a mask.

摘要翻译： 提供一种制造半导体器件的方法。 提供了包括P阱的衬底。 在P井中定义了低压装置区域和高压装置区域。 在基板上形成光致抗蚀剂层。 提供了包括屏蔽区域的光掩模。 屏蔽区域对应于高电压设备区域。 通过使用光掩模的光刻工艺将光掩模的图案转移到基板上的光致抗蚀剂层。 通过使用光致抗蚀剂层作为掩模，通过将P型离子选择性地掺杂到衬底中，在高电压器件区域的外部形成P型离子场。

公开(公告)号：US08063439B2

公开(公告)日：2011-11-22

申请号：US12953347

申请日：2010-11-23

申请人： Chih-Ping Lin ,  Pi-Kuang Chuang ,  Hung-Li Chang ,  Shih-Ming Chen ,  Hsiao-Ying Yang ,  Ya-Sheng Liu

发明人： Chih-Ping Lin ,  Pi-Kuang Chuang ,  Hung-Li Chang ,  Shih-Ming Chen ,  Hsiao-Ying Yang ,  Ya-Sheng Liu

IPC分类号： H01L29/80

CPC分类号： H01L29/7836 ,  H01L29/0653

摘要： A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a semiconductor substrate which comprise a first type well and a second type well, and a plurality of junction regions therebetween, wherein each of the junction regions adjoins the first and the second type wells. A gate electrode disposed on the semiconductor substrate and overlies at least two of the junction regions. A source and a drain are in the semiconductor substrate oppositely adjacent to the gate electrode.

公开(公告)号：US07863147B2

公开(公告)日：2011-01-04

申请号：US12177766

申请日：2008-07-22

申请人： Chih-Ping Lin ,  Pi-Kuang Chuang ,  Hung-Li Chang ,  Shih-Ming Chen ,  Hsiao-Ying Yang ,  Ya-Sheng Liu

发明人： Chih-Ping Lin ,  Pi-Kuang Chuang ,  Hung-Li Chang ,  Shih-Ming Chen ,  Hsiao-Ying Yang ,  Ya-Sheng Liu

IPC分类号： H01L21/00

CPC分类号： H01L29/7836 ,  H01L29/0653

摘要： A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a semiconductor substrate which comprise a first type well and a second type well, and a plurality of junction regions therebetween, wherein each of the junction regions adjoins the first and the second type wells. A gate electrode disposed on the semiconductor substrate and overlies at least two of the junction regions. A source and a drain are in the semiconductor substrate oppositely adjacent to the gate electrode.

摘要翻译： 提供半导体器件及其制造方法。 半导体器件包括半导体衬底，其包括第一类型阱和第二类型阱以及它们之间的多个结区域，其中每个连接区域邻接第一和第二类型阱。 栅电极，设置在半导体衬底上并覆盖至少两个接合区域。 源极和漏极在与栅电极相对的半导体衬底中。

公开(公告)号：US20100181639A1

公开(公告)日：2010-07-22

申请号：US12356036

申请日：2009-01-19

申请人： Wei-Tsung Huang ,  Pi-Kuang Chuang ,  Shih-Ming Chen ,  Hsiao-Ying Yang

发明人： Wei-Tsung Huang ,  Pi-Kuang Chuang ,  Shih-Ming Chen ,  Hsiao-Ying Yang

IPC分类号： H01L23/58 ,  H01L21/76

CPC分类号： H01L21/763 ,  H01L21/823481 ,  H01L21/823878

摘要： A semiconductor device is provided. The semiconductor device comprises an epitaxial layer disposed on a semiconductor substrate, a plurality of electronic devices disposed on the epitaxial layer and a trench isolation structure disposed between the electric devices. The trench isolation structure comprises a trench in the epitaxial layer and the semiconductor substrate, an oxide liner on the sidewall and bottom of the trench, and a doped polysilicon layer filled in the trench. Moreover, a zero bias voltage can be applied to the doped polysilicon layer. The trench isolation structure can be used for isolating electronic devices having different operation voltages or high-voltage devices.

摘要翻译： 提供半导体器件。 半导体器件包括设置在半导体衬底上的外延层，设置在外延层上的多个电子器件和设置在电气器件之间的沟槽隔离结构。 沟槽隔离结构包括在外延层和半导体衬底中的沟槽，沟槽的侧壁和底部上的氧化物衬垫以及填充在沟槽中的掺杂多晶硅层。 此外，零偏压可以施加到掺杂多晶硅层。 沟槽隔离结构可以用于隔离具有不同操作电压的电子器件或高压器件。

公开(公告)号：US08067283B2

公开(公告)日：2011-11-29

申请号：US12618585

申请日：2009-11-13

申请人： Chih-Ping Lin ,  Shih-Ming Chen ,  Hsiao-Ying Yang ,  Wen-Hsien Liu ,  Po-Sheng Hu

发明人： Chih-Ping Lin ,  Shih-Ming Chen ,  Hsiao-Ying Yang ,  Wen-Hsien Liu ,  Po-Sheng Hu

IPC分类号： H01L21/8238

CPC分类号： H01L21/823462

摘要： A semiconductor device fabricating method is described. The semiconductor device fabricating method includes providing a substrate. A first gate insulating layer and a second gate insulating layer are formed on the substrate, respectively. A gate layer is blanketly formed. A portion of the gate layer, the first gate insulating layer and the second gate insulating layer are removed to form a first gate, a remaining first gate insulating layer, a second gate and a remaining second gate insulating layer. The remaining first gate insulating layer not covered by the first gate has a first thickness, and the remaining second gate insulating layer not covered by the second gate has a second thickness, wherein a ratio between the first thickness and the second thickness is about 10 to 20. A pair of first spacers and a pair of second spacers are formed on sidewalls of the first gate and the second gate, respectively.

摘要翻译： 描述半导体器件制造方法。 半导体器件制造方法包括提供基板。 分别在基板上形成第一栅极绝缘层和第二栅极绝缘层。 门层完全形成。 去除栅极层，第一栅极绝缘层和第二栅极绝缘层的一部分以形成第一栅极，剩余的第一栅极绝缘层，第二栅极和剩余的第二栅极绝缘层。 未被第一栅极覆盖的剩余的第一栅极绝缘层具有第一厚度，并且未被第二栅极覆盖的剩余的第二栅极绝缘层具有第二厚度，其中第一厚度和第二厚度之间的比率为约10度 分别在第一栅极和第二栅极的侧壁上形成一对第一间隔物和一对第二间隔物。