摘要:
A method of communication handover from a first communication entity (33) to a second communication entity (43) in a communication system (10) where a communication unit (80), communicating with a transceiver (23) associated with the second communication entity, is linked to the first communication entity. The invention provides for establishing a communication link between the communication unit and the second communication entity while maintaining a communication link between the communication unit and the first communication entitiy. Then, communications are substantially simultaneously transfered to the second communication entity while terminated from the first communication entity.
摘要:
A plasma display filter includes five metallic layers, such as silver alloy layers, having a combined thickness that exceeds 50 nm. The metallic layers form an alternating pattern with dielectric layers, where the layer in the pattern closest to a supporting substrate is the first of the dielectric layers. Layer thicknesses are selected to achieve a low reflected color shift with changes in the viewing angle, relatively neutral transmitted color properties, and desirable shielding characteristics with respect to infrared and electromagnetic radiation.
摘要:
A solar cell includes a first electrode located over a substrate, at least one p-type semiconductor absorber layer located over the first electrode, the p-type semiconductor absorber layer comprising a copper indium selenide (CIS) based alloy material, an n-type semiconductor layer located over the p-type semiconductor absorber layer, an insulating aluminum zinc oxide layer located over the n-type semiconductor layer, the insulating aluminum zinc oxide having an aluminum content of 100 ppm to 5000 ppm and a second electrode over the insulating aluminum layer, the second electrode being transparent and electrically conductive. The insulating aluminum zinc oxide having an aluminum content of 100 ppm to 5000 ppm, may be deposited by pulsed DC, non-pulsed DC, or AC sputtering from an aluminum doped zinc oxide having an aluminum content of 100 ppm to 5000 ppm.
摘要:
A solar cell includes a substrate, a protective layer located over a first surface of the substrate, a first electrode located over a second surface of the substrate, at least one p-type semiconductor absorber layer located over the first electrode, an n-type semiconductor layer located over the p-type semiconductor absorber layer, and a second electrode over the n-type semiconductor layer. The p-type semiconductor absorber layer includes a copper indium selenide (CIS) based alloy material, and the second electrode is transparent and electrically conductive. The protective layer has an emissivity greater than 0.25 at a wavelength of 2 μm, has a reactivity with a selenium-containing gas lower than that of the substrate, and may differ from the first electrode in at least one of composition, thickness, density, emissivity, conductivity or stress state. The emissivity profile of the protective layer may be uniform or non-uniform.
摘要:
A solar cell includes a first electrode located over a substrate, at least one p-type semiconductor absorber layer located over the first electrode, the p-type semiconductor absorber layer comprising a copper indium selenide (CIS) based alloy material, an n-type semiconductor layer located over the p-type semiconductor absorber layer, an insulating aluminum zinc oxide layer located over the n-type semiconductor layer, the insulating aluminum zinc oxide having an aluminum content of 100 ppm to 5000 ppm and a second electrode over the insulating aluminum layer, the second electrode being transparent and electrically conductive. The insulating aluminum zinc oxide having an aluminum content of 100 ppm to 5000 ppm, may be deposited by pulsed DC, non-pulsed DC, or AC sputtering from an aluminum doped zinc oxide having an aluminum content of 100 ppm to 5000 ppm.
摘要:
A solar cell includes a substrate, a protective layer located over a first surface of the substrate, a first electrode located over a second surface of the substrate, at least one p-type semiconductor absorber layer located over the first electrode, an n-type semiconductor layer located over the p-type semiconductor absorber layer, and a second electrode over the n-type semiconductor layer. The p-type semiconductor absorber layer includes a copper indium selenide (CIS) based alloy material, and the second electrode is transparent and electrically conductive. The protective layer has an emissivity greater than 0.25 at a wavelength of 2 μm, has a reactivity with a selenium-containing gas lower than that of the substrate, and may differ from the first electrode in at least one of composition, thickness, density, emissivity, conductivity or stress state. The emissivity profile of the protective layer may be uniform or non-uniform.
摘要:
A solar cell includes a substrate, a protective layer located over a first surface of the substrate, a first electrode located over a second surface of the substrate, at least one p-type semiconductor absorber layer located over the first electrode, an n-type semiconductor layer located over the p-type semiconductor absorber layer, and a second electrode over the n-type semiconductor layer. The p-type semiconductor absorber layer includes a copper indium selenide (CIS) based alloy material, and the second electrode is transparent and electrically conductive. The protective layer has an emissivity greater than 0.25 at a wavelength of 2 μm, has a reactivity with a selenium-containing gas lower than that of the substrate, and may differ from the first electrode in at least one of composition, thickness, density, emissivity, conductivity or stress state. The emissivity profile of the protective layer may be uniform or non-uniform.
摘要:
A solar cell includes a substrate, a protective layer located over a first surface of the substrate, a first electrode located over a second surface of the substrate, at least one p-type semiconductor absorber layer located over the first electrode, an n-type semiconductor layer located over the p-type semiconductor absorber layer, and a second electrode over the n-type semiconductor layer. The p-type semiconductor absorber layer includes a copper indium selenide (CIS) based alloy material, and the second electrode is transparent and electrically conductive. The protective layer has an emissivity greater than 0.25 at a wavelength of 2 μm, has a reactivity with a selenium-containing gas lower than that of the substrate, and may differ from the first electrode in at least one of composition, thickness, density, emissivity, conductivity or stress state. The emissivity profile of the protective layer may be uniform or non-uniform.
摘要:
The present invention relates to certain melanoma-associated oligopeptides that are recognized by CD8-positive cytotoxic T-lymphocytes (CTLs) as peptide antigen and which elicit a CTL-induced lysis and/or apoptosis of tumor cells. The present invention also relates to the use of these melanoma-associated oligopeptides in cancer therapy.
摘要:
The present invention comprises an innovative gate oxidation process after the disposition of the gate and prior to the disposition of the source and the drain by exposing the gate to oxygen at a predetermined temperature and for a predetermined time period for the optimized transistor performance. During the innovative gate oxidation process, oxygen penetrates into the interfaces of the gate conductive layer gate oxide and the gate dielectric layer silicon substrate and oxidizes portions of the gate conductive layer at the interfaces due to the oxygen smiling or the bird beak effect, which results in an increased effective thickness of the gate dielectric layer. Optionally, HCl can be introduced at a predetermined flowrate during the innovative gate oxidation process. A particular embodiment of the present invention is the fabrication of MOS transistors with polysilicon as the gate conductive layer and silicon oxide as the gate dielectric layer, and with the source and drain fabricated by the low doped drain (LDD) implant. In this particular case, the innovative gate oxidation process is a polysilicon oxidation (POX) process grown before LDD implant. The oxidation temperature and oxidation time duration for optimized transistor performances have been found to be 850.degree. C. and 115 minutes, respectively. This present invention is utilized to achieve maximum speed and performance by optimizing the POX process.