摘要:
A method of forming a gate structure is provided. In the method, a nitride layer is formed on a gate material layer. An ultra-thin photoresist layer is formed on the nitride layer. The ultra-thin photoresist layer is patterned with short wavelength radiation to define a pattern for the gate. The ultra-thin photoresist layer is used as a mask during a first etch step to transfer the gate pattern to the nitride layer. The first etch step includes an etch chemistry that is selective to the nitride layer over the ultra-thin photoresist layer. The nitride layer is used as a hard mask during a second etch step to form the gate by transferring the gate pattern to the gate material layer via the second etch step.
摘要:
A method of forming a via structure is provided. In the method, a dielectric layer is formed on an anti-reflective coating (ARC) layer covering a first metal layer; and an amorphous silicon layer is formed on the dielectric layer. An ultra-thin photoresist layer is formed on the amorphous silicon layer, and the ultra-thin photoresist layer is patterned with short wavelength radiation to define a pattern for a via. The patterned ultra-thin photoresist layer is used as a mask during a first etch step to transfer the via pattern to the amorphous silicon layer. The first etch step includes an etch chemistry that is selective to the amorphous silicon layer over the ultra-thin photoresist layer and the dielectric layer. The amorphous silicon layer is employed as a hard mask during a second etch step to form a contact hole corresponding to the via pattern by etching portions of the dielectric layer.
摘要:
In one embodiment, the present invention relates to a method of forming a metal line, involving the steps of providing a semiconductor substrate comprising a metal layer, an oxide layer over the metal layer, and a silicon layer over the oxide layer; depositing an ultra-thin photoresist over the silicon layer, the ultra-thin photoresist having a thickness less than about 2,000 .ANG.; irradiating the ultra-thin photoresist with electromagnetic radiation having a wavelength of about 250 nm or less; developing the ultra-thin photoresist exposing a portion of the silicon layer; etching the exposed portion of the silicon layer exposing a portion of the oxide layer; etching the exposed portion of the oxide layer exposing a portion of the metal layer; and etching the exposed portion of the metal layer thereby forming the metal line.
摘要:
In one embodiment, the present invention relates to a method of forming a shallow trench, involving the steps of providing a semiconductor substrate comprising a barrier oxide layer over at the semiconductor substrate and a nitride layer over the barrier oxide layer; depositing an ultra-thin photoresist over the nitride layer, the ultra-thin photoresist having a thickness of about 2,000 Å or less; patterning the ultra-thin photoresist to expose a portion of the nitride layer and to define a pattern for the shallow trench; etching the exposed portion of the nitride layer with an etchant having a nitride:photoresist selectivity of at least about 10:1 to expose a portion of the barrier oxide layer; etching the exposed portion of the barrier oxide layer to expose a portion of the semiconductor substrate; and etching the exposed portion of the semiconductor substrate to provide the shallow trench. In another embodiment, the method further involves depositing an insulating filler material into the shallow trench to provide a shallow trench isolation region.
摘要:
In one embodiment, the present invention relates to a method of forming a metal line, involving the steps of providing a semiconductor substrate comprising a metal layer, a silicon nitride layer over the metal layer, and an oxide layer over the silicon nitride layer; depositing an ultra-thin photoresist over the oxide layer, the ultra-thin photoresist having a thickness less than about 2,000 Å; irradiating the ultra-thin photoresist with electromagnetic radiation having a wavelength of about 250 nm or less; developing the ultra-thin photoresist exposing a portion of the oxide layer; etching the exposed portion of the oxide layer exposing a portion of the silicon nitride layer; etching the exposed portion of the silicon nitride layer exposing a portion of the metal layer; and etching the exposed portion of the metal layer thereby forming the metal line.
摘要:
In one embodiment, the present invention relates to a method of forming a metal line, involving the steps of providing a semiconductor substrate comprising a metal layer, an oxide layer over the metal layer, and a silicon nitride layer over the oxide layer; depositing an ultra-thin photoresist over the silicon nitride layer, the ultra-thin photoresist having a thickness less than about 2,000 .ANG.; irradiating the ultra-thin photoresist with electromagnetic radiation having a wavelength of about 250 nm or less; developing the ultra-thin photoresist exposing a portion of the silicon nitride layer; etching the exposed portion of the silicon nitride layer exposing a portion of the oxide layer; etching the exposed portion of the oxide layer exposing a portion of the metal layer; and etching the exposed portion of the metal layer thereby forming the metal line.
摘要:
A method of forming a via structure is provided. In the method, a dielectric layer is formed on an anti-reflective coating (ARC) layer covering a first metal layer; and a transition metal layer is formed on the dielectric layer. An ultra-thin photoresist layer is formed on the transition metal layer, and the ultra-thin photoresist layer is patterned with short wavelength radiation to define a pattern for a via. The patterned ultra-thin photoresist layer is used as a mask during a first etch step to transfer the via pattern to the transition metal layer. The first etch step includes an etch chemistry that is selective to the transition metal layer over the ultra-thin photoresist layer and the dielectric layer. The transition metal layer is employed as a hard mask during a second etch step to form a contact hole corresponding to the via pattern by etching portions of the dielectric layer.
摘要:
In one embodiment, the present invention relates to a method of forming a metal line, involving the steps of providing a semiconductor substrate comprising a metal layer, an oxide layer over the metal layer, and a barrier metal layer over the oxide layer; depositing an ultra-thin photoresist over the barrier metal layer, the ultra-thin photoresist having a thickness less than about 2,000 Å; irradiating the ultra-thin photoresist with electromagnetic radiation having a wavelength of about 250 nm or less; developing the ultra-thin photoresist exposing a portion of the barrier metal layer; etching the exposed portion of the barrier metal layer exposing a portion of the oxide layer; etching the exposed portion of the oxide layer exposing a portion of the metal layer; and etching the exposed portion of the metal layer thereby forming the metal line.
摘要:
In one embodiment, the present invention relates to a dual damascene method involving the steps of providing a substrate having a first low k material layer; forming a first hard mask layer over the first low k material layer; patterning a first opening having a first width in the first hard mask layer using a first photoresist thereby exposing a portion of the first low k material layer; removing the first photoresist; depositing a second low k material layer over the patterned first hard mask layer and the exposed portion of the first low k material layer; forming a second hard mask layer over the second low k material layer; patterning a second opening having a width larger than the first width in the second hard mask layer using a second photoresist thereby exposing a portion of the second low k material layer; anisotropically etching the exposed portions of the first and second low k material layers; and removing the second photoresist, wherein and at least one of the first photoresist and the second photoresist have a thickness of about 1,500 Å or less.
摘要:
A method of forming a conductor pattern on a base with uneven topography includes placing conductor material on the base, placing a hard mask material on the conductor material, planarizing an exposed surface of the hard mask material, and placing a layer of resist on the hard mask material. The resist is patterned and the patterned resist is used in selectively etching the hard mask material, with the hard mask material used in selectively etching the underlying conductor material. By planarizing the hard mask material prior to placing a layer of resist thereupon, uniformity of the resist coating is enhanced and depth of focus problems in exposing the resist are reduced.