TWO STEP CHEMICAL-MECHANICAL POLISHING PROCESS
    1.
    发明申请
    TWO STEP CHEMICAL-MECHANICAL POLISHING PROCESS 审中-公开
    两步化学机械抛光工艺

    公开(公告)号:US20110275216A1

    公开(公告)日:2011-11-10

    申请号:US12773372

    申请日:2010-05-04

    IPC分类号: H01L21/463 H01L21/465

    摘要: A chemical mechanical polishing method includes employing a topologically selective slurry or an abrasive trapped or abrasive mounted pad in an initial polishing operation to provide a substantially planar topology of a polysilicon layer of a semiconductor wafer, and performing a second polishing operation to remove a portion of the polysilicon layer to expose discrete elements of the semiconductor wafer.

    摘要翻译: 化学机械抛光方法包括在初始抛光操作中采用拓扑选择性浆料或磨料捕集或研磨安装的焊盘以提供半导体晶片的多晶硅层的基本上平面的拓扑结构,并且执行第二抛光操作以去除部分 多晶硅层以暴露半导体晶片的分立元件。

    METHOD FOR FABRICATING DEVICE ISOLATION STRUCTURE
    3.
    发明申请
    METHOD FOR FABRICATING DEVICE ISOLATION STRUCTURE 审中-公开
    制造器件隔离结构的方法

    公开(公告)号:US20100244180A1

    公开(公告)日:2010-09-30

    申请号:US12411189

    申请日:2009-03-25

    摘要: A method of a fabricating a semiconductor device includes providing a substrate having a first region and a second region. A pad layer is formed overlying the substrate in both the first region and the second region. A mask layer is then formed overlying the pad layer. Thereafter, the mask layer, the pad layer and the substrate are patterned to form a plurality of first trenches in the first region and a plurality of second trenches in the second region. A trimming process is then performed on the mask layer to remove a portion of the mask layer. An insulation layer is formed over the substrate and fills the plurality of the first trenches and the plurality of the second trenches. Ultimately, a planarization process is performed on the insulation layer.

    摘要翻译: 制造半导体器件的方法包括提供具有第一区域和第二区域的衬底。 在第一区域和第二区域中形成覆盖衬底的衬垫层。 然后形成覆盖衬垫层的掩模层。 此后,对掩模层,焊盘层和衬底进行构图以在第一区域中形成多个第一沟槽和在第二区域中形成多个第二沟槽。 然后在掩模层上进行修整处理以去除掩模层的一部分。 绝缘层形成在衬底上并填充多个第一沟槽和多个第二沟槽。 最终,在绝缘层上进行平坦化处理。

    Pad and method for chemical mechanical polishing
    6.
    发明授权
    Pad and method for chemical mechanical polishing 有权
    化学机械抛光垫和方法

    公开(公告)号:US08047899B2

    公开(公告)日:2011-11-01

    申请号:US11878654

    申请日:2007-07-26

    IPC分类号: B24B7/22 B24D3/34

    CPC分类号: B24B37/24 B24D3/346

    摘要: A method for chemical-mechanical polishing two adjacent structures of a semiconductor device is provided. The method for mechanical polishing comprising: (a) providing a semiconductor device comprising a recess formed in a surface thereof, a first layer formed over the surface, and a second layer filled with the recess and formed on the first layer; and (b) substantially polishing the first and second layer with a pad and a substantially inhibitor-free slurry, wherein the pad comprising a corrosion inhibitor of the second layer.

    摘要翻译: 提供了半导体器件的两个相邻结构的化学机械抛光方法。 一种用于机械抛光的方法,包括:(a)提供半导体器件,其包括在其表面形成的凹部,形成在所述表面上的第一层,以及填充有所述凹部并形成在所述第一层上的第二层; 和(b)用垫和基本上无抑制剂的浆料基本上抛光第一层和第二层,其中该垫包括第二层的腐蚀抑制剂。

    Pad and method for chemical mechanical polishing
    7.
    发明申请
    Pad and method for chemical mechanical polishing 有权
    化学机械抛光垫和方法

    公开(公告)号:US20090029551A1

    公开(公告)日:2009-01-29

    申请号:US11878654

    申请日:2007-07-26

    IPC分类号: H01L21/461 C09K13/00

    CPC分类号: B24B37/24 B24D3/346

    摘要: A method for chemical-mechanical polishing two adjacent structures of a semiconductor device is provided. The method for mechanical polishing comprising: (a) providing a semiconductor device comprising a recess formed in a surface thereof, a first layer formed over the surface, and a second layer filled with the recess and formed on the first layer; and (b) substantially polishing the first and second layer with a pad and a substantially inhibitor-free slurry, wherein the pad comprising a corrosion inhibitor of the second layer.

    摘要翻译: 提供了半导体器件的两个相邻结构的化学机械抛光方法。 一种用于机械抛光的方法,包括:(a)提供半导体器件,其包括在其表面形成的凹部,形成在所述表面上的第一层,以及填充有所述凹部并形成在所述第一层上的第二层; 和(b)用垫和基本上无抑制剂的浆料基本上抛光第一层和第二层,其中该垫包括第二层的腐蚀抑制剂。

    Method of forming a semiconductor device
    8.
    发明授权
    Method of forming a semiconductor device 有权
    形成半导体器件的方法

    公开(公告)号:US08445982B2

    公开(公告)日:2013-05-21

    申请号:US13156933

    申请日:2011-06-09

    IPC分类号: H01L21/76

    CPC分类号: H01L21/76232

    摘要: A polysilicon structure and method of forming the polysilicon structure are disclosed, where the method includes a two-step deposition and planarization process. The disclosed process reduces the likelihood of defects such as voids, particularly where polysilicon is deposited in a trench having a high aspect ratio. A first polysilicon structure is deposited that includes a trench liner portion and a first upper portion. The trench liner portion only partially fills the trench, while the first upper portion extends over the adjacent field isolation structures. Next, at least a portion of the first upper portion of the first polysilicon structure is removed. A second polysilicon structure is then deposited that includes a trench plug portion and a second upper portion. The trench is filled by the plug portion, while the second upper portion extends over the adjacent field isolation structures. The second upper portion is then removed.

    摘要翻译: 公开了多晶硅结构和形成多晶硅结构的方法,其中该方法包括两步沉积和平坦化处理。 所公开的方法降低诸如空隙的缺陷的可能性,特别是在具有高纵横比的沟槽中沉积多晶硅时。 沉积包括沟槽衬垫部分和第一上部部分的第一多晶硅结构。 沟槽衬垫部分仅部分地填充沟槽,而第一上部部分在相邻的隔离结构上延伸。 接下来,去除第一多晶硅结构的第一上部的至少一部分。 然后沉积包括沟槽塞部分和第二上部部分的第二多晶硅结构。 沟槽由插头部分填充,而第二上部部分延伸在相邻的隔离结构上。 然后移除第二个上部。

    POLYSILICON STRUCTURE AND METHOD OF MANUFACTURING THE SAME
    9.
    发明申请
    POLYSILICON STRUCTURE AND METHOD OF MANUFACTURING THE SAME 有权
    多晶硅结构及其制造方法

    公开(公告)号:US20120313214A1

    公开(公告)日:2012-12-13

    申请号:US13156933

    申请日:2011-06-09

    IPC分类号: H01L29/06 H01L21/762

    CPC分类号: H01L21/76232

    摘要: A polysilicon structure and method of forming the polysilicon structure are disclosed, where the method includes a two-step deposition and planarization process. The disclosed process reduces the likelihood of defects such as voids, particularly where polysilicon is deposited in a trench having a high aspect ratio. A first polysilicon structure is deposited that includes a trench liner portion and a first upper portion. The trench liner portion only partially fills the trench, while the first upper portion extends over the adjacent field isolation structures. Next, at least a portion of the first upper portion of the first polysilicon structure is removed. A second polysilicon structure is then deposited that includes a trench plug portion and a second upper portion. The trench is filled by the plug portion, while the second upper portion extends over the adjacent field isolation structures. The second upper portion is then removed.

    摘要翻译: 公开了多晶硅结构和形成多晶硅结构的方法,其中该方法包括两步沉积和平坦化处理。 所公开的方法降低诸如空隙的缺陷的可能性,特别是在具有高纵横比的沟槽中沉积多晶硅时。 沉积包括沟槽衬垫部分和第一上部部分的第一多晶硅结构。 沟槽衬垫部分仅部分地填充沟槽,而第一上部部分在相邻的隔离结构上延伸。 接下来,去除第一多晶硅结构的第一上部的至少一部分。 然后沉积包括沟槽塞部分和第二上部部分的第二多晶硅结构。 沟槽由插塞部分填充,而第二上部部分延伸在相邻的隔离结构上。 然后移除第二个上部。

    PAD AND METHOD FOR CHEMICAL MECHANICAL POLISHING
    10.
    发明申请
    PAD AND METHOD FOR CHEMICAL MECHANICAL POLISHING 审中-公开
    PAD和化学机械抛光方法

    公开(公告)号:US20120040532A1

    公开(公告)日:2012-02-16

    申请号:US13281162

    申请日:2011-10-25

    IPC分类号: H01L21/306

    CPC分类号: B24B37/24 B24D3/346

    摘要: A method for chemical-mechanical polishing two adjacent structures of a semiconductor device is provided. The method for mechanical polishing comprising: (a) providing a semiconductor device comprising a recess formed in a surface thereof, a first layer formed over the surface, and a second layer filled with the recess and formed on the first layer; and (b) substantially polishing the first and second layer with a pad and a substantially inhibitor-free slurry, wherein the pad comprising a corrosion inhibitor of the second layer.

    摘要翻译: 提供了半导体器件的两个相邻结构的化学机械抛光方法。 一种用于机械抛光的方法,包括:(a)提供半导体器件,其包括在其表面形成的凹部,形成在所述表面上的第一层,以及填充有所述凹部并形成在所述第一层上的第二层; 和(b)用垫和基本上无抑制剂的浆料基本上抛光第一层和第二层,其中该垫包括第二层的腐蚀抑制剂。