摘要:
A chemical mechanical polishing method includes employing a topologically selective slurry or an abrasive trapped or abrasive mounted pad in an initial polishing operation to provide a substantially planar topology of a polysilicon layer of a semiconductor wafer, and performing a second polishing operation to remove a portion of the polysilicon layer to expose discrete elements of the semiconductor wafer.
摘要:
A metal pad formation method and metal pad structure using the same are provided. A wider first pad metal is formed together with a first metal. A dielectric layer is then deposited thereon. A first opening and a second opening are formed in the dielectric layer to respectively expose the first metal and the first pad metal. Then, the first opening is filled by W metal to generate a first via. Finally, a second metal and a second pad metal are formed to respectively cover the first via and the first pad metal to generate the metal pad.
摘要:
A method of a fabricating a semiconductor device includes providing a substrate having a first region and a second region. A pad layer is formed overlying the substrate in both the first region and the second region. A mask layer is then formed overlying the pad layer. Thereafter, the mask layer, the pad layer and the substrate are patterned to form a plurality of first trenches in the first region and a plurality of second trenches in the second region. A trimming process is then performed on the mask layer to remove a portion of the mask layer. An insulation layer is formed over the substrate and fills the plurality of the first trenches and the plurality of the second trenches. Ultimately, a planarization process is performed on the insulation layer.
摘要:
A metal pad formation method and metal pad structure using the same are provided. A wider first pad metal is formed together with a first metal. A dielectric layer is then deposited thereon. A first opening and a second opening are formed in the dielectric layer to respectively expose the first metal and the first pad metal. Then, the first opening is filled by W metal to generate a first via. Finally, a second metal and a second pad metal are formed to respectively cover the first via and the first pad metal to generate the metal pad.
摘要:
Closed loop control may be used to improve uniformity of contact or via critical dimension using chemical mechanical planarization. For example, real-time closed loop control may be used to adjust oxide buffing or over-polishing time in a chemical mechanical planarization process to more uniformly and consistently achieve a target critical dimension of a semiconductor wafer.
摘要:
A method for chemical-mechanical polishing two adjacent structures of a semiconductor device is provided. The method for mechanical polishing comprising: (a) providing a semiconductor device comprising a recess formed in a surface thereof, a first layer formed over the surface, and a second layer filled with the recess and formed on the first layer; and (b) substantially polishing the first and second layer with a pad and a substantially inhibitor-free slurry, wherein the pad comprising a corrosion inhibitor of the second layer.
摘要:
A method for chemical-mechanical polishing two adjacent structures of a semiconductor device is provided. The method for mechanical polishing comprising: (a) providing a semiconductor device comprising a recess formed in a surface thereof, a first layer formed over the surface, and a second layer filled with the recess and formed on the first layer; and (b) substantially polishing the first and second layer with a pad and a substantially inhibitor-free slurry, wherein the pad comprising a corrosion inhibitor of the second layer.
摘要:
A polysilicon structure and method of forming the polysilicon structure are disclosed, where the method includes a two-step deposition and planarization process. The disclosed process reduces the likelihood of defects such as voids, particularly where polysilicon is deposited in a trench having a high aspect ratio. A first polysilicon structure is deposited that includes a trench liner portion and a first upper portion. The trench liner portion only partially fills the trench, while the first upper portion extends over the adjacent field isolation structures. Next, at least a portion of the first upper portion of the first polysilicon structure is removed. A second polysilicon structure is then deposited that includes a trench plug portion and a second upper portion. The trench is filled by the plug portion, while the second upper portion extends over the adjacent field isolation structures. The second upper portion is then removed.
摘要:
A polysilicon structure and method of forming the polysilicon structure are disclosed, where the method includes a two-step deposition and planarization process. The disclosed process reduces the likelihood of defects such as voids, particularly where polysilicon is deposited in a trench having a high aspect ratio. A first polysilicon structure is deposited that includes a trench liner portion and a first upper portion. The trench liner portion only partially fills the trench, while the first upper portion extends over the adjacent field isolation structures. Next, at least a portion of the first upper portion of the first polysilicon structure is removed. A second polysilicon structure is then deposited that includes a trench plug portion and a second upper portion. The trench is filled by the plug portion, while the second upper portion extends over the adjacent field isolation structures. The second upper portion is then removed.
摘要:
A method for chemical-mechanical polishing two adjacent structures of a semiconductor device is provided. The method for mechanical polishing comprising: (a) providing a semiconductor device comprising a recess formed in a surface thereof, a first layer formed over the surface, and a second layer filled with the recess and formed on the first layer; and (b) substantially polishing the first and second layer with a pad and a substantially inhibitor-free slurry, wherein the pad comprising a corrosion inhibitor of the second layer.