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公开(公告)号:US20130320537A1
公开(公告)日:2013-12-05
申请号:US13483074
申请日:2012-05-30
申请人: Jia-Jia Chen , Chi-Mao Hsu , Tsun-Min Cheng , Chun-Ling Lin , Huei-Ru Tsai , Ching-Wei Hsu , Chin-Fu Lin , Hsin-Yu Chen
发明人: Jia-Jia Chen , Chi-Mao Hsu , Tsun-Min Cheng , Chun-Ling Lin , Huei-Ru Tsai , Ching-Wei Hsu , Chin-Fu Lin , Hsin-Yu Chen
IPC分类号: H01L23/48 , H01L21/768
CPC分类号: H01L21/76847 , H01L21/76898 , H01L2924/0002 , H01L2924/00
摘要: A through silicon via structure is located in a recess of a substrate. The through silicon via structure includes a barrier layer, a buffer layer and a conductive layer. The barrier layer covers a surface of the recess. The buffer layer covers the barrier layer. The conductive layer is located on the buffer layer and fills the recess, wherein the contact surface between the conductive layer and the buffer layer is smoother than the contact surface between the buffer layer and the barrier layer. Moreover, a through silicon via process forming said through silicon via structure is also provided.
摘要翻译: 硅通孔结构位于衬底的凹槽中。 贯通硅通孔结构包括阻挡层,缓冲层和导电层。 阻挡层覆盖凹部的表面。 缓冲层覆盖阻挡层。 导电层位于缓冲层上并填充凹槽,其中导电层和缓冲层之间的接触表面比缓冲层和阻挡层之间的接触表面更平滑。 此外,还提供了形成所述贯穿硅通孔结构的通硅通孔工艺。
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公开(公告)号:US09136170B2
公开(公告)日:2015-09-15
申请号:US13483074
申请日:2012-05-30
申请人: Jia-Jia Chen , Chi-Mao Hsu , Tsun-Min Cheng , Chun-Ling Lin , Huei-Ru Tsai , Ching-Wei Hsu , Chin-Fu Lin , Hsin-Yu Chen
发明人: Jia-Jia Chen , Chi-Mao Hsu , Tsun-Min Cheng , Chun-Ling Lin , Huei-Ru Tsai , Ching-Wei Hsu , Chin-Fu Lin , Hsin-Yu Chen
IPC分类号: H01L23/48 , H01L21/768
CPC分类号: H01L21/76847 , H01L21/76898 , H01L2924/0002 , H01L2924/00
摘要: A through silicon via structure is located in a recess of a substrate. The through silicon via structure includes a barrier layer, a buffer layer and a conductive layer. The barrier layer covers a surface of the recess. The buffer layer covers the barrier layer. The conductive layer is located on the buffer layer and fills the recess, wherein the contact surface between the conductive layer and the buffer layer is smoother than the contact surface between the buffer layer and the barrier layer. Moreover, a through silicon via process forming said through silicon via structure is also provided.
摘要翻译: 硅通孔结构位于衬底的凹槽中。 贯通硅通孔结构包括阻挡层,缓冲层和导电层。 阻挡层覆盖凹部的表面。 缓冲层覆盖阻挡层。 导电层位于缓冲层上并填充凹槽,其中导电层和缓冲层之间的接触表面比缓冲层和阻挡层之间的接触表面更平滑。 此外,还提供了形成所述贯穿硅通孔结构的通硅通孔工艺。
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3.
公开(公告)号:US20130178063A1
公开(公告)日:2013-07-11
申请号:US13347758
申请日:2012-01-11
申请人: Chun-Ling Lin , Chi-Mao Hsu , Tsun-Min Cheng , Jia-Jia Chen , Chin-Fu Lin
发明人: Chun-Ling Lin , Chi-Mao Hsu , Tsun-Min Cheng , Jia-Jia Chen , Chin-Fu Lin
IPC分类号: H01L21/28
CPC分类号: H01L21/76898
摘要: A method of manufacturing semiconductor device having silicon through via is disclosed, and conductor can be fully filled in the silicon through via. First, a silicon substrate is provided. Then, the silicon substrate is etched to form a through silicon via (TSV), and the through silicon via extends down from a surface of the silicon substrate. Next, a barrier layer is formed on the silicon substrate and in the through silicon via. Then, a seed layer is formed on the barrier layer and in the through silicon via. Afterward, a wet treatment is performed on the seed layer over the silicon substrate and within the through silicon via. The through silicon via is then filled with a conductor.
摘要翻译: 公开了一种制造具有硅通孔的半导体器件的方法,并且导体可以通过通孔完全填充到硅中。 首先,提供硅基板。 然后,蚀刻硅衬底以形成贯穿硅通孔(TSV),并且通硅通孔从硅衬底的表面向下延伸。 接下来,在硅衬底和贯穿硅通孔中形成阻挡层。 然后,在阻挡层和贯穿硅通孔中形成种子层。 之后,在硅衬底上以及在硅通孔内的种子层上进行湿处理。 然后通过硅通孔填充导体。
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公开(公告)号:US08481425B2
公开(公告)日:2013-07-09
申请号:US13108969
申请日:2011-05-16
申请人: Yen-Liang Lu , Chun-Ling Lin , Chi-Mao Hsu , Chin-Fu Lin , Chun-Hung Chen , Tsun-Min Cheng , Meng-Hong Tsai
发明人: Yen-Liang Lu , Chun-Ling Lin , Chi-Mao Hsu , Chin-Fu Lin , Chun-Hung Chen , Tsun-Min Cheng , Meng-Hong Tsai
IPC分类号: H01L21/44
CPC分类号: H01L21/76898 , H01L21/76828 , H01L21/76831
摘要: A method for fabricating through-silicon via structure is disclosed. The method includes the steps of: providing a semiconductor substrate; forming a through-silicon via in the semiconductor substrate; covering a liner in the through-silicon via; performing a baking process on the liner; forming a barrier layer on the liner; and forming a through-silicon via electrode in the through-silicon via.
摘要翻译: 公开了一种制造硅通孔结构的方法。 该方法包括以下步骤:提供半导体衬底; 在半导体衬底中形成穿硅通孔; 覆盖穿通硅通孔内的衬垫; 在衬垫上进行烘烤过程; 在衬垫上形成阻挡层; 以及在所述贯通硅通孔中形成贯通硅通孔电极。
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公开(公告)号:US09416459B2
公开(公告)日:2016-08-16
申请号:US13154420
申请日:2011-06-06
申请人: Chun-Ling Lin , Yen-Liang Lu , Chi-Mao Hsu , Chin-Fu Lin , Chun-Hung Chen , Tsun-Min Cheng , Chi-Ray Tsai
发明人: Chun-Ling Lin , Yen-Liang Lu , Chi-Mao Hsu , Chin-Fu Lin , Chun-Hung Chen , Tsun-Min Cheng , Chi-Ray Tsai
CPC分类号: C25D5/54 , C25D3/38 , C25D5/00 , C25D5/10 , C25D7/123 , H01L21/2885 , H01L21/76879
摘要: An electrical chemical plating process is provided. A semiconductor structure is provided in an electrical plating platform. A pre-electrical-plating step is performed wherein the pre-electrical-plating step is carried out under a fixed voltage environment and lasts for 0.2 to 0.5 seconds after the current is above the threshold current of the electrical plating platform. After the pre-electrical-plating step, a first electrical plating step is performed on the semiconductor structure.
摘要翻译: 提供电化学镀工艺。 半导体结构设置在电镀平台中。 进行预电镀步骤,其中预电镀步骤在固定电压环境下进行,并且在电流高于电镀平台的阈值电流之后持续0.2至0.5秒。 在预电镀步骤之后,对半导体结构进行第一电镀步骤。
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公开(公告)号:US20130045595A1
公开(公告)日:2013-02-21
申请号:US13210380
申请日:2011-08-16
申请人: Tsun-Min Cheng , Chien-Chao Huang , Chin-Fu Lin , Chi-Mao Hsu , Yen-Liang Lu , Chun-Ling Lin
发明人: Tsun-Min Cheng , Chien-Chao Huang , Chin-Fu Lin , Chi-Mao Hsu , Yen-Liang Lu , Chun-Ling Lin
IPC分类号: H01L21/283
CPC分类号: H01L21/76883
摘要: The method for processing a metal layer including the following steps is illustrated. First, a semiconductor substrate is provided. Then, a metal layer is formed over the semiconductor substrate. Furthermore, a microwave energy is used to selectively heat the metal layer without affecting the underlying semiconductor substrate and other formed structures, in which the microwave energy has a predetermined frequency in accordance with a material of the metal layer, and the predetermined frequency ranges between 1 KHz to 1 MHz.
摘要翻译: 示出了包括以下步骤的金属层的处理方法。 首先,提供半导体基板。 然后,在半导体衬底上形成金属层。 此外,使用微波能量来选择性地加热金属层,而不影响下面的半导体衬底和其它形成的结构,其中微波能量根据金属层的材料具有预定的频率,并且预定的频率范围在1 KHz至1MHz。
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公开(公告)号:US20120295437A1
公开(公告)日:2012-11-22
申请号:US13108969
申请日:2011-05-16
申请人: Yen-Liang Lu , Chun-Ling Lin , Chi-Mao Hsu , Chin-Fu Lin , Chun-Hung Chen , Tsun-Min Cheng , Meng-Hong Tsai
发明人: Yen-Liang Lu , Chun-Ling Lin , Chi-Mao Hsu , Chin-Fu Lin , Chun-Hung Chen , Tsun-Min Cheng , Meng-Hong Tsai
IPC分类号: H01L21/283
CPC分类号: H01L21/76898 , H01L21/76828 , H01L21/76831
摘要: A method for fabricating through-silicon via structure is disclosed. The method includes the steps of: providing a semiconductor substrate; forming a through-silicon via in the semiconductor substrate; covering a liner in the through-silicon via; performing a baking process on the liner; forming a barrier layer on the liner; and forming a through-silicon via electrode in the through-silicon via.
摘要翻译: 公开了一种制造硅通孔结构的方法。 该方法包括以下步骤:提供半导体衬底; 在半导体衬底中形成穿硅通孔; 覆盖穿通硅通孔内的衬垫; 在衬垫上进行烘烤过程; 在衬垫上形成阻挡层; 以及在所述贯通硅通孔中形成贯通硅通孔电极。
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公开(公告)号:US20120305403A1
公开(公告)日:2012-12-06
申请号:US13154420
申请日:2011-06-06
申请人: Chun-Ling Lin , Yen-Liang Lu , Chi-Mao Hsu , Chin-Fu Lin , Chun-Hung Chen , Tsun-Min Cheng , Meng-Hong Tsai
发明人: Chun-Ling Lin , Yen-Liang Lu , Chi-Mao Hsu , Chin-Fu Lin , Chun-Hung Chen , Tsun-Min Cheng , Meng-Hong Tsai
CPC分类号: C25D5/54 , C25D3/38 , C25D5/00 , C25D5/10 , C25D7/123 , H01L21/2885 , H01L21/76879
摘要: An electrical chemical plating process is provided. A semiconductor structure is provided in an electrical plating platform. A pre-electrical-plating step is performed wherein the pre-electrical-plating step is carried out under a fixed voltage environment and lasts for 0.2 to 0.5 seconds after the current is above the threshold current of the electrical plating platform. After the pre-electrical-plating step, a first electrical plating step is performed on the semiconductor structure.
摘要翻译: 提供电化学镀工艺。 半导体结构设置在电镀平台中。 进行预电镀步骤,其中预电镀步骤在固定电压环境下进行,并且在电流高于电镀平台的阈值电流之后持续0.2至0.5秒。 在预电镀步骤之后,对半导体结构进行第一电镀步骤。
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公开(公告)号:US09012324B2
公开(公告)日:2015-04-21
申请号:US13593517
申请日:2012-08-24
申请人: Jia-Jia Chen , Chi-Mao Hsu , Tsun-Min Cheng , Ching-Wei Hsu , Szu-Hao Lai , Huei-Ru Tsai , Tsai-Yu Wen , Ching-Li Yang , Chien-Li Kuo
发明人: Jia-Jia Chen , Chi-Mao Hsu , Tsun-Min Cheng , Ching-Wei Hsu , Szu-Hao Lai , Huei-Ru Tsai , Tsai-Yu Wen , Ching-Li Yang , Chien-Li Kuo
IPC分类号: H01L21/768 , H01L23/48
CPC分类号: H01L21/76898 , H01L23/49827 , H01L2924/0002 , H01L2924/00
摘要: A through silicon via process includes the following steps. A substrate having a front side and a back side is provided. A passivation layer is formed on the back side of the substrate. An oxide layer is formed on the passivation layer.
摘要翻译: 硅通孔工艺包括以下步骤。 提供具有正面和背面的基板。 在基板的背面形成钝化层。 在钝化层上形成氧化物层。
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公开(公告)号:US20140057434A1
公开(公告)日:2014-02-27
申请号:US13593517
申请日:2012-08-24
申请人: Jia-Jia Chen , Chi-Mao Hsu , Tsun-Min Cheng , Ching-Wei Hsu , Szu-Hao Lai , Huei-Ru Tsai , Tsai-Yu Wen , Ching-Li Yang , Chien-Li Kuo
发明人: Jia-Jia Chen , Chi-Mao Hsu , Tsun-Min Cheng , Ching-Wei Hsu , Szu-Hao Lai , Huei-Ru Tsai , Tsai-Yu Wen , Ching-Li Yang , Chien-Li Kuo
IPC分类号: H01L21/768
CPC分类号: H01L21/76898 , H01L23/49827 , H01L2924/0002 , H01L2924/00
摘要: A through silicon via process includes the following steps. A substrate having a front side and a back side is provided. A passivation layer is formed on the back side of the substrate. An oxide layer is formed on the passivation layer.
摘要翻译: 硅通孔工艺包括以下步骤。 提供具有正面和背面的基板。 在基板的背面形成钝化层。 在钝化层上形成氧化物层。
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