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    Memory elements and cross point switches and arrays of same using nonvolatile nanotube blocks
    1.
    发明授权
    Memory elements and cross point switches and arrays of same using nonvolatile nanotube blocks 有权
    存储元件和交叉点开关以及使用非易失性纳米管块的阵列

    公开(公告)号：US07835170B2

    公开(公告)日：2010-11-16

    申请号：US11835613

    申请日：2007-08-08

    申请人： Claude L. Bertin ,  X. M. Henry Huang ,  Thomas Rueckes ,  Ramesh Sivarajan

    发明人： Claude L. Bertin ,  X. M. Henry Huang ,  Thomas Rueckes ,  Ramesh Sivarajan

    IPC分类号： G11C11/00

    CPC分类号： G11C5/063 ,  B82Y10/00 ,  G11C13/0002 ,  G11C13/0021 ,  G11C13/025 ,  G11C17/16 ,  G11C17/165 ,  G11C2213/19 ,  G11C2213/77 ,  G11C2213/79 ,  H01L27/10 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/112 ,  H01L29/0665 ,  H01L29/0669 ,  H01L29/0673 ,  H01L51/0048 ,  H01L51/0591 ,  Y10S977/943

    摘要： Under one aspect, a covered nanotube switch includes: (a) a nanotube element including an unaligned plurality of nanotubes, the nanotube element having a top surface, a bottom surface, and side surfaces; (b) first and second terminals in contact with the nanotube element, wherein the first terminal is disposed on and substantially covers the entire top surface of the nanotube element, and wherein the second terminal contacts at least a portion of the bottom surface of the nanotube element; and (c) control circuitry capable of applying electrical stimulus to the first and second terminals. The nanotube element can switch between a plurality of electronic states in response to a corresponding plurality of electrical stimuli applied by the control circuitry to the first and second terminals. For each different electronic state, the nanotube element provides an electrical pathway of different resistance between the first and second terminals.

    摘要翻译： 在一个方面，覆盖的纳米管开关包括：（a）包括不对齐的多个纳米管的纳米管元件，所述纳米管元件具有顶表面，底表面和侧表面; （b）与纳米管元件接触的第一和第二端子，其中第一端子设置在并基本上覆盖纳米管元件的整个顶表面，并且其中第二端子接触纳米管的底表面的至少一部分 元件; 和（c）能够向第一和第二端子施加电刺激的控制电路。 纳米管元件可以响应于由控制电路施加到第一和第二端子的对应的多个电刺激而在多个电子状态之间切换。 对于每个不同的电子状态，纳米管元件提供在第一和第二端子之间具有不同电阻的电路径。

    Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same
    3.
    发明授权
    Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same 有权
    非挥发性纳米管二极管和非易失性纳米管块及使用其的系统及其制造方法

    公开(公告)号：US07782650B2

    公开(公告)日：2010-08-24

    申请号：US11835845

    申请日：2007-08-08

    申请人： Claude L. Bertin ,  Thomas Rueckes ,  X. M. Henry Huang ,  Ramesh Sivarajan ,  Eliodor G. Ghenciu ,  Steven L. Konsek ,  Mitchell Meinhold ,  Jonathan W. Ward ,  Darren K. Brock

    发明人： Claude L. Bertin ,  Thomas Rueckes ,  X. M. Henry Huang ,  Ramesh Sivarajan ,  Eliodor G. Ghenciu ,  Steven L. Konsek ,  Mitchell Meinhold ,  Jonathan W. Ward ,  Darren K. Brock

    IPC分类号： G11C11/00

    CPC分类号： H01L27/1021 ,  G11C2213/19 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/1203 ,  Y10S977/943

    摘要： Under one aspect, a memory array includes word lines; bit lines; memory cells; and a memory operation circuit. Each memory cell responds to electrical stimulus on a word line and on a bit line and includes: a two-terminal non-volatile nanotube switching device having first and second terminals, a semiconductor diode element, and a nanotube fabric article capable of multiple resistance states. The semiconductor diode and nanotube article are between and in electrical communication with the first and second terminals, which are coupled to the word line bit line respectively. The operation circuit selects cells by activating bit and/or word lines, detects a resistance state of the nanotube fabric article of a selected memory cell, and adjusts electrical stimulus applied to the cell to controllably induce a selected resistance state in the nanotube fabric article. The selected resistance state corresponds to an informational state of the memory cell.

    摘要翻译： 在一个方面，存储器阵列包括字线; 位线 记忆细胞; 和存储器操作电路。 每个存储器单元响应于字线和位线上的电刺激，并且包括：具有第一和第二端子的二端非易失性纳米管开关器件，半导体二极管元件和能够具有多个电阻状态的纳米管织物制品 。 半导体二极管和纳米管制品分别与第一和第二端子电连接，并且与第一和第二端子电连接，它们分别耦合到字线位线。 操作电路通过激活位和/或字线来选择单元，检测所选择的存储单元的纳米管织物的电阻状态，并调整施加到单元的电刺激以可控制地引起纳米管织物制品中选定的电阻状态。 选择的电阻状态对应于存储单元的信息状态。

    Memory arrays using nanotube articles with reprogrammable resistance
    8.
    发明授权
    Memory arrays using nanotube articles with reprogrammable resistance 有权
    使用具有可编程电阻的纳米管制品的存储器阵列

    公开(公告)号：US07479654B2

    公开(公告)日：2009-01-20

    申请号：US11274967

    申请日：2005-11-15

    申请人： Claude L. Bertin ,  Frank Guo ,  Thomas Rueckes ,  Steven L. Konsek ,  Mitchell Meinhold ,  Max Strasburg ,  Ramesh Sivarajan ,  X. M. Henry Huang

    发明人： Claude L. Bertin ,  Frank Guo ,  Thomas Rueckes ,  Steven L. Konsek ,  Mitchell Meinhold ,  Max Strasburg ,  Ramesh Sivarajan ,  X. M. Henry Huang

    IPC分类号： H01L29/08 ,  H01L35/24

    CPC分类号： G11C13/025 ,  B82Y10/00 ,  G11C13/0002 ,  G11C2213/16 ,  G11C2213/19 ,  G11C2213/35 ,  G11C2213/79

    摘要： A memory array includes a plurality of memory cells, each of which receives a bit line, a first word line, and a second word line. Each memory cell includes a cell selection circuit, which allows the memory cell to be selected. Each memory cell also includes a two-terminal switching device, which includes first and second conductive terminals in electrical communication with a nanotube article. The memory array also includes a memory operation circuit, which is operably coupled to the bit line, the first word line, and the second word line of each cell. The circuit can select the cell by activating an appropriate line, and can apply appropriate electrical stimuli to an appropriate line to reprogrammably change the relative resistance of the nanotube article between the first and second terminals. The relative resistance corresponds to an informational state of the memory cell.

    摘要翻译： 存储器阵列包括多个存储器单元，每个存储单元接收位线，第一字线和第二字线。 每个存储单元包括单元选择电路，其允许选择存储单元。 每个存储单元还包括两端开关器件，其包括与纳米管制品电连通的第一和第二导电端子。 存储器阵列还包括可操作地耦合到每个单元的位线，第一字线和第二字线的存储器操作电路。 电路可以通过激活适当的线路来选择细胞，并且可以将适当的电刺激施加到适当的线以可重新编程地改变纳米管制品在第一和第二端子之间的相对电阻。 相对电阻对应于存储单元的信息状态。