Low warp fan-out processing method and production of substrates therefor

    公开(公告)号:US11875993B2

    公开(公告)日:2024-01-16

    申请号:US17967354

    申请日:2022-10-17

    Inventor: Jin Su Kim Yu Xiao

    CPC classification number: H01L21/02422 C03B33/076

    Abstract: A method of fan-out processing includes providing or obtaining a fused glass laminate sheet or wafer having a core layer and a first clad layer and a second clad layer, the core layer comprising a core glass having a core glass coefficient of thermal expansion αcore, the first clad layer and the second clad layer each comprising a clad glass having a clad glass coefficient of thermal expansion αclad, where αclad>αcore; affixing integrated circuit devices to the second clad layer of the laminate sheet or wafer; forming a fan-out layer on or above the integrated circuit devices; and removing some of the first clad layer to decrease warp of the sheet or wafer with integrated circuit devices and a fan-out layer thereon. A method of producing a laminate sheet or wafer having a selected CTE is also disclosed.

    GLASS CARRIER FOR DIE-UP FAN-OUT PACKAGING AND METHODS FOR MAKING THE SAME

    公开(公告)号:US20220149004A1

    公开(公告)日:2022-05-12

    申请号:US17435574

    申请日:2020-02-24

    Inventor: Jin Su Kim Yu Xiao

    Abstract: A wafer- or panel-level encapsulated package comprises a glass substrate comprising a glass cladding layer (105) fused to a glass core layer (110), the glass substrate comprising a cavity (425), wherein the glass cladding layer has a higher etch rate in an etchant than the glass core layer. The wafer- or panel-level encapsulated package further comprises a microelectronic component (700) disposed in the cavity, and an encapsulant (702) sealed to the glass substrate such that the microelectronic component is encapsulated within the cavity. Methods for forming the wafer- or panel-level encapsulated package, including etching a cavity into a glass substrate, depositing a microelectronic component into the cavity, and sealing an encapsulant to the glass substrate such that the microelectronic component is encapsulated within the cavity are also provided.

    Precision structured glass article having EMI shielding and methods for making the same

    公开(公告)号:US11296038B2

    公开(公告)日:2022-04-05

    申请号:US17043567

    申请日:2019-04-03

    Abstract: Structured glass articles include a glass substrate including a glass cladding layer fused to a glass core layer, a cavity formed in the glass substrate, and a shielding layer disposed within the cavity. In some embodiments, a passivation layer is disposed within the cavity such that the shielding layer is between the passivation layer and the glass substrate. A method for forming a glass fan-out includes depositing a shielding layer within a cavity in a glass substrate. The glass substrate includes a glass cladding layer fused to a glass core layer. A silicon chip may be deposited within the cavity. In some embodiments, the method also includes depositing a passivation layer within the cavity such that the shielding layer is between the passivation layer and the glass substrate.

    Laminated glass structures for electronic devices and electronic device covers

    公开(公告)号:US11267221B2

    公开(公告)日:2022-03-08

    申请号:US17041876

    申请日:2019-03-27

    Abstract: A laminated glass structure is provided that includes: a core glass layer having a first coefficient of thermal expansion (CTE); and a plurality of clad glass layers, each having a CTE that is lower than or equal to the first CTE of the core glass layer. A first of the clad layers is laminated to a first surface of the core glass layer and a second of the clad layers is laminated to a second surface of the core glass layer. Further, the total thickness of the core glass layer and the clad glass layers ranges from about 0.1 mm to about 3 mm. In addition, the laminated glass structure is characterized by a transmission power of at least 75% and at least 55% for signals at 28 GHz and 60 GHz, respectively, as calculated in a Three-Layer Model.

Patent Agency Ranking