公开(公告)号：US07855048B1

公开(公告)日：2010-12-21

申请号：US10838704

申请日：2004-05-04

申请人： Cyrus E. Tabery ,  Bruno M. LaFontaine ,  Adam R. Pawloski ,  Jongwook Kye

发明人： Cyrus E. Tabery ,  Bruno M. LaFontaine ,  Adam R. Pawloski ,  Jongwook Kye

IPC分类号： G02F1/01

CPC分类号： G03F7/091 ,  G03F7/70958

摘要： A method of fabricating a semiconductor device using lithography. The method can include providing a wafer assembly having a layer to be processed disposed under a photo resist layer and illuminating the wafer assembly with an exposure dose transmitted through a birefringent material disposed between a final optical element of an imaging subsystem used to transmit the exposure dose and the photo resist layer. Also disclosed is a wafer assembly from which at least one semiconductor device can be fabricated. The wafer assembly can include a layer to be processed, a photo resist layer disposed over the layer to be processed and a contrast enhancing, birefringent top anti-reflecting coating (TARC).

摘要翻译： 使用光刻制造半导体器件的方法。 该方法可以包括提供具有待处理层的晶片组件，其设置在光致抗蚀剂层下方并且以透射通过双折射材料的曝光剂量照射晶片组件，所述双折射材料设置在用于透射曝光剂量的成像子系统的最终光学元件之间 和光刻胶层。 还公开了可以制造至少一个半导体器件的晶片组件。 晶片组件可以包括待处理的层，设置在待处理层上的光致抗蚀剂层和增强对比度的双折射顶部抗反射涂层（TARC）。

公开(公告)号：US07384725B2

公开(公告)日：2008-06-10

申请号：US10817193

申请日：2004-04-02

申请人： Anna M. Minvielle ,  Cyrus E. Tabery ,  Hung-eil Kim ,  Jongwook Kye

发明人： Anna M. Minvielle ,  Cyrus E. Tabery ,  Hung-eil Kim ,  Jongwook Kye

IPC分类号： G03F7/20 ,  G03F1/00

CPC分类号： G03F7/70425 ,  G03F7/70091 ,  G03F7/701 ,  G03F7/70125 ,  G03F7/70158

摘要： A method of forming a plurality of contact holes of varying pitch and density in a contact layer of an integrated circuit device is provided. The plurality of contact holes can include a plurality of regularly spaced contact holes having a first pitch along a first direction and a plurality of semi-isolated contact holes having a second pitch along a second direction. A double-dipole illumination source can transmit light energy through a mask having a pattern corresponding to a desired contact hole pattern. The double-dipole illumination source can include a first dipole aperture, which is oriented and optimized for patterning the regularly spaced contact holes, and a second dipole aperture, which is oriented substantially orthogonal to the first dipole aperture and optimized for patterning the plurality of semi-isolated contact holes. The contact layer can be etched using the patterned photoresist layer.

摘要翻译： 提供了一种在集成电路器件的接触层中形成多个具有不同间距和密度的接触孔的方法。 多个接触孔可以包括沿着第一方向具有第一间距的多个规则间隔的接触孔和沿第二方向具有第二间距的多个半隔离接触孔。 双偶极照明源可以通过具有对应于期望的接触孔图案的图案的掩模传输光能。 双偶极照明源可以包括第一偶极孔，其被定向和优化以用于图案化规则间隔的接触孔，以及第二偶极孔，其基本上垂直于第一偶极孔定向并且被优化用于图案化多个半 隔离接触孔。 可以使用图案化的光致抗蚀剂层来蚀刻接触层。

公开(公告)号：US06977717B1

公开(公告)日：2005-12-20

申请号：US10727385

申请日：2003-12-04

申请人： Ivan Lalovic ,  Bruno M. LaFontaine ,  Jongwook Kye

发明人： Ivan Lalovic ,  Bruno M. LaFontaine ,  Jongwook Kye

IPC分类号： G03B27/42 ,  G03B27/54 ,  G03F7/20

CPC分类号： G03F7/70083 ,  G03F7/70941

摘要： A method and device for determining projection lens pupil transmission distribution in a photolithographic imaging system, the device including an illumination source; a transmissive reticle; an aperture layer having an illumination source side and a light emission side and comprising a plurality of openings therethrough; a diffuser mounted on the illumination source side of the aperture layer; a projection lens system; and an image plane, in which a pupil image corresponding to each of the plurality of openings in the aperture layer is formed at the image plane when radiation from the illumination source passes through the reticle, the diffuser, the aperture layer and the projection lens system, the pupil image having a projection lens pupil transmission distribution.

摘要翻译： 一种用于确定光刻成像系统中的投影透镜光瞳透射分布的方法和装置，所述装置包括照明源; 透射式掩模版 具有照明源侧和发光侧的孔径层，并且包括穿过其的多个开口; 安装在孔层的照明源侧的扩散器; 投影透镜系统; 以及图像平面，其中当来自照明源的辐射通过掩模版，漫射器，孔径层和投影透镜系统时，在像面上形成与孔径层中的多个开口中的每一个对应的光瞳图像 ，瞳孔图像具有投影透镜瞳孔传播分布。

公开(公告)号：US06696847B1

公开(公告)日：2004-02-24

申请号：US09907311

申请日：2001-07-17

申请人： Bruno M. LaFontaine ,  Jongwook Kye ,  Harry Levinson

发明人： Bruno M. LaFontaine ,  Jongwook Kye ,  Harry Levinson

IPC分类号： G01R31302

CPC分类号： G01R1/24 ,  G01R31/024

摘要： In the present method of electrically testing the width of a line, a short pulse of laser energy is applied to the line to generate conductive electrons therein. An electrical potential is applied to the line to cause electrons to flow in the line, and current is measured to determine the width of the line.

摘要翻译： 在电测试线的宽度的本方法中，将短脉冲的激光能量施加到线以在其中产生导电电子。 对线路施加电势以使电子在线路中流动，并且测量电流以确定线路的宽度。

公开(公告)号：US07315033B1

公开(公告)日：2008-01-01

申请号：US11121437

申请日：2005-05-04

申请人： Adam R. Pawloski ,  Harry J. Levinson ,  Jongwook Kye

发明人： Adam R. Pawloski ,  Harry J. Levinson ,  Jongwook Kye

IPC分类号： A61N5/00

CPC分类号： G03F7/70341 ,  A61L2/10 ,  G03F7/70925

摘要： Disclosed are a method of reducing biological contamination in an immersion lithography system and an immersion lithography system configured to reduce biological contamination. A reflecting element and/or an irradiating element is used to direct radiation to kill biological contaminates present with respect to at least one of i) a volume adjacent a final element of the projection system or ii) an immersion medium supply device disposed adjacent the final element.

摘要翻译： 公开了一种降低浸没式光刻系统中的生物污染物的方法以及被配置为减少生物污染的浸没式光刻系统。 反射元件和/或照射元件用于引导辐射以杀死相对于i）与投影系统的最终元件相邻的体积中的至少一个存在的生物污染物，或ii）与最终的邻近设置的浸没介质供给装置 元件。

公开(公告)号：US20080259458A1

公开(公告)日：2008-10-23

申请号：US11788355

申请日：2007-04-18

申请人： Bruno M. LaFontaine ,  Ryoung-Han Kim ,  Jongwook Kye

发明人： Bruno M. LaFontaine ,  Ryoung-Han Kim ,  Jongwook Kye

IPC分类号： G02B5/18

CPC分类号： G03F7/70158 ,  G03F7/70091

摘要： According to one exemplary embodiment, an EUV (extreme ultraviolet) optical element in a light path between an EUV light source and a semiconductor wafer includes a reflective film having a number of bilayers. The reflective film includes a pattern, where the pattern causes a change in incident EUV light from the EUV light source, thereby controlling illumination at a pupil plane of an EUV projection optic to form a printed field on the semiconductor wafer. The EUV optical element can be utilized in an EUV lithographic process to fabricate a semiconductor die.

摘要翻译： 根据一个示例性实施例，EUV光源和半导体晶片之间的光路中的EUV（极紫外）光学元件包括具有多个双层的反射膜。 反射膜包括图案，其中图案引起来自EUV光源的入射EUV光的变化，由此控制EUV投影光学器件的光瞳面处的照明，以在半导体晶片上形成印刷场。 EUV光学元件可以用于EUV光刻工艺以制造半导体管芯。

公开(公告)号：US08889561B2

公开(公告)日：2014-11-18

申请号：US13709541

申请日：2012-12-10

申请人： Youngtag Woo ,  Jongwook Kye ,  Dinesh Somasekhar

发明人： Youngtag Woo ,  Jongwook Kye ,  Dinesh Somasekhar

IPC分类号： H01L21/308 ,  H01L21/8238 ,  H01L27/11 ,  H01L27/088

CPC分类号： H01L27/1108 ,  H01L21/3086 ,  H01L21/3088 ,  H01L21/823431 ,  H01L21/823821 ,  H01L27/0886 ,  H01L27/11

摘要： Methodology enabling a generation of fins having a variable fin pitch less than 40 nm, and the resulting device are disclosed. Embodiments include: forming a hardmask on a substrate; providing first and second mandrels on the hardmask; providing a first spacer on each side of each of the first and second mandrels; removing the first and second mandrels; providing, after removal of the first and second mandrels, a second spacer on each side of each of the first spacers; and removing the first spacers.

摘要翻译： 公开了能够产生具有可变翅片间距小于40nm的翅片的方法，并且所得到的装置被公开。 实施例包括：在基板上形成硬掩模; 在硬掩模上提供第一和第二心轴; 在每个第一和第二心轴的每一侧上提供第一间隔件; 去除第一和第二心轴; 在移除所述第一和第二心轴之后，在每个所述第一间隔件的每一侧上提供第二间隔件; 并移除第一间隔物。

公开(公告)号：US20140159164A1

公开(公告)日：2014-06-12

申请号：US13709541

申请日：2012-12-10

申请人： Youngtag WOO ,  Jongwook Kye ,  Dinesh Somasekhar

发明人： Youngtag WOO ,  Jongwook Kye ,  Dinesh Somasekhar

IPC分类号： H01L21/308 ,  H01L27/088

CPC分类号： H01L27/1108 ,  H01L21/3086 ,  H01L21/3088 ,  H01L21/823431 ,  H01L21/823821 ,  H01L27/0886 ,  H01L27/11

摘要： Methodology enabling a generation of fins having a variable fin pitch less than 40 nm, and the resulting device are disclosed. Embodiments include: forming a hardmask on a substrate; providing first and second mandrels on the hardmask; providing a first spacer on each side of each of the first and second mandrels; removing the first and second mandrels; providing, after removal of the first and second mandrels, a second spacer on each side of each of the first spacers; and removing the first spacers.

公开(公告)号：US20140068543A1

公开(公告)日：2014-03-06

申请号：US13603304

申请日：2012-09-04

申请人： Lei Yuan ,  Jongwook Kye

发明人： Lei Yuan ,  Jongwook Kye

IPC分类号： G06F17/50

CPC分类号： G06F17/5072 ,  G06F17/5077

摘要： A method for enabling jogging functionality in circuit designs utilizing DPT without the need for difficult to implement tools such as stitch-aware routing tools is disclosed. Embodiments include: displaying a user interface for generating an IC having a plurality of masks for a single layer; causing, at least in part, a presentation in the user interface of a cell placement of the IC that includes a filler cell; and designating a portion of the filler cell as a routing zone, the routing zone being configured such that routes placed in the routing zone are decomposable with other routes placed outside the filler cell.

摘要翻译： 公开了一种使用DPT实现电路设计中的点动功能的方法，而不需要难以实现诸如针迹感知路由工具的工具。 实施例包括：显示用于生成具有用于单层的多个掩模的IC的用户界面; 至少部分地使得包括填充单元的IC的单元放置的用户界面中的呈现; 并且将所述填充单元的一部分指定为路由区域，所述路由区域被配置为使得放置在所述路由区域中的路由可以与放置在所述填充单元之外的其他路由分解。

公开(公告)号：US20130298089A1

公开(公告)日：2013-11-07

申请号：US13465909

申请日：2012-05-07

申请人： Lei Yuan ,  Hidekazu Yoshida ,  Youngtag Woo ,  Jongwook Kye

发明人： Lei Yuan ,  Hidekazu Yoshida ,  Youngtag Woo ,  Jongwook Kye

IPC分类号： G06F17/50

CPC分类号： G06F17/5077 ,  G06F2217/12 ,  Y02P90/265

摘要： A method for increasing the robustness of a double patterning router used in the manufacture of integrated circuit devices that includes providing a set of original color rules defining an original color rule space, providing a set of integrated circuit designs defining a design space, providing a router processing engine, perturbing the original color rules to define a perturbed color rule space, applying the perturbed color rule space and the design space to the router processing engine to expose double pattern routing odd cycle decomposition errors, and feeding back the exposed decomposition errors to enhance router processing engine development by reconfiguring the router processing engine in accordance with the exposed decomposition errors.

摘要翻译： 一种用于增加用于制造集成电路器件的双重图案化路由器的鲁棒性的方法，其包括提供定义原始颜色规则空间的一组原始颜色规则，提供定义设计空间的一组集成电路设计，提供路由器 处理引擎，扰乱原始颜色规则以定义扰动的颜色规则空间，将扰动的颜色规则空间和设计空间应用于路由器处理引擎以暴露双模式路由奇数周期分解错误，并反馈暴露的分解错误以增强 通过根据暴露的分解错误重新配置路由器处理引擎来开发路由器处理引擎。