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1.发明授权Structure including via having refractory metal collar at copper wire and dielectric layer liner-less interface and related method 有权结构包括通过铜线上的难熔金属环和绝缘层无衬里界面及相关方法公开(公告)号：US07859113B2
公开(公告)日：2010-12-28
申请号：US11679483
申请日：2007-02-27
IPC分类号： H01L23/48
CPC分类号： H01L21/76814 , H01L21/76805 , H01L21/76843 , H01L21/76849 , H01L23/53223 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： Structures including a refractory metal collar at a copper wire and dielectric layer liner-less interface, and a related method, are disclosed. In one embodiment, a structure includes a copper wire having a liner-less interface with a dielectric layer thereabove; a via extending upwardly from the copper wire through the dielectric layer; and a refractory metal collar extending from a side of the via and partially along the liner-less interface. Refractory metal collar prevents electromigration induced slit voiding by improving the interface around the via, and prevents void nucleation from occurring near the via. Also, the refractory metal collar provides electrical redundancy in the presence of voids around the via and dielectric layer liner-less interface.
摘要翻译： 公开了包括铜线处的难熔金属环和介电层无衬里界面的结构以及相关方法。 在一个实施例中，一种结构包括具有与其上方的介电层无衬层界面的铜线; 从铜线向上延伸穿过介电层的通孔; 以及从所述通孔的一侧延伸并部分地沿着所述无衬里界面延伸的耐火金属套环。 耐火金属轴环通过改善通孔周围的界面防止电迁移引起的狭缝空隙，并防止在通孔附近发生空隙成核。 此外，难熔金属套环在通孔和介电层无衬里界面周围存在空隙的情况下提供电冗余。
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2.发明申请公开(公告)号：US20080203570A1
公开(公告)日：2008-08-28
申请号：US11679483
申请日：2007-02-27
IPC分类号： H01L23/48 , H01L21/4763
CPC分类号： H01L21/76814 , H01L21/76805 , H01L21/76843 , H01L21/76849 , H01L23/53223 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： Structures including a refractory metal collar at a copper wire and dielectric layer liner-less interface, and a related method, are disclosed. In one embodiment, a structure includes a copper wire having a liner-less interface with a dielectric layer thereabove; a via extending upwardly from the copper wire through the dielectric layer; and a refractory metal collar extending from a side of the via and partially along the liner-less interface. Refractory metal collar prevents electromigration induced slit voiding by improving the interface around the via, and prevents void nucleation from occurring near the via. Also, the refractory metal collar provides electrical redundancy in the presence of voids around the via and dielectric layer liner-less interface.
摘要翻译： 公开了包括铜线处的难熔金属环和介电层无衬里界面的结构以及相关方法。 在一个实施例中，一种结构包括具有与其上方的介电层无衬层界面的铜线; 从铜线向上延伸穿过介电层的通孔; 以及从所述通孔的一侧延伸并部分地沿着所述无衬里界面延伸的耐火金属套环。 耐火金属轴环通过改善通孔周围的界面防止电迁移引起的狭缝空隙，并防止在通孔附近发生空隙成核。 此外，难熔金属套环在通孔和介电层无衬里界面周围存在空隙的情况下提供电冗余。
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3.发明申请AIR GAP STRUCTURE HAVING PROTECTIVE METAL SILICIDE PADS ON A METAL FEATURE 有权在金属特征上具有保护性金属硅化物垫的气隙结构公开(公告)号：US20110092067A1
公开(公告)日：2011-04-21
申请号：US12972808
申请日：2010-12-20
申请人： Griselda Bonilla , Daniel C. Edelstein , Satyanarayana V. Nitta , Takeshi Nogami , Shom Ponoth , David L. Rath , Chih-Chao Yang
发明人： Griselda Bonilla , Daniel C. Edelstein , Satyanarayana V. Nitta , Takeshi Nogami , Shom Ponoth , David L. Rath , Chih-Chao Yang
IPC分类号： H01L21/4763
CPC分类号： H01L23/5222 , H01L21/31144 , H01L21/7682 , H01L21/76849 , H01L21/76852 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A hard mask is formed on an interconnect structure comprising a low-k material layer and a metal feature embedded therein. A block polymer is applied to the hard mask layer, self-assembled, and patterned to form a polymeric matrix of a polymeric block component and containing cylindrical holes. The hard mask and the low-k material layer therebelow are etched to form cavities. A conductive material is plated on exposed metallic surfaces including portions of top surfaces of the metal feature to form metal pads. Metal silicide pads are formed by exposure of the metal pads to a silicon containing gas. An etch is performed to enlarge and merge the cavities in the low-k material layer. The metal feature is protected from the etch by the metal silicide pads. An interconnect structure having an air gap and free of defects to surfaces of the metal feature is formed.
摘要翻译： 在包括低k材料层和嵌入其中的金属特征的互连结构上形成硬掩模。 将嵌段聚合物施加到硬掩模层上，自组装和图案化以形成聚合物嵌段组分的聚合物基质并且包含圆柱形孔。 蚀刻硬掩模和低k材料层以形成空腔。 导电材料镀在暴露的金属表面上，包括金属特征的顶表面的部分以形成金属垫。 金属硅化物焊盘通过将金属焊盘暴露于含硅气体而形成。 进行蚀刻以放大和合并低k材料层中的空腔。 通过金属硅化物焊盘防止金属特征被蚀刻。 形成具有空隙并且没有金属特征表面的缺陷的互连结构。
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4.发明授权Air gap structure having protective metal silicide pads on a metal feature 有权气隙结构在金属特征上具有保护性金属硅化物焊盘公开(公告)号：US07884477B2
公开(公告)日：2011-02-08
申请号：US11949189
申请日：2007-12-03
申请人： Griselda Bonilla , Daniel C. Edelstein , Satyanarayana V. Nitta , Takeshi Nogami , Shom Ponoth , David L. Rath , Chih-Chao Yang
发明人： Griselda Bonilla , Daniel C. Edelstein , Satyanarayana V. Nitta , Takeshi Nogami , Shom Ponoth , David L. Rath , Chih-Chao Yang
CPC分类号： H01L23/5222 , H01L21/31144 , H01L21/7682 , H01L21/76849 , H01L21/76852 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A hard mask is formed on an interconnect structure comprising a low-k material layer and a metal feature embedded therein. A block polymer is applied to the hard mask layer, self-assembled, and patterned to form a polymeric matrix of a polymeric block component and containing cylindrical holes. The hard mask and the low-k material layer therebelow are etched to form cavities. A conductive material is plated on exposed metallic surfaces including portions of top surfaces of the metal feature to form metal pads. Metal silicide pads are formed by exposure of the metal pads to a silicon containing gas. An etch is performed to enlarge and merge the cavities in the low-k material layer. The metal feature is protected from the etch by the metal silicide pads. An interconnect structure having an air gap and free of defects to surfaces of the metal feature is formed.
摘要翻译： 在包括低k材料层和嵌入其中的金属特征的互连结构上形成硬掩模。 将嵌段聚合物施加到硬掩模层上，自组装和图案化以形成聚合物嵌段组分的聚合物基质并且包含圆柱形孔。 蚀刻硬掩模和低k材料层以形成空腔。 导电材料镀在暴露的金属表面上，包括金属特征的顶表面的部分以形成金属垫。 金属硅化物焊盘通过将金属焊盘暴露于含硅气体而形成。 进行蚀刻以放大和合并低k材料层中的空腔。 通过金属硅化物焊盘防止金属特征被蚀刻。 形成具有空隙并且没有金属特征表面的缺陷的互连结构。
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5.发明申请FORMATION OF ALLOY LINER BY REACTION OF DIFFUSION BARRIER AND SEED LAYER FOR INTERCONNECT APPLICATION 有权通过扩散障碍物和种子层的反应形成合金内衬用于互连应用公开(公告)号：US20110017499A1
公开(公告)日：2011-01-27
申请号：US12509885
申请日：2009-07-27
CPC分类号： H01L21/76846 , H01L21/76844 , H01L21/76858 , H01L21/76867 , H01L21/76873 , H01L23/53238 , H01L2924/0002 , Y10T29/49117 , Y10T29/49155 , Y10T29/49165 , H01L2924/00
摘要： An interconnect structure including an alloy liner positioned directly between a diffusion barrier and a Cu alloy seed layer as well as methods for forming such an interconnect structure are provided. The alloy liner of the present invention is formed by thermally reacting a previously deposited diffusion barrier metal alloy layer with an overlying Cu alloy seed layer. During the thermal reaction, the metal alloys from both the diffusion barrier and the Cu alloys seed layer react forming a metal alloy reaction product between the diffusion barrier and the Cu seed layer.
摘要翻译： 提供了包括直接位于扩散阻挡层和Cu合金种子层之间的合金衬垫的互连结构以及用于形成这种互连结构的方法。 本发明的合金衬垫通过使预先沉积的扩散阻挡金属合金层与覆盖的Cu合金种子层热反应形成。 在热反应期间，来自扩散阻挡层和Cu合金种子层的金属合金在扩散阻挡层和Cu籽晶层之间反应形成金属合金反应产物。
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6.发明授权Formation of alloy liner by reaction of diffusion barrier and seed layer for interconnect application 有权通过扩散阻挡层和种子层的反应形成合金衬里，用于互连应用公开(公告)号：US09245794B2
公开(公告)日：2016-01-26
申请号：US13614492
申请日：2012-09-13
IPC分类号： H05K1/09 , H01L21/768 , H01L23/532
CPC分类号： H01L21/76846 , H01L21/76844 , H01L21/76858 , H01L21/76867 , H01L21/76873 , H01L23/53238 , H01L2924/0002 , Y10T29/49117 , Y10T29/49155 , Y10T29/49165 , H01L2924/00
摘要： An interconnect structure including an alloy liner positioned directly between a diffusion barrier and a Cu alloy seed layer as well as methods for forming such an interconnect structure are provided. The alloy liner of the present invention is formed by thermally reacting a previously deposited diffusion barrier metal alloy layer with an overlying Cu alloy seed layer. During the thermal reaction, the metal alloys from the both the diffusion barrier and the Cu alloys seed layer react forming a metal alloy reaction product between the diffusion barrier and the Cu seed layer.
摘要翻译： 提供了包括直接位于扩散阻挡层和Cu合金种子层之间的合金衬垫的互连结构以及用于形成这种互连结构的方法。 本发明的合金衬垫通过使预先沉积的扩散阻挡金属合金层与覆盖的Cu合金种子层热反应形成。 在热反应期间，来自扩散阻挡层和Cu合金种子层的金属合金在扩散阻挡层和Cu籽晶层之间反应形成金属合金反应产物。
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公开(公告)号：US07956463B2
公开(公告)日：2011-06-07
申请号：US12560878
申请日：2009-09-16
IPC分类号： H01L23/48
CPC分类号： H01L21/76871 , H01L21/76846 , H01L21/76868 , H01L21/76883
摘要： An interconnect structure having reduced electrical resistance and a method of forming such an interconnect structure are provided. The interconnect structure includes a dielectric material including at least one opening therein. The at least one opening is filled with an optional barrier diffusion layer, a grain growth promotion layer, an agglomerated plating seed layer, an optional second plating seed layer a conductive structure. The conductive structure which includes a metal-containing conductive material, typically Cu, has a bamboo microstructure and an average grain size of larger than 0.05 microns. In some embodiments, the conductive structure includes conductive grains that have a (111) crystal orientation.
摘要翻译： 提供具有降低的电阻的互连结构和形成这种互连结构的方法。 互连结构包括其中包括至少一个开口的电介质材料。 至少一个开口填充有可选的阻挡扩散层，晶粒生长促进层，聚集的电镀种子层，任选的第二电镀种子层，导电结构。 包含含金属的导电材料（通常为Cu）的导电结构具有竹结构，平均晶粒尺寸大于0.05微米。 在一些实施例中，导电结构包括具有（111）晶体取向的导电晶粒。
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公开(公告)号：US20110062587A1
公开(公告)日：2011-03-17
申请号：US12560878
申请日：2009-09-16
IPC分类号： H01L23/522 , H01L21/768
CPC分类号： H01L21/76871 , H01L21/76846 , H01L21/76868 , H01L21/76883
摘要： An interconnect structure having reduced electrical resistance and a method of forming such an interconnect structure are provided. The interconnect structure includes a dielectric material including at least one opening therein. The at least one opening is filled with an optional barrier diffusion layer, a grain growth promotion layer, an agglomerated plating seed layer, an optional second plating seed layer a conductive structure. The conductive structure which includes a metal-containing conductive material, typically Cu, has a bamboo microstructure and an average grain size of larger than 0.05 microns. In some embodiments, the conductive structure includes conductive grains that have a (111) crystal orientation.
摘要翻译： 提供具有降低的电阻的互连结构和形成这种互连结构的方法。 互连结构包括其中包括至少一个开口的电介质材料。 至少一个开口填充有可选的阻挡扩散层，晶粒生长促进层，聚集的电镀种子层，任选的第二电镀种子层，导电结构。 包含含金属的导电材料（通常为Cu）的导电结构具有竹结构，平均晶粒尺寸大于0.05微米。 在一些实施例中，导电结构包括具有（111）晶体取向的导电晶粒。
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9.发明申请AIR GAP STRUCTURE HAVING PROTECTIVE METAL SILICIDE PADS ON A METAL FEATURE 有权在金属特征上具有保护性金属硅化物垫的气隙结构公开(公告)号：US20090140428A1
公开(公告)日：2009-06-04
申请号：US11949189
申请日：2007-12-03
申请人： Griselda Bonilla , Daniel C. Edelstein , Satyanarayana V. Nitta , Takeshi Nogami , Shom Ponoth , David L. Rath , Chih-Chao Yang
发明人： Griselda Bonilla , Daniel C. Edelstein , Satyanarayana V. Nitta , Takeshi Nogami , Shom Ponoth , David L. Rath , Chih-Chao Yang
IPC分类号： H01L23/52 , H01L21/4763
CPC分类号： H01L23/5222 , H01L21/31144 , H01L21/7682 , H01L21/76849 , H01L21/76852 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A hard mask is formed on an interconnect structure comprising a low-k material layer and a metal feature embedded therein. A block polymer is applied to the hard mask layer, self-assembled, and patterned to form a polymeric matrix of a polymeric block component and containing cylindrical holes. The hard mask and the low-k material layer therebelow are etched to form cavities. A conductive material is plated on exposed metallic surfaces including portions of top surfaces of the metal feature to form metal pads. Metal silicide pads are formed by exposure of the metal pads to a silicon containing gas. An etch is performed to enlarge and merge the cavities in the low-k material layer. The metal feature is protected from the etch by the metal silicide pads. An interconnect structure having an air gap and free of defects to surfaces of the metal feature is formed.
摘要翻译： 在包括低k材料层和嵌入其中的金属特征的互连结构上形成硬掩模。 将嵌段聚合物施加到硬掩模层上，自组装和图案化以形成聚合物嵌段组分的聚合物基质并且包含圆柱形孔。 蚀刻硬掩模和低k材料层以形成空腔。 导电材料镀在暴露的金属表面上，包括金属特征的顶表面的部分以形成金属垫。 金属硅化物焊盘通过将金属焊盘暴露于含硅气体而形成。 进行蚀刻以放大和合并低k材料层中的空腔。 通过金属硅化物焊盘防止金属特征被蚀刻。 形成具有空隙并且没有金属特征表面的缺陷的互连结构。
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10.发明授权公开(公告)号：US07951708B2
公开(公告)日：2011-05-31
申请号：US12477389
申请日：2009-06-03
申请人： Patrick W. DeHaven , Daniel C. Edelstein , Philip L. Flaitz , Takeshi Nogami , Stephen M. Rossnagel , Chih-Chao Yang
发明人： Patrick W. DeHaven , Daniel C. Edelstein , Philip L. Flaitz , Takeshi Nogami , Stephen M. Rossnagel , Chih-Chao Yang
IPC分类号： H01L21/44
CPC分类号： H01L21/2855 , H01L21/76805 , H01L21/76807 , H01L21/76843 , H01L21/76844 , H01L21/76846 , Y10T428/24917
摘要： A method of forming a diffusion barrier for use in semiconductor device manufacturing includes depositing, by a physical vapor deposition (PVD) process, an iridium doped, tantalum based barrier layer over a patterned interlevel dielectric (ILD) layer, wherein the barrier layer is deposited with an iridium concentration of at least 60 atomic % such that the barrier layer has a resulting amorphous structure.
摘要翻译： 形成用于半导体器件制造的扩散阻挡层的方法包括通过物理气相沉积（PVD）工艺将沉积有铱掺杂的钽基阻挡层沉积在图案化层间电介质（ILD）层上，其中阻挡层被沉积 其铱浓度至少为60原子％，使得阻挡层具有所得的无定形结构。
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