公开(公告)号：US06801950B1

公开(公告)日：2004-10-05

申请号：US09668339

申请日：2000-09-25

申请人： Daniel M O'Keeffe ,  Mark A Hughes ,  Kevin Loughran ,  Paul J Moran

发明人： Daniel M O'Keeffe ,  Mark A Hughes ,  Kevin Loughran ,  Paul J Moran

IPC分类号： G06F15173

CPC分类号： H04L45/00 ,  H04L45/245 ,  Y02D50/30

摘要： In a stack of network units each includes a multiplicity of ports for receiving and forwarding addressed data packets and a forwarding engine which in response to address data selects at least one port for the forwarding of a data packet. A cascade connects the units and allows the transmission of a packet placed on said cascade by a unit to all the other units. Each unit is responsive to a packet received from the cascade to forward or discard the received packet according to predetermined forwarding rules. A trunk includes a respective port of each of some but not necessarily all the units. Each unit includes a ‘trunk box member’ register indicating which of the units has at least one port connected in the trunk When a first unit in the stack receives, at a port connected neither to the trunk nor the cascade, a packet destined for the trunk, the first unit directs that packet to a port connected to the trunk if the first unit has such a port and otherwise sends that packet to the cascade. When a second unit in the stack, having a port connected to the trunk, receives by way of the cascade from the first unit a packet destined for the trunk, the second unit determines with recourse to the forwarding rules, data identifying the first unit and the respective register whether to forward said packet to the trunk. The invention is particularly intended for use in stack-wide trunks operating according to ‘local forwarding’ and ‘next-in-line’ rules and allows units in the stack to be omitted from direct connection to the trunk.

摘要翻译： 在一堆网络单元中，每个端口包括用于接收和转发寻址数据分组的多个端口，以及响应于地址数据选择至少一个用于转发数据分组的端口的转发引擎。 级联连接单元，并允许将放置在所述级联上的分组传输到所有其他单元。 每个单元响应于从级联接收的分组，以根据预定的转发规则转发或丢弃所接收的分组。 一个中继线包括一些但不一定是所有单元的相应端口。 每个单元包括一个“中继箱成员”寄存器，指示哪个单元具有连接在中继中的至少一个端口当堆叠中的第一单元在不连接到中继线和级联的端口处接收到目的地为 中继，如果第一个单元有这样的端口，则第一个单元将该数据包引导到连接到中继的端口，否则将该数据包发送到级联。 当堆叠中具有连接到中继线的端口的第二单元通过级联从第一单元接收到目的地为中继线的分组时，第二单元依据转发规则来确定标识第一单元的数据，以及 相应的寄存器是否将所述分组转发到中继线。 本发明特别旨在用于根据“本地转发”和“下一排”规则操作的堆叠宽中继，并且允许从与直接连接到中继线的堆叠中省略单元。

公开(公告)号：US06801527B1

公开(公告)日：2004-10-05

申请号：US09562131

申请日：2000-05-01

申请人： Daniel M O'Keeffe ,  Kevin Loughran ,  Mark A Hughes ,  Paul J Moran

发明人： Daniel M O'Keeffe ,  Kevin Loughran ,  Mark A Hughes ,  Paul J Moran

IPC分类号： H04L1256

CPC分类号： H04L45/745 ,  H04L49/103 ,  H04L49/351

摘要： A network switch comprises a multiplicity of ports for receiving and forwarding addressed data packets, a forwarding engine for directing packets received at the ports to at least one other port, a register for storing unit identifications of a set of units including the network unit, and hashing logic for selecting one of the unit identifications in response to address data in a packet. The forwarding engine makes a determination whether the one of the unit identifications corresponds to the network unit and is operative to direct the packet in accordance with that determination. The use of the register enables a substantial increase in the number of ports that can be members of a stack-wide trunk.

摘要翻译： 网络交换机包括用于接收和转发寻址的数据分组的多个端口，用于将在端口处接收到的分组指向至少一个其他端口的转发引擎，用于存储包括网络单元的一组单元的单元标识的寄存器，以及 用于响应于分组中的地址数据来选择单元标识之一的散列逻辑。 转发引擎确定单元标识中的一个是否对应于网络单元，并且可操作以根据该确定来指导分组。 使用寄存器可以大大增加可以作为堆栈宽中继线的成员的端口数量。

公开(公告)号：US06763348B2

公开(公告)日：2004-07-13

申请号：US09731855

申请日：2000-12-08

申请人： Daniel M O'Keeffe ,  Mark A Hughes ,  Kevin Loughran ,  John Hickey ,  Paul O'Keeffe

发明人： Daniel M O'Keeffe ,  Mark A Hughes ,  Kevin Loughran ,  John Hickey ,  Paul O'Keeffe

IPC分类号： G06F1730

CPC分类号： G06F17/30961 ,  Y10S707/99933

摘要： A trie searching technique employs entries each including a pointer to the next block in the search and a status indication and also including start and end indexes which define a selected section of the trie key identifying an entry within the block identified by the pointer. Thereby the program for selection of the search key is defined by the trie entries themselves, enabling a general variety of search selections and jumps to avoid any unnecessary parts of the trie search key.

摘要翻译： 特里搜索技术采用各自包括指向搜索中的下一个块的指针的条目和状态指示，并且还包括起始和终止索引，该起始和终止索引定义了标识由指针识别的块内的条目的特里键的选定部分。 因此，用于选择搜索关键字的程序由特里条目本身定义，使得能够进行各种各样的搜索选择和跳转以避免特里搜索关键字的任何不必要的部分。

公开(公告)号：US07366168B2

公开(公告)日：2008-04-29

申请号：US09824241

申请日：2001-04-03

申请人： Mark A Hughes ,  Daniel M O'Keeffe ,  Kevin Loughran ,  Joseph N Butler

发明人： Mark A Hughes ,  Daniel M O'Keeffe ,  Kevin Loughran ,  Joseph N Butler

IPC分类号： H04L12/56

CPC分类号： H04L47/193 ,  H04L47/10 ,  H04L47/125 ,  H04L47/2433

摘要： A method and switch for controlling the allocation of priority of TCP packets, more particularly for distinguishing between data and control packets and assigning an increased priority to control packets. The layer 4 information in the form of the flag bits of the header are snooped in the switch to determine whether any flag other than PSH is set and if so to allocate a priority to that packet, which will usually be a higher priority than data packets.

摘要翻译： 一种用于控制TCP分组的优先级分配的方法和开关，更具体地说是用于区分数据和控制分组，并且将增加的优先级分配给控制分组。 标头中标志位形式的层4信息被窥探在交换机中，以确定是否设置了除PSH之外的任何标志，如果是，则为该分组分配优先级，这通常比数据包更高优先级 。

公开(公告)号：US06438717B1

公开(公告)日：2002-08-20

申请号：US09436350

申请日：1999-11-09

申请人： Joseph N Butler ,  Mark A Hughes ,  Neil O Fanning ,  Eugene O'Neill ,  Una Quinlan

发明人： Joseph N Butler ,  Mark A Hughes ,  Neil O Fanning ,  Eugene O'Neill ,  Una Quinlan

IPC分类号： G06F1100

CPC分类号： H04L1/20 ,  H04L1/0001 ,  H04L25/14

摘要： A high speed link between chips and comprising a multiplicity of synchronous serial data channels includes an onboard detector for detecting an error rate for each channel. The transmitter and the receiver chips are configured in response to the detector to select the channel having the lowest error rate as the control channel and optionally to render at least the channel with the highest error rate inactive.

摘要翻译： 芯片之间的高速链路包括多个同步串行数据信道，包括用于检测每个信道的错误率的板上检测器。 响应于检测器配置发射机和接收机芯片，以选择具有最低误码率的信道作为控制信道，并且可选地使至少具有最高错误率的信道无效。

公开(公告)号：US20100078358A1

公开(公告)日：2010-04-01

申请号：US12241126

申请日：2008-09-30

申请人： Erin E Tullos ,  Mark A Hughes ,  John Michael Hays ,  Joseph B Cross

发明人： Erin E Tullos ,  Mark A Hughes ,  John Michael Hays ,  Joseph B Cross

IPC分类号： C10G21/00

CPC分类号： B01D11/0492 ,  C10G17/07 ,  C10G27/00 ,  C10G2300/1033 ,  C10G2300/205

摘要： A process is disclosed for decreasing the level of elemental mercury contained in a liquid hydrocarbon stream by a) contacting the liquid hydrocarbon stream with a water stream containing an oxidizing agent for conversion of at least a portion of the Hg(0) to Hg(II); b) extracting at least a portion of the Hg(II) from the liquid hydrocarbon stream into the water stream, thereby forming a treated liquid hydrocarbon stream and a waste water stream containing water and Hg(II); and c) separating the treated liquid hydrocarbon stream from the waste water stream.

摘要翻译： 公开了一种用于通过以下步骤来降低液态烃流中所含的元素汞的水平：a）使液体烃流与含有氧化剂的水流接触，以将至少一部分Hg（0）转化为Hg（II ）; b）将至少一部分Hg（II）从液态烃流中提取到水流中，从而形成经处理的液态烃流和含有水和Hg（II）的废水流; 和c）将经处理的液体烃流与废水流分离。

公开(公告)号：US06543027B1

公开(公告)日：2003-04-01

申请号：US09671121

申请日：2000-09-28

申请人： Mark A Hughes ,  Joseph N Butler ,  Neil O Fanning

发明人： Mark A Hughes ,  Joseph N Butler ,  Neil O Fanning

IPC分类号： G06F1100

CPC分类号： G11C7/1018 ,  G11C7/1072 ,  G11C29/14

摘要： An application specific integrated circuit includes a clock recovery circuit which recovers from an input signal a repetitive sequence of data values wherein no two consecutive values are the same and a recovered clock. An address generator responds to the recovered clock to cause storage of the data values in said memory in a set of locations having addresses generated by the address generator, so that the address generated by the generator increments in response to a repetitive transition in the recovered clock. The existence of a clock glitch is found by reading the data values from the set of locations to determine whether any two consecutive locations contain the same data value.

摘要翻译： 专用集成电路包括时钟恢复电路，其从输入信号中恢复其中没有两个连续值相同的数据值的重复序列和恢复的时钟。 地址发生器响应于恢复的时钟，以使得存储器中的数据值存储在具有由地址发生器产生的地址的一组位置中，使得由发生器产生的地址响应于恢复的时钟中的重复转换而递增 。 通过读取位置集合中的数据值来确定是否有任何两个连续的位置包含相同的数据值来发现存在时钟毛刺。