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    Cross point memory array using distinct voltages
    5.
    发明授权
    Cross point memory array using distinct voltages 有权
    交叉点存储器阵列使用不同的电压

    公开(公告)号：US06831854B2

    公开(公告)日：2004-12-14

    申请号：US10330964

    申请日：2002-12-26

    申请人： Darrell Rinerson ,  Steven W. Longcor ,  Christophe J. Chevallier ,  Edmond R. Ward ,  Wayne Kinney ,  Steve Kuo-Ren Hsia

    发明人： Darrell Rinerson ,  Steven W. Longcor ,  Christophe J. Chevallier ,  Edmond R. Ward ,  Wayne Kinney ,  Steve Kuo-Ren Hsia

    IPC分类号： G11C1102

    CPC分类号： G11C13/0007 ,  G11C11/5685 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/009 ,  G11C2213/31 ,  G11C2213/77

    摘要： Cross point memory array using distinct voltages. The invention is a cross point memory array that applies a first select voltage on one conductive array line, a second select voltage on a second conductive array line, the two conductive array lines uniquely defining a single memory plug. The magnitude of the select voltages depends upon whether a read operation or a write operation is occurring. Additionally, an unselect voltage is applied to the unselected conductive array lines. The unselect voltage can be applied before, after or during the selection process. The unselect voltage is approximately equal to the average of the first select voltage and the second select voltage.

    摘要翻译： 交叉点存储器阵列使用不同的电压。 本发明是一种交叉点存储器阵列，其在一个导电阵列线上施加第一选择电压，在第二导电阵列线上施加第二选择电压，所述两个导电阵列线唯一地限定单个存储器插头。 选择电压的大小取决于是否发生读取操作或写入操作。 此外，未选择的电压被施加到未选择的导电阵列线。 可以在选择过程之前，之后或期间施加取消选择电压。 取消选择电压近似等于第一选择电压和第二选择电压的平均值。

    Multiple modes of operation in a cross point array
    8.
    发明授权
    Multiple modes of operation in a cross point array 有权
    交叉点阵列中的多种操作模式

    公开(公告)号：US06909632B2

    公开(公告)日：2005-06-21

    申请号：US10921037

    申请日：2004-08-17

    申请人： Darrell Rinerson ,  Christophe J. Chevallier ,  Steven W. Longcor ,  Edmond R. Ward ,  Wayne Kinney ,  Steve Kuo-Ren Hsia

    发明人： Darrell Rinerson ,  Christophe J. Chevallier ,  Steven W. Longcor ,  Edmond R. Ward ,  Wayne Kinney ,  Steve Kuo-Ren Hsia

    IPC分类号： G11C11/56 ,  G11C13/00 ,  G11C11/00

    CPC分类号： G11C13/0007 ,  G11C11/5685 ,  G11C2213/31 ,  G11C2213/77

    摘要： Multiple modes of operation in a cross point array. The invention is a cross point array that uses a read voltage across a conductive array line pair during a read mode. The read voltage produces a read current that is indicative of a first program state when the read current is at a first level and indicative of a second program state when the read current is at a second level. The read current is ineffective to produce a change in program state. A first voltage pulse is used during a first write mode if a change from a second program state to a first program state is desired. A second voltage pulse is used during a second write mode if a change from the first program state to the second program state is desired.

    摘要翻译： 交叉点阵列中的多种操作模式。 本发明是在读取模式期间使用导电阵列线对上的读取电压的交叉点阵列。 当读取电流处于第一电平并且当读取电流处于第二电平时，读取电压产生指示第一编程状态的读取电流，并且指示第二编程状态。 读取电流无效，导致程序状态的变化。 如果希望从第二编程状态改变到第一编程状态，则在第一写入模式期间使用第一电压脉冲。 如果希望从第一编程状态改变到第二编程状态，则在第二写入模式期间使用第二电压脉冲。

    Cross point memory array with memory plugs exhibiting a characteristic hysteresis
    9.
    发明授权
    Cross point memory array with memory plugs exhibiting a characteristic hysteresis 有权
    具有显示特征滞后的存储插头的交叉点存储器阵列

    公开(公告)号：US06850429B2

    公开(公告)日：2005-02-01

    申请号：US10330900

    申请日：2002-12-26

    申请人： Darrell Rinerson ,  Steven W. Longcor ,  Steve Kuo-Ren Hsia ,  Wayne Kinney ,  Edmond R. Ward ,  Christophe J. Chevallier

    发明人： Darrell Rinerson ,  Steven W. Longcor ,  Steve Kuo-Ren Hsia ,  Wayne Kinney ,  Edmond R. Ward ,  Christophe J. Chevallier

    IPC分类号： G11C11/56 ,  G11C13/00 ,  G11C11/00

    CPC分类号： G11C13/0007 ,  G11C11/5685 ,  G11C2213/31 ,  G11C2213/77

    摘要： Providing a cross point, memory array with memory plugs exhibiting a characteristic hysteresis. The memory plugs exhibit a hysteresis that, in the low resistive state, the first write threshold voltage is the point above which any voltages applied across the memory plug have substantially no effect on the resistive state and below which a voltage pulse will alter the resistance of the memory plug. Similarly, in the high resistive state, the second write threshold voltage is the point below which any voltages applied across the memory plug have substantially no effect on the resistive state and above which a voltage pulse will alter the resistance of the memory plug. The read voltages applied to the memory plug are typically above the first write threshold voltage and lower than the second write threshold voltage.

    摘要翻译： 提供交叉点，具有显示特征滞后的存储插件的存储器阵列。 存储插头表现出滞后现象，在低电阻状态下，第一写入阈值电压是高于其上施加在存储器插头上的任何电压对电阻状态基本上没有影响的点，低于该电压脉冲将改变电阻 内存插头。 类似地，在高电阻状态下，第二写入阈值电压是低于施加在存储器插头上的任何电压对电阻状态基本上没有影响的点，并且高于该电压脉冲将改变存储器插头的电阻。 施加到存储器插头的读取电压通常高于第一写入阈值电压并低于第二写入阈值电压。