Method and system for more efficiently utilizing processors of a graphics system
    8.
    发明申请
    Method and system for more efficiently utilizing processors of a graphics system 审中-公开
    用于更有效地利用图形系统的处理器的方法和系统

    公开(公告)号:US20050001843A1

    公开(公告)日:2005-01-06

    申请号:US10910097

    申请日:2004-08-03

    IPC分类号: G06T15/00 G06F15/16 G06F15/80

    CPC分类号: G06T15/005

    摘要: A method and system for utilizing processor(s) and bypass processor(s) of a computer graphics system are disclosed. The processor(s) and bypass processor(s) render primitives, which are ordered based on their left corners. The method and system include providing a merge circuit, a distributor, a feedback circuit and a controller. The merge circuit determines left and right edges for each primitive. The distributor is coupled with feedback circuit and outputs a first portion of the primitives. The distributor provides a second portion of the primitives to the processor(s) and a third portion of the primitives to the bypass processor(s) if the first portion includes more primitives than there are processor(s). The second portion includes no more primitives than there are processor(s). The feedback circuit, coupled to the merge circuit, re-inputs a fourth portion of the primitives to the bypass processor(s) until the first portion has been rendered for a line.

    摘要翻译: 公开了一种利用计算机图形系统的处理器和旁路处理器的方法和系统。 处理器和旁路处理器渲染基于左角的基元。 该方法和系统包括提供合并电路,分配器,反馈电路和控制器。 合并电路确定每个图元的左右边缘。 分配器与反馈电路耦合并输出原语的第一部分。 如果第一部分包括比处理器更多的原语,则分发器将原语的第二部分提供给处理器,并将原语的第三部分提供给旁路处理器。 第二部分不包括比处理器更多的原语。 耦合到合并电路的反馈电路将原图的第四部分重新输入到旁路处理器,直到第一部分被渲染为一行。

    Method and system for efficiently loading primitives into processors of a graphics system

    公开(公告)号:US20050068324A1

    公开(公告)日:2005-03-31

    申请号:US10990838

    申请日:2004-11-16

    IPC分类号: G06T15/00 G06F15/16 G06F15/80

    CPC分类号: G06T15/005

    摘要: A method and system for more efficiently loading a plurality of primitives for a scene into processors of a computer graphics system is disclosed. Each primitive has a top and a bottom. The primitives are ordered based on the top of each primitive. The system and method include providing at least one input, a merge circuit, a distributor, a feedback circuit and a controller. The input(s) is for receiving data relating to each primitive. The merge circuit is coupled with the input(s) and adds the data for a primitive having a top not lower than a current line. The distributor is coupled with the feedback circuit, eliminates an expired primitive and outputs the data for remaining primitives after the expired primitive has been removed. The expired primitive has a bottom above the current line. The feedback circuit is coupled to the merge circuit and the distributor and re-inputs to the merge circuit the data for the remaining primitives. The controller controls the feedback circuit, the distributor and the merge circuit.

    Closed loop sub-carrier synchronization system
    10.
    发明授权
    Closed loop sub-carrier synchronization system 失效
    闭环子载波同步系统

    公开(公告)号:US07529330B2

    公开(公告)日:2009-05-05

    申请号:US12118124

    申请日:2008-05-09

    IPC分类号: H04L7/00

    CPC分类号: H04N9/78 H04N9/44

    摘要: A system and method for synchronizing sub-carriers in a signal processing system. Various aspects of the present invention may comprise method steps and structure that receive a sampled signal. Various aspects may produce a synchronization signal based on the sampled signal. Various aspects may generate and store a cropped version of the received sampled signal. Various aspects may read a cropped sampled signal from memory that corresponds to the received sampled signal. Various aspects may generate a restored sampled signal by adding samples to the cropped sampled signal read from memory. Various aspects may, based on the synchronization signal, output the restored sampled signal coarsely synchronized to the received sampled signal. Various aspects may determine a phase difference between the output restored sampled signal and the output received sub-carrier. Various aspects may adjust the phase of the restored sampled signal in response to the determined phase difference.

    摘要翻译: 一种用于在信号处理系统中同步子载波的系统和方法。 本发明的各个方面可以包括接收采样信号的方法步骤和结构。 各个方面可以基于采样信号产生同步信号。 各方面可以生成并存储所接收的采样信号的裁剪版本。 各个方面可以从对应于接收到的采样信号的存储器读取经裁剪的采样信号。 各个方面可以通过将样本添加到从存储器读取的经裁剪的采样信号来产生恢复的采样信号。 各个方面可以基于同步信号,将恢复的采样信号粗略地与接收的采样信号同步。 各个方面可以确定输出恢复的采样信号和输出接收的子载波之间的相位差。 响应于确定的相位差,各个方面可以调整恢复的采样信号的相位。