公开(公告)号：US08673791B2

公开(公告)日：2014-03-18

申请号：US13480831

申请日：2012-05-25

申请人： David J. Altknecht ,  Robert E. Erickson ,  Christopher O. Lada ,  Stuart Stephen Papworth Parkin ,  Mahesh Samant

发明人： David J. Altknecht ,  Robert E. Erickson ,  Christopher O. Lada ,  Stuart Stephen Papworth Parkin ,  Mahesh Samant

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： C23C14/042 ,  H01L21/02636

摘要： A shadow masking device for use in the semiconductor industry includes self-aligning mechanical components that permit shadow masks to be exchanged while maintaining precise alignment with the target substrate. The misregistration between any two of the various layers in the formed structure can be kept to less than 40 microns.

摘要翻译： 用于半导体工业的阴影掩蔽装置包括自对准机械部件，其允许在保持与目标基板的精确对准的同时更换荫罩。 形成的结构中的各层之间的任何两个之间的对准可以保持在小于40微米。

公开(公告)号：US08657352B2

公开(公告)日：2014-02-25

申请号：US13084435

申请日：2011-04-11

申请人： David J. Altknecht ,  Robert E. Erickson ,  Christopher O. Lada ,  Stuart Stephen Papworth Parkin ,  Mahesh Samant

发明人： David J. Altknecht ,  Robert E. Erickson ,  Christopher O. Lada ,  Stuart Stephen Papworth Parkin ,  Mahesh Samant

IPC分类号： H01L21/68 ,  H01L21/677

CPC分类号： H01L21/67742

摘要： A device for use in the semiconductor industry includes a robotic arm whose end effector includes at least two prongs designed to hold a substrate carrier. A pushing member located between the prongs can move independently of the prongs and is configured to exert force against the substrate carrier while the prongs are retracted from the substrate carrier, after the substrate carrier has been brought to its intended position. In this manner, the position of the substrate carrier is maintained at its intended position as the prongs are retracted. Each of the prongs may include a claw or gripping member for grasping the substrate carrier.

摘要翻译： 用于半导体工业的器件包括机器人臂，其末端执行器包括设计成保持衬底载体的至少两个插脚。 位于插脚之间的推动构件可以独立于插脚移动，并且被构造成在衬底载体已经达到其预定位置之后，当插脚从衬底载体缩回时，对衬底载体施加力。 以这种方式，当叉头缩回时，基板载体的位置保持在其预定位置。 每个插脚可以包括用于抓握衬底载体的爪或夹持构件。

公开(公告)号：US08936293B2

公开(公告)日：2015-01-20

申请号：US13333688

申请日：2011-12-21

申请人： Christopher O. Lada ,  Stuart Stephen Papworth Parkin ,  Mahesh Govind Samant

发明人： Christopher O. Lada ,  Stuart Stephen Papworth Parkin ,  Mahesh Govind Samant

IPC分类号： B66F19/00

CPC分类号： H01L21/67742 ,  H01L21/68707

摘要： A device for use in the semiconductor industry includes a robotic arm whose end effector includes electromagnetic means to hold a substrate carrier. A pushing member can move independently of a flat, spatula-like portion of the device and is configured to exert force against the substrate carrier while the spatula-like portion is retracted from the substrate carrier, after the substrate carrier has been brought to its intended position. In this manner, the position of the substrate carrier is maintained at its intended position as the spatula-like portion is retracted.

摘要翻译： 用于半导体工业的器件包括机器人臂，其末端执行器包括用于保持衬底载体的电磁装置。 推动构件可以独立于装置的平坦的刮铲状部分移动，并且构造成在基板载体已经达到其预期之后，当刮板状部分从基板载体缩回时，向基板载体施加力 位置。 以这种方式，当刮刀状部分缩回时，基板载体的位置保持在其预定位置。

公开(公告)号：US07149105B2

公开(公告)日：2006-12-12

申请号：US10785913

申请日：2004-02-24

申请人： Stephen L. Brown ,  Arunava Gupta ,  Ulrich Klostermann ,  Stuart Stephen Papworth Parkin ,  Wolfgang Raberg ,  Mahesh Samant

发明人： Stephen L. Brown ,  Arunava Gupta ,  Ulrich Klostermann ,  Stuart Stephen Papworth Parkin ,  Wolfgang Raberg ,  Mahesh Samant

IPC分类号： G11C11/00 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113

CPC分类号： H01L43/08 ,  G11C11/15

摘要： Methods of manufacturing MTJ memory cells and structures thereof. A diffusion barrier is disposed between an anti-ferromagnetic layer and a pinned layer of an MTJ memory cell to improve thermal stability of the MTJ memory cell. The diffusion barrier may comprise an amorphous material or a NiFe alloy. An amorphous material may be disposed adjacent a bottom surface of a tunnel junction, within a free layer, or both. An MTJ memory cell with improved thermal stability and decreased Neel coupling is achieved.

摘要翻译： 制造MTJ记忆单元的方法及其结构。 在反铁磁层和MTJ存储单元的被钉扎层之间设置扩散阻挡层，以改善MTJ存储单元的热稳定性。 扩散阻挡层可以包括无定形材料或NiFe合金。 无定形材料可以设置在隧道结的底表面附近，在自由层内或两者之间。 实现了具有改进的热稳定性和降低的Neel耦合的MTJ存储单元。

公开(公告)号：US08638601B1

公开(公告)日：2014-01-28

申请号：US13543061

申请日：2012-07-06

申请人： Stuart Stephen Papworth Parkin ,  Luc Thomas ,  See-Hun Yang

发明人： Stuart Stephen Papworth Parkin ,  Luc Thomas ,  See-Hun Yang

IPC分类号： G11C11/14

CPC分类号： G11C19/0841 ,  G11C11/14 ,  G11C11/161 ,  G11C11/1675

摘要： Magnetic wires that include cobalt, nickel, and platinum layers show improved domain wall motion properties, when the domain walls are driven by pulses of electrical current. These wires exhibit perpendicular magnetic anisotropy, thereby supporting the propagation of narrow domain walls. The direction of motion of the domain walls can be influenced by the order in which the platinum and cobalt layers are arranged.

摘要翻译： 当畴壁由电流脉冲驱动时，包括钴，镍和铂层的磁线显示改善的畴壁运动特性。 这些线表现出垂直的磁各向异性，从而支持窄畴壁的传播。 畴壁的运动方向可能受到排列铂和钴层的顺序的影响。

公开(公告)号：US08008097B2

公开(公告)日：2011-08-30

申请号：US12554420

申请日：2009-09-04

申请人： Stuart Stephen Papworth Parkin

发明人： Stuart Stephen Papworth Parkin

IPC分类号： H01L21/285

CPC分类号： H01L43/08 ,  H01L43/10 ,  H01L43/12

摘要： MgO tunnel barriers are formed by depositing a thin layer of Mg on a suitable underlayer, and then directing oxygen and additional Mg towards the Mg layer. The oxygen reacts with the additional Mg and the Mg in the Mg layer to form a MgO tunnel barrier that enjoys excellent tunneling characteristics. The MgO tunnel barriers so formed may be used in magnetic tunnel junctions having tunneling magnetoresistance (TMR) values of greater than 100%. The highest TMR values are observed for junctions that have been annealed and that have a (100) crystallographic orientation.

摘要翻译： 通过在合适的底层上沉积薄层的Mg，然后将氧和附加的Mg导向Mg层，形成MgO隧道势垒。 氧与Mg层中的附加Mg和Mg反应形成具有优异隧道特性的MgO隧道势垒。 如此形成的MgO隧道势垒可用于具有大于100％的隧道磁阻（TMR）值的磁隧道结。 观察到已经退火并具有（100）晶体取向的结的最高TMR值。

公开(公告)号：US20110140762A1

公开(公告)日：2011-06-16

申请号：US12636588

申请日：2009-12-11

申请人： Xin Jiang ,  Stuart Stephen Papworth Parkin ,  Mahesh Govind Samant ,  Cheng-Han Yang

发明人： Xin Jiang ,  Stuart Stephen Papworth Parkin ,  Mahesh Govind Samant ,  Cheng-Han Yang

IPC分类号： H03K17/00 ,  H01L45/00

CPC分类号： G11C11/5685 ,  C23C14/081 ,  C23C14/35 ,  G11C11/5671 ,  G11C13/0007 ,  G11C13/003 ,  G11C13/0069 ,  G11C17/16 ,  G11C17/165 ,  G11C2013/0073 ,  G11C2013/009 ,  G11C2213/76 ,  G11C2213/79 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1616 ,  H01L45/165

摘要： Nitrogen-doped MgO insulating layers exhibit voltage controlled resistance states, e.g., a high resistance and a low resistance state. Patterned nano-devices on the 100 nm scale show highly reproducible switching characteristics. The voltage levels at which such devices are switched between the two resistance levels can be systematically lowered by increasing the nitrogen concentration. Similarly, the resistance of the high resistance state can be varied by varying the nitrogen concentration, and decreases by orders of magnitude by varying the nitrogen concentrations by a few percent. On the other hand, the resistance of the low resistance state is nearly insensitive to the nitrogen doping level. The resistance of single Mg50O50-xNx layer devices can be varied over a wide range by limiting the current that can be passed during the SET process. Associated data storage devices can be constructed.

摘要翻译： 氮掺杂的MgO绝缘层表现出电压控制的电阻状态，例如高电阻和低电阻状态。 100 nm刻度的图案化纳米器件显示出高度可重现的开关特性。 通过增加氮浓度可以使这些装置在两个电阻水平之间切换的电压水平被系统地降低。 类似地，可以通过改变氮浓度来改变高电阻状态的电阻，并且通过将氮浓度改变几个百分比来降低数量级。 另一方面，低电阻状态的电阻对氮掺杂水平几乎不敏感。 单个Mg50O50-xNx层器件的电阻可以通过限制在SET过程中可以通过的电流在宽范围内变化。 可以构建相关的数据存储设备。

公开(公告)号：US07943399B2

公开(公告)日：2011-05-17

申请号：US12548428

申请日：2009-08-27

申请人： Jonathan Zanhong Sun ,  Rolf Allenspach ,  Stuart Stephen Papworth Parkin ,  John Casimir Slonczewski ,  Bruce David Terris

发明人： Jonathan Zanhong Sun ,  Rolf Allenspach ,  Stuart Stephen Papworth Parkin ,  John Casimir Slonczewski ,  Bruce David Terris

IPC分类号： H01L21/00

CPC分类号： H01L43/02 ,  B82Y25/00 ,  G11C11/16 ,  G11C11/161 ,  H01F10/3254 ,  H01F10/3263 ,  H01F10/3286 ,  H01F41/308 ,  H01L27/222 ,  H01L43/08 ,  H01L43/12

摘要： A magnetic memory element switchable by current injection includes a plurality of magnetic layers, at least one of the plurality of magnetic layers having a perpendicular magnetic anisotropy component and including a current-switchable magnetic moment, and at least one barrier layer formed adjacent to the plurality of magnetic layers (e.g., between two of the magnetic layers). The memory element has the switching threshold current and device impedance suitable for integration with complementary metal oxide semiconductor (CMOS) integrated circuits.

摘要翻译： 通过电流注入可切换的磁存储元件包括多个磁性层，所述多个磁性层中的至少一个具有垂直磁各向异性分量并且包括电流可切换磁矩，以及至少一个与所述多个磁性层相邻形成的阻挡层 的磁性层（例如，两层磁性层之间）。 存储元件具有适合与互补金属氧化物半导体（CMOS）集成电路集成的开关阈值电流和器件阻抗。

公开(公告)号：US07906231B2

公开(公告)日：2011-03-15

申请号：US11931110

申请日：2007-10-31

申请人： Stuart Stephen Papworth Parkin

发明人： Stuart Stephen Papworth Parkin

IPC分类号： G11B5/39

CPC分类号： G11B5/3909 ,  B82Y10/00 ,  B82Y25/00 ,  G01R33/093 ,  G01R33/098 ,  G11B5/3906 ,  G11C11/16 ,  H01F10/3254 ,  H01F10/3272 ,  H01F10/3295 ,  H01L43/08 ,  Y10T428/1107 ,  Y10T428/1114 ,  Y10T428/1121 ,  Y10T428/115 ,  Y10T428/1193

摘要： Magnetic tunneling devices are formed from a first body centered cubic (bcc) magnetic layer and a second bcc magnetic layer. At least one spacer layer of bcc material between these magnetic layers exchange couples the first and second bcc magnetic layers. A tunnel barrier in proximity with the second magnetic layer permits spin-polarized current to pass between the tunnel barrier and the second layer; the tunnel barrier may be either MgO and Mg—ZnO. The first magnetic layer, the spacer layer, the second magnetic layer, and the tunnel barrier are all preferably (100) oriented. The MgO and Mg—ZnO tunnel barriers are prepared by first depositing a metallic layer on the second magnetic layer (e.g., a Mg layer), thereby substantially reducing the oxygen content in this magnetic layer, which improves the performance of the tunnel barriers.

摘要翻译： 磁隧道器件由第一体心立方（bcc）磁性层和第二bcc磁性层形成。 这些磁性层之间的至少一个bcc材料间隔层交换耦合第一和第二bcc磁性层。 靠近第二磁性层的隧道势垒允许自旋极化电流在隧道势垒和第二层之间通过; 隧道势垒可以是MgO和Mg-ZnO。 第一磁性层，间隔层，第二磁性层和隧道势垒都优选为（100）取向。 通过首先在第二磁性层（例如，Mg层）上沉积金属层来制备MgO和Mg-ZnO隧道势垒，从而大大降低该磁性层中的氧含量，这改善了隧道势垒的性能。

公开(公告)号：US20090317923A1

公开(公告)日：2009-12-24

申请号：US12548428

申请日：2009-08-27

申请人： Jonathan Zanhong Sun ,  Rolf Allenspach ,  Stuart Stephen Papworth Parkin ,  John Casimir Slonczewski ,  Bruce David Terris

发明人： Jonathan Zanhong Sun ,  Rolf Allenspach ,  Stuart Stephen Papworth Parkin ,  John Casimir Slonczewski ,  Bruce David Terris

IPC分类号： H01L21/00

CPC分类号： H01L43/02 ,  B82Y25/00 ,  G11C11/16 ,  G11C11/161 ,  H01F10/3254 ,  H01F10/3263 ,  H01F10/3286 ,  H01F41/308 ,  H01L27/222 ,  H01L43/08 ,  H01L43/12

摘要： A magnetic memory element switchable by current injection includes a plurality of magnetic layers, at least one of the plurality of magnetic layers having a perpendicular magnetic anisotropy component and including a current-switchable magnetic moment, and at least one barrier layer formed adjacent to the plurality of magnetic layers (e.g., between two of the magnetic layers). The memory element has the switching threshold current and device impedance suitable for integration with complementary metal oxide semiconductor (CMOS) integrated circuits.

摘要翻译： 通过电流注入可切换的磁存储元件包括多个磁性层，所述多个磁性层中的至少一个具有垂直磁各向异性分量并且包括电流可切换磁矩，以及至少一个与所述多个磁性层相邻形成的阻挡层 的磁性层（例如，两层磁性层之间）。 存储元件具有适合与互补金属氧化物半导体（CMOS）集成电路集成的开关阈值电流和器件阻抗。