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公开(公告)号：US20190229415A1
公开(公告)日：2019-07-25
申请号：US16370987
申请日：2019-03-30
摘要： An apparatus includes a first integrated circuit (IC) that includes a first radio-frequency (RF) circuit to process RF signals, a first antenna port to couple to one or more antennas, and a first switch integrated in the first IC and coupled to the first antenna port. The apparatus further includes a second IC that includes a second RF circuit to process RF signals, a second antenna port to couple to the one or more antennas, and a second switch integrated in the second IC and coupled to the second antenna port.
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公开(公告)号：US20170346520A1
公开(公告)日：2017-11-30
申请号：US15168318
申请日：2016-05-31
申请人： Vitor Pereira , Mustafa Koroglu , Ruifeng Sun , Ramin Khoini-Poorfard , Abdulkerim Coban , Yu Su , Krishna Pentakota
发明人： Vitor Pereira , Mustafa Koroglu , Ruifeng Sun , Ramin Khoini-Poorfard , Abdulkerim Coban , Yu Su , Krishna Pentakota
CPC分类号： H04B1/30 , H04B1/0028 , H04B1/005 , H04B1/1027 , H04N21/4263
摘要： In one example, a semiconductor die includes multi-standard, multi-channel expandable television/satellite receiver that can be flexibly implemented in a number of different configurations to enable incorporation into a plurality of different systems. The semiconductor die may include multiple tuners to receive and tune a terrestrial radio frequency (RF) signal and a satellite RF signal. These tuners may include different frequency synthesizers including voltage controlled oscillators (VCOs) to generate VCO signals at different frequencies, mixers to downconvert the RF signals to baseband signals using the VCO signals. In an implementation, the semiconductor die may further include shared circuitry coupled to the tuners to digitize, process and demodulate the baseband signals.
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3.发明授权公开(公告)号：US09036091B2
公开(公告)日：2015-05-19
申请号：US12986053
申请日：2011-01-06
申请人： Alan F. Hendrickson , Alessandro Piovaccari , Ramin Khoini-Poorfard , Mitchell Reid , Frederick Alan Rush , Jean-Marc Guyot , David Le Goff , Michael Robert May , Henry William Singor , Qi Cai , Peter Jozef Vancorenland , Chunyu Xin , Pascal Blouin
发明人： Alan F. Hendrickson , Alessandro Piovaccari , Ramin Khoini-Poorfard , Mitchell Reid , Frederick Alan Rush , Jean-Marc Guyot , David Le Goff , Michael Robert May , Henry William Singor , Qi Cai , Peter Jozef Vancorenland , Chunyu Xin , Pascal Blouin
IPC分类号： H04N5/44 , H04N5/50 , H04N21/426 , H04N5/46 , H03J1/00
CPC分类号： H04N21/42638 , H03J1/0008 , H04N5/46
摘要： An integrated circuit includes a tuner, a digital television (DTV) demodulator, an analog television (ATV) demodulator, and a controller. The tuner includes an input for receiving a radio frequency (RF) signal including at least one of an analog television signal and digital television signal, and including a first output terminal and a second output terminal. The DTV demodulator includes a DTV input coupled to the first output terminal of the tuner and includes a DTV output terminal. The ATV demodulator includes an ATV input coupled to the second output terminal of the tuner and includes an ATV output terminal. The controller is coupled to the tuner, the DTV demodulator, and the ATV demodulator to configure the tuner and at least one of the DTV demodulator and the ATV demodulator for receiving television content in a selected television format.
摘要翻译： 集成电路包括调谐器，数字电视（DTV）解调器，模拟电视（ATV）解调器和控制器。 调谐器包括用于接收包括模拟电视信号和数字电视信号中的至少一个的射频（RF）信号的输入，并且包括第一输出端和第二输出端。 DTV解调器包括耦合到调谐器的第一输出端的DTV输入，并且包括DTV输出端。 ATV解调器包括耦合到调谐器的第二输出端子的ATV输入并且包括ATV输出端子。 控制器耦合到调谐器，DTV解调器和ATV解调器，以配置调谐器和至少一个DTV解调器和ATV解调器，用于以选定的电视格式接收电视内容。
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公开(公告)号：US08848110B2
公开(公告)日：2014-09-30
申请号：US12790405
申请日：2010-05-28
申请人： Ramin Khoini-Poorfard , Alan F. Hendrickson , Alessandro Piovaccari , David S. Trager , Aslamali A. Rafi , Abdulkerim L. Coban , David Le Goff
发明人： Ramin Khoini-Poorfard , Alan F. Hendrickson , Alessandro Piovaccari , David S. Trager , Aslamali A. Rafi , Abdulkerim L. Coban , David Le Goff
IPC分类号： H04N5/52 , H04N5/44 , H04L27/02 , H03G3/30 , H04N5/455 , H03G3/00 , H04L27/00 , H04L27/08 , H04N5/04
CPC分类号： H04N5/455 , H03G3/001 , H03G3/002 , H03G3/3068 , H04L27/0002 , H04L27/02 , H04L27/08 , H04N5/04 , H04N5/52
摘要： A receiver circuit includes an analog front-end and a digital processing unit. The analog front-end includes an input for receiving a radio frequency (RF) signal, a first control input for receiving a gain adjustment signal, a second control input for receiving a timing signal, and a signal output for providing a digital intermediate frequency (IF) signal. The analog front-end updates gains of a plurality of gain stages according to the gain adjustment signal and in synchronism with the timing signal. The digital processing unit is configured to produce at least one output signal derived from the digital IF signal. The digital processing unit includes a timing recovery circuit configured to generate the timing signal based on the digital IF signal to control timing of the updating gains of each of the plurality of adjustable gain stages.
摘要翻译： 接收机电路包括模拟前端和数字处理单元。 模拟前端包括用于接收射频（RF）信号的输入，用于接收增益调整信号的第一控制输入，用于接收定时信号的第二控制输入和用于提供数字中频的信号输出（ IF）信号。 模拟前端根据增益调整信号更新多个增益级的增益并与定时信号同步。 数字处理单元被配置为产生从数字IF信号导出的至少一个输出信号。 数字处理单元包括定时恢复电路，其被配置为基于数字IF信号生成定时信号，以控制多个可调增益级中的每一个的更新增益的定时。
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5.发明申请公开(公告)号：US20120176550A1
公开(公告)日：2012-07-12
申请号：US12986053
申请日：2011-01-06
申请人： Alan F. Hendrickson , Alessandro Piovaccari , Ramin Khoini-Poorfard , Mitchell Reid , Frederick Alan Rush , Jean-Marc Guyot , David Le Goff , Michael Robert May , Henry William Singor , Qi Cai , Peter Jozef Vancorenland , Chunyu Xin , Pascal Blouin
发明人： Alan F. Hendrickson , Alessandro Piovaccari , Ramin Khoini-Poorfard , Mitchell Reid , Frederick Alan Rush , Jean-Marc Guyot , David Le Goff , Michael Robert May , Henry William Singor , Qi Cai , Peter Jozef Vancorenland , Chunyu Xin , Pascal Blouin
IPC分类号： H04N5/455
CPC分类号： H04N21/42638 , H03J1/0008 , H04N5/46
摘要： An integrated circuit includes a tuner, a digital television (DTV) demodulator, an analog television (ATV) demodulator, and a controller. The tuner includes an input for receiving a radio frequency (RF) signal including at least one of an analog television signal and digital television signal, and including a first output terminal and a second output terminal. The DTV demodulator includes a DTV input coupled to the first output terminal of the tuner and includes a DTV output terminal. The ATV demodulator includes an ATV input coupled to the second output terminal of the tuner and includes an ATV output terminal. The controller is coupled to the tuner, the DTV demodulator, and the ATV demodulator to configure the tuner and at least one of the DTV demodulator and the ATV demodulator for receiving television content in a selected television format.
摘要翻译： 集成电路包括调谐器，数字电视（DTV）解调器，模拟电视（ATV）解调器和控制器。 调谐器包括用于接收包括模拟电视信号和数字电视信号中的至少一个的射频（RF）信号的输入，并且包括第一输出端和第二输出端。 DTV解调器包括耦合到调谐器的第一输出端的DTV输入，并且包括DTV输出端。 ATV解调器包括耦合到调谐器的第二输出端子的ATV输入并且包括ATV输出端子。 控制器耦合到调谐器，DTV解调器和ATV解调器，以配置调谐器和至少一个DTV解调器和ATV解调器，用于以选定的电视格式接收电视内容。
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公开(公告)号：US20110235758A1
公开(公告)日：2011-09-29
申请号：US12790405
申请日：2010-05-28
申请人： Ramin Khoini-Poorfard , Alan F. Hendrickson , Alessandro Piovaccari , David S. Trager , Aslamali A. Rafi , Abdulkerim L. Coban , David Le Goff
发明人： Ramin Khoini-Poorfard , Alan F. Hendrickson , Alessandro Piovaccari , David S. Trager , Aslamali A. Rafi , Abdulkerim L. Coban , David Le Goff
CPC分类号： H04N5/455 , H03G3/001 , H03G3/002 , H03G3/3068 , H04L27/0002 , H04L27/02 , H04L27/08 , H04N5/04 , H04N5/52
摘要： A receiver circuit includes an analog front-end and a digital processing unit. The analog front-end includes an input for receiving a radio frequency (RF) signal, a first control input for receiving a gain adjustment signal, a second control input for receiving a timing signal, and a signal output for providing a digital intermediate frequency (IF) signal. The analog front-end updates gains of a plurality of gain stages according to the gain adjustment signal and in synchronism with the timing signal. The digital processing unit is configured to produce at least one output signal derived from the digital IF signal. The digital processing unit includes a timing recovery circuit configured to generate the timing signal based on the digital IF signal to control timing of the updating gains of each of the plurality of adjustable gain stages.
摘要翻译： 接收机电路包括模拟前端和数字处理单元。 模拟前端包括用于接收射频（RF）信号的输入，用于接收增益调整信号的第一控制输入，用于接收定时信号的第二控制输入和用于提供数字中频的信号输出（ IF）信号。 模拟前端根据增益调整信号更新多个增益级的增益并与定时信号同步。 数字处理单元被配置为产生从数字IF信号导出的至少一个输出信号。 数字处理单元包括定时恢复电路，其被配置为基于数字IF信号生成定时信号，以控制多个可调增益级中的每一个的更新增益的定时。
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公开(公告)号：US20130335639A1
公开(公告)日：2013-12-19
申请号：US13526060
申请日：2012-06-18
申请人： András Vince Horvath , Abdulkerim L. Coban , Pio Balmelli , Ramin Khoini-Poorfard , Alessandro Piovaccari
发明人： András Vince Horvath , Abdulkerim L. Coban , Pio Balmelli , Ramin Khoini-Poorfard , Alessandro Piovaccari
CPC分类号： H04N5/50 , H03J5/24 , H04L25/0292 , H04N5/165 , H04N5/455 , H04N21/42607
摘要： In one embodiment, an internal buffer may be provided within an integrated circuit (IC) to convert a signal to an output current to be output via a pin of the IC, under control of a switch which can be controlled based on a configuration setting of the IC, and may selectively directly couple the signal to the pin when the IC is coupled to an external driver circuit.
摘要翻译： 在一个实施例中，内部缓冲器可以设置在集成电路（IC）内，以在开关的控制下将信号转换成经由IC的引脚输出的输出电流，该开关可以基于配置设置 IC，并且当IC耦合到外部驱动器电路时，可以选择性地将信号耦合到引脚。
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公开(公告)号：US08587398B2
公开(公告)日：2013-11-19
申请号：US12570462
申请日：2009-09-30
IPC分类号： H01F27/32
CPC分类号： H01F17/0006 , H01F2017/008 , H01L23/5225 , H01L23/5227 , H03B5/1212 , H03B5/1228 , H03B5/124
摘要： A shielded differential inductor forms a high quality factor (high-Q) inductor that is configured to attenuate frequency spurs and/or noise from magnetic coupling generated by electrical structures on or off of a substrate as well as interference received by other components from magnetic coupling generated by the inductor. The shielded differential inductor includes a differential inductor and a shield that substantially isolates the electrical field between the inductor and the substrate to reduce substrate current loss. The shield includes sets of finger structures that extend beyond the width of the inductor and a hub and spoke configuration of ground conductors that connect the sets of finger structures to ground.
摘要翻译： 屏蔽差分电感器形成高质量因子（高Q）电感器，其被配置为衰减由电气结构产生的磁耦合引起的基板的频率杂散和/或噪声以及由其他部件从磁耦合接收的干扰 由电感产生。 屏蔽差分电感器包括差分电感器和屏蔽层，其基本上隔离电感器和衬底之间的电场，以减少衬底电流损耗。 护罩包括延伸超过电感器宽度的指状结构的集合以及将手指结构组连接到地的接地导体的轮毂和轮辐配置。
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9.发明授权公开(公告)号：US08494470B2
公开(公告)日：2013-07-23
申请号：US13160564
申请日：2011-06-15
申请人： Ramin Khoini-Poorfard , Alessandro Piovaccari , Aslamali A. Rafi , Mustafa H. Koroglu , David S. Trager , Abdulkerim L. Coban
发明人： Ramin Khoini-Poorfard , Alessandro Piovaccari , Aslamali A. Rafi , Mustafa H. Koroglu , David S. Trager , Abdulkerim L. Coban
IPC分类号： H04B1/06
摘要： An integrated wideband receiver includes first and second signal processing paths and a controller. The first signal processing path has an input, and an output for providing a first processed signal, and comprises a first tracking bandpass filter having a first integrated inductor. The second signal processing path has an input, and an output for providing a second processed signal, and comprises a second tracking bandpass filter having a second integrated inductor. The controller is for enabling one of the first and second signal processing paths corresponding to a selected channel of a radio frequency (RF) input signal to provide an output signal. The controller, the first integrated inductor, and said second integrated inductor are formed on a single integrated circuit chip.
摘要翻译： 集成宽带接收机包括第一和第二信号处理路径和控制器。 第一信号处理路径具有输入和用于提供第一处理信号的输出，并且包括具有第一集成电感器的第一跟踪带通滤波器。 第二信号处理路径具有输入和用于提供第二处理信号的输出，并且包括具有第二集成电感器的第二跟踪带通滤波器。 控制器用于启用与射频（RF）输入信号的选定信道相对应的第一和第二信号处理路径之一以提供输出信号。 控制器，第一集成电感器和所述第二集成电感器形成在单个集成电路芯片上。
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公开(公告)号：US08385867B2
公开(公告)日：2013-02-26
申请号：US12493819
申请日：2009-06-29
申请人： Aslamali A. Rafi , Chunyu Xin , Ruifeng Sun , Abhishek Kammula , Ramin Khoini-Poorfard , Alessandro Piovaccari , Peter J. Vancorenland
发明人： Aslamali A. Rafi , Chunyu Xin , Ruifeng Sun , Abhishek Kammula , Ramin Khoini-Poorfard , Alessandro Piovaccari , Peter J. Vancorenland
IPC分类号： H04B1/18
CPC分类号： H03J3/06 , H03J3/32 , H03J2200/10 , H03J2200/32 , H04N5/50
摘要： In one embodiment, a set of tracking filters to be coupled between an amplifier and a mixer is provided. The tracking filters may be differently configured depending on band of operation. For example, a first set of the filters can be configured to maintain a substantially constant Q value across their operating bandwidth while a second set of the filters can be configured to maintain a substantially constant bandwidth across their operating bandwidth.
摘要翻译： 在一个实施例中，提供要耦合在放大器和混频器之间的一组跟踪滤波器。 根据操作频带，跟踪滤波器可以被不同地配置。 例如，可以将第一组滤波器配置为在其工作带宽上维持基本上恒定的Q值，而第二组滤波器可被配置为在其工作带宽上维持基本恒定的带宽。
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