公开(公告)号：US06409903B1

公开(公告)日：2002-06-25

申请号：US09469120

申请日：1999-12-21

申请人： Dean S. Chung ,  Josef W. Korejwa ,  Erick G. Walton

发明人： Dean S. Chung ,  Josef W. Korejwa ,  Erick G. Walton

IPC分类号： C25D500

CPC分类号： C25D5/18 ,  C25D7/123 ,  C25D17/001 ,  Y10S204/09

摘要： A method and apparatus are provided for the electroplating of a substrate such as a semiconductor wafer which provides a uniform electroplated surface and minimizes bum-through of a seed layer used on the substrate to initiate electroplating. The method and apparatus of the invention uses a specially defined multistep electroplating process wherein, in one aspect, a voltage below a predetermined threshold voltage is applied to the anode and cathode for a first time period followed by applying a current to the anode and cathode for a second time period the current producing a voltage below the predetermined threshold voltage. In another aspect of the invention, a current is applied to the anode and cathode substrate which current is preprogrammed to ramp up to a current value from a first current value which current produces a voltage below a predetermined threshold voltage. Electroplated articles including copper electroplated semiconductor wafers made using the apparatus and method of the invention are also provided.

摘要翻译： 提供了一种用于电镀诸如半导体晶片的基板的方法和装置，该半导体晶片提供均匀的电镀表面并且最小化在基板上使用的种子层的通过以启动电镀。 本发明的方法和装置使用特别限定的多级电镀工艺，其中在一个方面，将低于预定阈值电压的电压第一时间施加到阳极和阴极，随后向阳极和阴极施加电流， 第二时间段，电流产生低于预定阈值电压的电压。 在本发明的另一方面，电流被施加到阳极和阴极衬底上，该电流被预编程，以从当前产生低于预定阈值电压的电压的第一电流值斜升到电流值。 还提供了使用本发明的装置和方法制造的包括铜电镀半导体晶片的电镀制品。

公开(公告)号：US07678258B2

公开(公告)日：2010-03-16

申请号：US10615794

申请日：2003-07-10

申请人： Panayotis Andricacos ,  Dean S. Chung ,  Hariklia Deligianni ,  James E. Fluegel ,  Keith T. Kwietniak ,  Peter S. Locke ,  Darryl D. Restaino ,  Soon-Cheon Seo ,  Philippe M. Vereecken ,  Erick G. Walton

发明人： Panayotis Andricacos ,  Dean S. Chung ,  Hariklia Deligianni ,  James E. Fluegel ,  Keith T. Kwietniak ,  Peter S. Locke ,  Darryl D. Restaino ,  Soon-Cheon Seo ,  Philippe M. Vereecken ,  Erick G. Walton

IPC分类号： C25D5/00

CPC分类号： C23C18/1617 ,  C23C18/1683 ,  C25D21/12 ,  C25D21/18

摘要： An improved method of stabilizing wet chemical baths is disclosed. Typically such baths are used in processes for treating workpieces, for example, plating processes for plating metal onto substrates. In particular, the present invention relates to copper plating baths. More particularly, the present invention relates to the stability of copper plating baths. More particularly, the present invention relates to prevention of void formation by monitoring the accumulation of deleterious by-products in copper plating baths.

摘要翻译： 公开了一种稳定湿化学浴的改进方法。 通常，这种浴用于处理工件的工艺中，例如用于将金属电镀到基底上的电镀工艺。 特别地，本发明涉及镀铜浴。 更具体地说，本发明涉及镀铜浴的稳定性。 更具体地，本发明涉及通过监测铜电镀浴中有害副产物的积累来防止空隙形成。

公开(公告)号：US07227265B2

公开(公告)日：2007-06-05

申请号：US10810719

申请日：2004-03-29

申请人： Panayotis C. Andricacos ,  Steven H. Boettcher ,  Dean S. Chung ,  Hariklia Deligianni ,  James E. Fluegel ,  Wilma Jean Horkans ,  Keith T. Kwietniak ,  Peter S. Locke ,  Christopher C. Parks ,  Soon-Cheon Seo ,  Andrew H. Simon ,  Erick G. Walton

发明人： Panayotis C. Andricacos ,  Steven H. Boettcher ,  Dean S. Chung ,  Hariklia Deligianni ,  James E. Fluegel ,  Wilma Jean Horkans ,  Keith T. Kwietniak ,  Peter S. Locke ,  Christopher C. Parks ,  Soon-Cheon Seo ,  Andrew H. Simon ,  Erick G. Walton

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/2885 ,  C25D3/38 ,  C25D5/024 ,  C25D5/18 ,  C25D7/123 ,  H01L21/76877

摘要： Interconnect structures with copper conductors being at least substantially free of internal seams or voids are obtained employing an electroplating copper bath containing dissolved cupric salt wherein the concentration of the salt is at least about 0.4 molar and up to about 0.5 molar concentration of an acid. Also provided are copper damascene structures having an aspect ratio of greater than about 3 and a width of less than about 0.275 μm and via openings filled with electroplated copper than is substantially free of internal seams or voids.

摘要翻译： 使用包含溶解的铜盐的电镀铜浴获得至少基本上不含内部接缝或空隙的铜导体的互连结构，其中盐的浓度为酸的至少约0.4摩尔浓度至高达约0.5摩尔浓度。 还提供了具有大于约3的宽高比和小于约0.275μm的宽度的铜镶嵌结构以及填充有电镀铜的通孔，基本上不含内部接缝或空隙。

公开(公告)号：US06605534B1

公开(公告)日：2003-08-12

申请号：US09605322

申请日：2000-06-28

申请人： Dean S. Chung ,  David V. Horak ,  Erick G. Walton

发明人： Dean S. Chung ,  David V. Horak ,  Erick G. Walton

IPC分类号： H01L214763

CPC分类号： H01L21/2885 ,  H01L21/76879

摘要： The present invention provides a method of selectively inhibiting the deposition of a conductive material within desired regions of a semiconductor device. A seed layer is rendered ineffective to the electroplating in select regions of the substrate, by either the removal or the poisoning of the seed layer in select regions.

摘要翻译： 本发明提供了选择性地抑制导电材料在半导体器件的期望区域内的沉积的方法。 通过选择区域中的种子层的去除或中毒，种子层对基板的选择区域中的电镀无效。

公开(公告)号：US06270646B1

公开(公告)日：2001-08-07

申请号：US09473909

申请日：1999-12-28

申请人： Erick Gregory Walton ,  Dean S. Chung ,  Lara Sandra Collins ,  William E. Corbin, Jr. ,  Hariklia Deligianni ,  Daniel Charles Edelstein ,  James E. Fluegel ,  Josef Warren Korejwa ,  Peter S. Locke ,  Cyprian Emeka Uzoh

发明人： Erick Gregory Walton ,  Dean S. Chung ,  Lara Sandra Collins ,  William E. Corbin, Jr. ,  Hariklia Deligianni ,  Daniel Charles Edelstein ,  James E. Fluegel ,  Josef Warren Korejwa ,  Peter S. Locke ,  Cyprian Emeka Uzoh

IPC分类号： C25D522

CPC分类号： C25D17/14 ,  C25D5/06

摘要： A metal plating apparatus is described which includes a compressible member having a conductive surface covering substantially all of the surface of the substrate to be plated. The plating current is thereby transmitted over a wide area of the substrate, rather than a few localized contact points. The compressible member is porous so as to absorb the plating solution and transmit the plating solution to the substrate. The wafer and compressible member may rotate with respect to each other. The compressible member may be at cathode potential or may be a passive circuit element.

摘要翻译： 描述了一种金属电镀装置，其包括具有覆盖待镀基板的基本上所有表面的导电表面的可压缩构件。 因此，电镀电流在衬底的广泛区域上传输，而不是几个局部接触点。 可压缩构件是多孔的，以便吸收电镀液并将电镀液传输到基底。 晶片和可压缩构件可以相对于彼此旋转。 可压缩构件可以处于阴极电位，或者可以是无源电路元件。