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公开(公告)号：US5668599A
公开(公告)日：1997-09-16
申请号：US618660
申请日：1996-03-19
申请人： Dennis Phillip Cheney , Mark Louis Ciacelli , Steven Bradford Herndon , John David Myers , Chuck Hong Ngai
发明人： Dennis Phillip Cheney , Mark Louis Ciacelli , Steven Bradford Herndon , John David Myers , Chuck Hong Ngai
CPC分类号： H04N5/4401 , H04N19/423 , H04N19/427 , H04N19/61 , H04N21/4305 , H04N21/44004 , H04N5/907
摘要： Disclosed is a digital signal decoder system for receiving compressed encoded digitized video signals and transmitting decompressed decoded digital video signals. This is accomplished with a minimum of DRAM demand through the use of a Spill Buffer.
摘要翻译： 公开了一种用于接收压缩编码的数字化视频信号并发送解压缩解码的数字视频信号的数字信号解码器系统。 这是通过使用溢出缓冲区的DRAM需求来实现的。
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公开(公告)号：US5929911A
公开(公告)日：1999-07-27
申请号：US958632
申请日：1997-10-27
CPC分类号： H04N9/64 , H04N19/186 , H04N19/423 , H04N19/427 , H04N19/428 , H04N19/433 , H04N19/577 , H04N19/59 , H04N19/61 , H04N19/80 , H04N21/4435 , H04N5/4401 , H04N7/0122 , H04N11/20
摘要： A digital signal decoder system is provided for receiving digital video signals and processing them while reducing the external memory requirements for frame buffer storage for an MPEG-2 decoder through decimation. The system includes a motion compensation unit for processing macroblock data. The decoder portion of the decimation unit intercepts and processes the data after it has been processed by the motion compensation unit. The data is then stored in the decimate buffer before passing on to the memory control unit. From here the data is routed to the display portion of the decimation unit for further processing. At this point the data is stored in the video buffer where it then passes on to the expansion filter and then to the display. As the video data is routed through the system, it could be decimated, interpolated, reduced, expanded, or any combination of these. The decoder controller controls and synchronizes the system operation. The final result is a system for decoding digital video signals while reducing the external memory requirements. This decoding system can be used to provide features that are desirable for MPEG-2 playback. These include display format conversion to letterbox, and display format conversion to 3/4 small picture size with additional storage allocation for on screen graphics.
摘要翻译： 提供数字信号解码器系统用于接收数字视频信号并进行处理，同时通过抽取减少MPEG-2解码器的帧缓冲存储器的外部存储器要求。 该系统包括用于处理宏块数据的运动补偿单元。 抽取单元的解码器部分在由运动补偿单元处理之后截取并处理数据。 然后将数据存储在抽取缓冲器中，然后再传送到存储器控制单元。 从这里，数据被路由到抽取单元的显示部分以进一步处理。 此时，数据被存储在视频缓冲器中，然后传送到扩展过滤器，然后传送到显示器。 当视频数据通过系统路由时，可以对其进行抽取，内插，缩小，扩展或者任意组合。 解码器控制器控制并同步系统操作。 最终的结果是在减少外部存储器要求的同时解码数字视频信号的系统。 该解码系统可用于提供MPEG-2播放所需的特征。 这些包括显示格式转换为letterbox，并显示格式转换为+ E，fra 3/4 + EE小图片大小，带有额外的屏幕图形存储分配。
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公开(公告)号：US06263023B1
公开(公告)日：2001-07-17
申请号：US09173454
申请日：1998-10-15
申请人： Chuck Hong Ngai
发明人： Chuck Hong Ngai
IPC分类号： H04N732
CPC分类号： H04N19/42 , H04N19/436 , H04N19/61
摘要： A video decoder for decoding data at a high rate uses a plurality of slower slice decoders. A common memory is shared by all slice decoders drastically reducing storage requirements of individual decoders. Slices are allocated to decoders optimally in response to busy signals providing improved performance over known methods. HDTV signals are decoded using a plurality of ordinary television resolution decoders. Multiple data streams are also decoded.
摘要翻译： 用于以高速率解码数据的视频解码器使用多个较慢的片解码器。 所有切片解码器共享共享内存，大大降低了各个解码器的存储要求。 切片最适合分配给解码器，以响应忙信号，提供比已知方法更好的性能。 使用多个普通电视分辨率解码器对HDTV信号进行解码。 多个数据流也被解码。
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公开(公告)号：US06775327B2
公开(公告)日：2004-08-10
申请号：US09836968
申请日：2001-04-17
申请人： Chuck Hong Ngai
发明人： Chuck Hong Ngai
IPC分类号： H04N712
CPC分类号： H04N19/42 , H04N19/436 , H04N19/61
摘要： A video decoder for decoding data at a high rate uses a plurality of slower slice decoders. A common memory is shared by all slice decoders drastically reducing storage requirements of individual decoders. Slices are allocated to decoders optimally in response to busy signals providing improved performance over known methods. HDTV signals are decoded using a plurality of ordinary television resolution decoders. Multiple data streams are also decoded.
摘要翻译： 用于以高速率解码数据的视频解码器使用多个较慢的片解码器。 所有切片解码器共享共享内存，大大降低了各个解码器的存储要求。 切片最适合分配给解码器，以响应忙信号，提供比已知方法更好的性能。 使用多个普通电视分辨率解码器对HDTV信号进行解码。 多个数据流也被解码。
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公开(公告)号：US06999105B2
公开(公告)日：2006-02-14
申请号：US10728347
申请日：2003-12-04
申请人： Daniel Joseph Buerkle , David Allen Hrusecky , Charles Francis Marino , Chuck Hong Ngai , John William Urda
发明人： Daniel Joseph Buerkle , David Allen Hrusecky , Charles Francis Marino , Chuck Hong Ngai , John William Urda
CPC分类号： G06T3/40 , G06T1/60 , G09G2340/0407
摘要： An apparatus, circuit arrangement, program product and method of scaling an image horizontally partition a source image into a plurality of partitions, with each partition having a width that is no greater than the width of a line buffer used to scale the image. By partitioning an image into a plurality of partitions, the overall width of the scaled image is not constrained by the width of the line buffer. As a result, in many instances line buffers that are significantly smaller than conventional full-width line buffers may be used to generate scaled images that are substantially wider than may be generated by conventional buffers. Moreover, when implemented in hardware, the line buffers typically occupy significantly less real estate on an integrated circuit, thus reducing both cost and power consumption.
摘要翻译： 将图像缩放水平分割为多个分区的装置，电路装置，程序产品和方法，其中每个分区的宽度不大于用于缩放图像的行缓冲器的宽度。 通过将图像分割成多个分区，缩放图像的总宽度不受线路缓冲器的宽度的约束。 结果，在许多情况下，显着小于常规全宽线缓冲器的行缓冲器可以用于产生比可能由常规缓冲器产生的图像大得多的缩放图像。 此外，当以硬件实现时，线路缓冲器通常在集成电路上占据明显更少的空间，从而降低成本和功耗。
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公开(公告)号：US5784055A
公开(公告)日：1998-07-21
申请号：US643651
申请日：1996-05-06
申请人： Chuck Hong Ngai
发明人： Chuck Hong Ngai
CPC分类号： H04N9/641 , G09G5/06 , H04N19/423 , H04N19/61 , H04N5/44504 , H04N5/44508 , G09G2340/12
摘要： A method of performing color control in a digital video decoder while minimizing memory bandwidth. A decoded color image bit map is stored in a RAM in lines corresponding to horizontal lines of pixels. Each line also has dedicated bytes for a corresponding color look up table comprising a control field and color address fields. Entries in separate preloaded color component tables are addressed by the color address fields. A transparency bit in the control field is used to select modifiers to the data in the address fields for transparency mode.
摘要翻译： 一种在数字视频解码器中执行颜色控制同时最小化存储器带宽的方法。 经解码的彩色图像位图以对应于像素的水平线的线存储在RAM中。 每行还具有用于包括控制字段和颜色地址字段的相应颜色查找表的专用字节。 单独的预加载颜色分量表中的条目由颜色地址字段寻址。 控制字段中的透明度位用于为透明度模式的地址字段中的数据选择修饰符。
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公开(公告)号：US6052415A
公开(公告)日：2000-04-18
申请号：US922835
申请日：1997-08-26
CPC分类号： H04N19/89
摘要： An MPEG digital video decoder system, method and computer program product are presented for monitoring decoding of an encoded digital video signal for one or more predefined illegal conditions. Error detection logic is coupled to the variable length (VLC) decoder, inverse quantizer (IQ), inverse discrete cosine transformer (IDCT) and motion compensator (MC) of the decoder for detecting an illegal condition within at least one of the VLC decoder, IQ, IDCT and MC during decoding of the encoded digital video signal. The monitored illegal conditions can include a VLC/IQ control error, an IQ level overrun, and IQ/IDCT buffer error, an MC idle error and an MC macroblock start error. Error signals are reported to a central error register which is monitored periodically by the decoder's control processor. The control processor initiates recovery within the decoder system prior to stoppage of the system due to the illegal condition.
摘要翻译： 提供MPEG数字视频解码器系统，方法和计算机程序产品，用于监视针对一个或多个预定非法条件的编码数字视频信号的解码。 错误检测逻辑耦合到解码器的可变长度（VLC）解码器，逆量化器（IQ），反相离散余弦变换器（IDCT）和运动补偿器（MC），用于检测VLC解码器， IQ，IDCT和MC在解码编码的数字视频信号期间。 监控的非法条件可能包括VLC / IQ控制错误，IQ级别溢出和IQ / IDCT缓冲区错误，MC空闲错误和MC宏块启动错误。 错误信号被报告给由解码器的控制处理器周期性地监视的中央错误寄存器。 由于非法情况，控制处理器在系统停止之前在解码器系统内启动恢复。
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