公开(公告)号：US20080026506A1

公开(公告)日：2008-01-31

申请号：US11868382

申请日：2007-10-05

Applicant: Dong-Kuk KIM ,  Chang-Cheol LEE

Inventor： Dong-Kuk KIM ,  Chang-Cheol LEE

IPC: H01L21/60

CPC classification number: H01L24/85 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/48471 ,  H01L2224/48599 ,  H01L2224/48799 ,  H01L2224/4899 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/78 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A multi-chip package comprises a package substrate having bond fingers disposed thereon. A first chip have center bonding pads formed on a substantially center portion thereof. The first chip is disposed on the package substrate. Insulating support structures are formed on the first chip located outward of the bonding pads. A bonding wire is connected between one of the bond fingers and at least one of the center bonding pads. A second chip has is disposed over the bonding wire and overlying the insulating support structures.

Abstract translation: 多芯片封装包括其上设置有键合指状的封装基板。 第一芯片具有形成在其基本中心部分上的中心焊盘。 第一芯片设置在封装基板上。 绝缘支撑结构形成在位于接合焊盘外侧的第一芯片上。 接合线连接在一个接合指状物和至少一个中心接合焊盘之间。 第二芯片设置在接合线上并覆盖绝缘支撑结构。

公开(公告)号：US20070018295A1

公开(公告)日：2007-01-25

申请号：US11534924

申请日：2006-09-25

Applicant: Min-Ill KIM ,  Dong-Kuk KIM ,  Chang-Cheol LEE ,  Tae-Hoe HWANG ,  Jae-Young HONG

Inventor： Min-Ill KIM ,  Dong-Kuk KIM ,  Chang-Cheol LEE ,  Tae-Hoe HWANG ,  Jae-Young HONG

IPC: H01L23/02 ,  B65B35/00

CPC classification number: H01L21/67132 ,  H01L24/73 ,  H01L24/83 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/15311 ,  Y10T156/1763 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/92247

Abstract: The present invention relates to an apparatus for stacking semiconductor chips, a method for manufacturing a semiconductor package using the same and a semiconductor package manufactured thereby. The apparatus for stacking semiconductor chips may comprise two tables for supporting wafers, a picker for picking up semiconductor chips and a picker transfer unit for moving the picker vertically and horizontally. The method for manufacturing a semiconductor package using the same may allow easy and rapid stacking of semiconductor chips, thereby improving the productivity of semiconductor package manufacture. Further, a semiconductor chip having a relatively thick film is attached onto another semiconductor chip having a relatively thin film. The thicker semiconductor chip may protect the thinner semiconductor chip from faults such as chipping or warpage which may occur due to external shocks such as that caused by a picker, thereby improving the reliability of the package.

Abstract translation: 本发明涉及用于堆叠半导体芯片的装置，制造其使用的半导体封装的方法和由其制造的半导体封装。 用于堆叠半导体芯片的装置可以包括用于支撑晶片的两个表，用于拾取半导体芯片的拾取器和用于垂直和水平地移动拾取器的拾取器传送单元。 使用该半导体封装的半导体封装的制造方法可以容易且快速地堆叠半导体芯片，从而提高半导体封装制造的生产率。 此外，将具有较厚膜的半导体芯片附着到具有较薄膜的另一半导体芯片上。 更厚的半导体芯片可以保护较薄的半导体芯片免受诸如由拾取器引起的外部冲击而发生的诸如碎裂或翘曲的故障，从而提高封装的可靠性。

公开(公告)号：US20130105988A1

公开(公告)日：2013-05-02

申请号：US13533473

申请日：2012-06-26

Applicant: Chang-Cheol LEE ,  Hyun-Jun KIM ,  In-Young LEE ,  Ki-Kwon JEONG

Inventor： Chang-Cheol LEE ,  Hyun-Jun KIM ,  In-Young LEE ,  Ki-Kwon JEONG

IPC: H01L23/48

CPC classification number: H01L23/13 ,  H01L21/565 ,  H01L23/49816 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/1815

Abstract: A semiconductor package comprises a substrate having a first opening formed therethrough, a first semiconductor chip stacked on the substrate in a flip chip manner and having a second opening formed therethrough, a second semiconductor chip stacked on the first semiconductor chip in a flip chip manner and having a third opening formed therethrough, and a molding material covering the first semiconductor chip and the second semiconductor chip and filling up a space between the substrate and the first semiconductor chip, a space between the first semiconductor chip and the second semiconductor chip, and filling each of the first opening, the second opening, and the third opening.

Abstract translation: 半导体封装包括具有通过其形成的第一开口的衬底，以倒装芯片方式堆叠在衬底上并具有穿过其中的第二开口的第一半导体芯片，以倒装芯片方式堆叠在第一半导体芯片上的第二半导体芯片，以及 具有通过其形成的第三开口，以及覆盖所述第一半导体芯片和所述第二半导体芯片并填充所述基板和所述第一半导体芯片之间的空间的模塑材料，所述第一半导体芯片和所述第二半导体芯片之间的空间，以及填充 第一开口，第二开口和第三开口中的每一个。