Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N
    2.
    发明授权
    Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N 有权
    在N位/单元模拟存储单元器件中以M位/单元密度存储,M> N

    公开(公告)号:US08208304B2

    公开(公告)日:2012-06-26

    申请号:US12618732

    申请日:2009-11-15

    IPC分类号: G11C16/04

    摘要: A method for data storage includes accepting data for storage in a memory that includes multiple analog memory cells and supports a set of built-in programming commands. Each of the programming commands programs a respective page, selected from a group of N pages, in a subset of the memory cells. The subset of the memory cells is programmed to store M pages of the data, M>N, by performing a sequence of the programming commands drawn only from the set.

    摘要翻译: 一种用于数据存储的方法包括接收用于存储在包括多个模拟存储器单元的存储器中的数据,并且支持一组内置的编程命令。 每个编程命令在存储器单元的子集中编写从一组N页中选择的相应页面。 存储器单元的子集被编程为通过执行仅从集合中绘制的编程命令的序列来存储数据的M页M> N。

    Selective activation of programming schemes in analog memory cell arrays
    3.
    发明授权
    Selective activation of programming schemes in analog memory cell arrays 有权
    在模拟存储单元阵列中选择性地激活编程方案

    公开(公告)号:US08228701B2

    公开(公告)日:2012-07-24

    申请号:US12714501

    申请日:2010-02-28

    IPC分类号: G11C27/00

    摘要: A method for data storage includes defining a first programming scheme that programs a group of analog memory cells while reducing interference caused by at least one memory cell that neighbors the group, and a second programming scheme that programs the group of the analog memory cells and does not reduce all of the interference reduced by the first programming scheme. One of the first and second programming schemes is selected based on a criterion defined with respect to the analog memory cells. Data is stored in the group of the analog memory cells using the selected programming scheme.

    摘要翻译: 一种用于数据存储的方法包括:定义第一编程方案,其编程一组模拟存储器单元,同时减少由与该组相邻的至少一个存储器单元引起的干扰;以及第二编程方案,其对该组模拟存储器单元进行编程 不能减少第一编程方案减少的所有干扰。 基于针对模拟存储器单元定义的标准来选择第一和第二编程方案之一。 使用所选择的编程方案将数据存储在模拟存储器单元的组中。

    MEMORY DEVICE WITH INTERNAL SIGNAP PROCESSING UNIT
    4.
    发明申请
    MEMORY DEVICE WITH INTERNAL SIGNAP PROCESSING UNIT 有权
    具有内部信号处理单元的存储器件

    公开(公告)号:US20100131827A1

    公开(公告)日:2010-05-27

    申请号:US12597494

    申请日:2008-04-16

    摘要: A method for operating a memory (36) includes storing data in a plurality of analog memory cells (40) that are fabricated on a first semiconductor die by writing input storage values to a group of the analog memory cells. After storing the data, multiple output storage values are read from each of the analog memory cells in the group using respective, different threshold sets of read thresholds, thus providing multiple output sets of the output storage values corresponding respectively to the threshold sets. The multiple output sets of the output storage values are preprocessed by circuitry (48) that is fabricated on the first semiconductor die, to produce preprocessed data. The preprocessed data is provided to a memory controller (28), which is fabricated on a second semiconductor die that is different from the first semiconductor die, so as to enable the memory controller to reconstruct the data responsively to the preprocessed data.

    摘要翻译: 一种用于操作存储器(36)的方法包括:通过将输入存储值写入到一组模拟存储器单元中,将数据存储在制造在第一半导体管芯上的多个模拟存储单元(40)中。 在存储数据之后,使用相应的不同的阈值集合读取组中每个模拟存储器单元的多个输出存储值,从而提供分别对应于阈值集合的输出存储值的多个输出组。 输出存储值的多个输出组由在第一半导体管芯上制造的电路(48)预处理,以产生预处理的数据。 预处理数据被提供给存储器控制器(28),该存储器控制器(28)被制造在与第一半导体管芯不同的第二半导体管芯上,以使得存储器控制器可以响应于预处理的数据来重建数据。

    Selective activation of programming schemes in analog memory cell arrays
    7.
    发明授权
    Selective activation of programming schemes in analog memory cell arrays 有权
    在模拟存储单元阵列中选择性地激活编程方案

    公开(公告)号:US08879294B2

    公开(公告)日:2014-11-04

    申请号:US13532700

    申请日:2012-06-25

    摘要: A method for data storage includes defining a first programming scheme that programs a group of analog memory cells while reducing interference caused by at least one memory cell that neighbors the group, and a second programming scheme that programs the group of the analog memory cells and does not reduce all of the interference reduced by the first programming scheme. One of the first and second programming schemes is selected based on a criterion defined with respect to the analog memory cells. Data is stored in the group of the analog memory cells using the selected programming scheme.

    摘要翻译: 一种用于数据存储的方法包括:定义第一编程方案,其编程一组模拟存储器单元,同时减少由与该组相邻的至少一个存储器单元引起的干扰;以及第二编程方案,其对该组模拟存储器单元进行编程 不能减少第一编程方案减少的所有干扰。 基于针对模拟存储器单元定义的标准来选择第一和第二编程方案之一。 使用所选择的编程方案将数据存储在模拟存储器单元的组中。

    Memory device with internal signap processing unit
    9.
    发明授权
    Memory device with internal signap processing unit 有权
    具有内部封装处理单元的存储器件

    公开(公告)号:US08429493B2

    公开(公告)日:2013-04-23

    申请号:US12597494

    申请日:2008-04-16

    IPC分类号: G11C29/00

    摘要: A method for operating a memory (36) includes storing data in a plurality of analog memory cells (40) that are fabricated on a first semiconductor die by writing input storage values to a group of the analog memory cells. After storing the data, multiple output storage values are read from each of the analog memory cells in the group using respective, different threshold sets of read thresholds, thus providing multiple output sets of the output storage values corresponding respectively to the threshold sets. The multiple output sets of the output storage values are preprocessed by circuitry (48) that is fabricated on the first semiconductor die, to produce preprocessed data. The preprocessed data is provided to a memory controller (28), which is fabricated on a second semiconductor die that is different from the first semiconductor die, so as to enable the memory controller to reconstruct the data responsively to the preprocessed data.

    摘要翻译: 一种用于操作存储器(36)的方法包括:通过将输入存储值写入到一组模拟存储器单元中,将数据存储在制造在第一半导体管芯上的多个模拟存储单元(40)中。 在存储数据之后,使用相应的不同的阈值集合读取组中每个模拟存储器单元的多个输出存储值,从而提供分别对应于阈值集合的输出存储值的多个输出组。 输出存储值的多个输出组由在第一半导体管芯上制造的电路(48)预处理,以产生预处理的数据。 预处理数据被提供给存储器控制器(28),该存储器控制器(28)被制造在与第一半导体管芯不同的第二半导体管芯上,以使得存储器控制器可以响应于预处理的数据来重建数据。

    Selective Activation of Programming Schemes in Analog Memory Cell Arrays
    10.
    发明申请
    Selective Activation of Programming Schemes in Analog Memory Cell Arrays 有权
    模拟存储器单元阵列中编程方案的选择性激活

    公开(公告)号:US20120262971A1

    公开(公告)日:2012-10-18

    申请号:US13532714

    申请日:2012-06-25

    IPC分类号: G11C27/00

    摘要: A method for data storage includes defining a first programming scheme that programs a group of analog memory cells while reducing interference caused by at least one memory cell that neighbors the group, and a second programming scheme that programs the group of the analog memory cells and does not reduce all of the interference reduced by the first programming scheme. One of the first and second programming schemes is selected based on a criterion defined with respect to the analog memory cells. Data is stored in the group of the analog memory cells using the selected programming scheme.

    摘要翻译: 一种用于数据存储的方法包括:定义第一编程方案,其编程一组模拟存储器单元,同时减少由与该组相邻的至少一个存储器单元引起的干扰;以及第二编程方案,其对该组模拟存储器单元进行编程 不能减少第一编程方案减少的所有干扰。 基于针对模拟存储器单元定义的标准来选择第一和第二编程方案之一。 使用所选择的编程方案将数据存储在模拟存储器单元的组中。