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1.
公开(公告)号:US20070247189A1
公开(公告)日:2007-10-25
申请号:US11567146
申请日:2006-12-05
申请人: Doug Phil , Ronald Bell , Kevin Atkinson , David Trawick , Fuk Ng , Liem Nguyen
发明人: Doug Phil , Ronald Bell , Kevin Atkinson , David Trawick , Fuk Ng , Liem Nguyen
IPC分类号: H03K19/177
CPC分类号: H03K19/17772 , H03K19/17728 , H03K19/17736 , H03K19/17748 , H03K19/17796
摘要: A field-programmable object array integrated circuit employs a course gain architecture comprising a core array of highly optimized silicon objects that are individually programmed and synchronously connected via high performance parallel communications structures permitting the user to configure the device to implement a variety of very high performance algorithms. The high level functions available in the objects combined with the unique interconnect structures enables performance superior to existing field programmable solutions while maintaining and enhancing the flexibility. A consistent peripheral “donut” structure around the core of each object makes them interchangeable to build up complex circuits without redesign of standard objects.
摘要翻译: 现场可编程对象阵列集成电路采用课程增益架构,其包括经高度并行通信结构单独编程和同步连接的高度优化的硅对象的核心阵列,允许用户配置该设备以实现各种非常高的性能 算法。 与独特互连结构相结合的高可用性功能使得性能优于现有现场可编程解决方案,同时保持和增强灵活性。 围绕每个物体的核心的一致的外围“环形”结构使得它们可以互换,以建立复杂的电路,而不必重新设计标准物体。
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公开(公告)号:US08569879B2
公开(公告)日:2013-10-29
申请号:US13351142
申请日:2012-01-16
申请人: Kevin Atkinson , Clifford H. Boler
发明人: Kevin Atkinson , Clifford H. Boler
CPC分类号: G11C5/06 , G11C5/02 , G11C5/025 , G11C7/10 , G11C7/1069 , G11C11/4096 , H01L21/568 , H01L21/6835 , H01L23/50 , H01L23/5226 , H01L23/528 , H01L23/5382 , H01L23/5389 , H01L24/14 , H01L24/17 , H01L24/19 , H01L25/0657 , H01L2224/04105 , H01L2224/16113 , H01L2224/16145 , H01L2224/24137 , H01L2225/06513 , H01L2225/06544 , H01L2225/06548 , H01L2225/06555 , H01L2225/06593 , H01L2924/0002 , H01L2924/14 , H03K19/017581 , H01L2924/00
摘要: Multiple integrated circuits (ICs) die, from different wafers, can be picked-and-placed, front-side planarized using a vacuum applied to a planarizing disk, and attached to each other or a substrate. The streets between the IC die can be filled, and certain techniques or fixtures allow application of monolithic semiconductor wafer processing for interconnecting different die. High density I/O connections between different IC die can be obtained using structures and techniques for aligning vias to I/O structures, and (programmably routing IC I/O lines to appropriate vias. Existing IC die can be retrofitted for such interconnection to other IC die, such as by using similar techniques or tools.
摘要翻译: 可以将来自不同晶片的多个集成电路(IC)芯片取出并放置,使用施加到平坦化盘的真空并且彼此附接或基板将前侧平面化。 可以填充IC芯片之间的街道,并且某些技术或固定装置允许应用用于互连不同模具的单片半导体晶片处理。 可以使用用于将通孔对准I / O结构的结构和技术获得不同IC芯片之间的高密度I / O连接,并且(可编程地将IC I / O线路路由到适当的通孔),现有IC芯片可以进行改装, IC死,例如通过使用类似的技术或工具。
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公开(公告)号:US20100140784A1
公开(公告)日:2010-06-10
申请号:US12612256
申请日:2009-11-04
申请人: Kevin Atkinson , Clifford H. Boler
发明人: Kevin Atkinson , Clifford H. Boler
IPC分类号: H01L23/538 , H01L21/50
CPC分类号: G11C5/06 , G11C5/02 , G11C5/025 , G11C7/10 , G11C7/1069 , G11C11/4096 , H01L21/568 , H01L21/6835 , H01L23/50 , H01L23/5226 , H01L23/528 , H01L23/5382 , H01L23/5389 , H01L24/14 , H01L24/17 , H01L24/19 , H01L25/0657 , H01L2224/04105 , H01L2224/16113 , H01L2224/16145 , H01L2224/24137 , H01L2225/06513 , H01L2225/06544 , H01L2225/06548 , H01L2225/06555 , H01L2225/06593 , H01L2924/0002 , H01L2924/14 , H03K19/017581 , H01L2924/00
摘要: Multiple integrated circuits (ICs) die, from different wafers, can be picked-and-placed, front-side planarized using a vacuum applied to a planarizing disk, and attached to each other or a substrate. The streets between the IC die can be filled, and certain techniques or fixtures allow application of monolithic semiconductor wafer processing for interconnecting different die. High density I/O connections between different IC die can be obtained using structures and techniques for aligning vias to I/O structures, and programmably routing IC I/O lines to appropriate vias. Existing IC die can be retrofitted for such interconnection to other IC die, such as by using similar techniques or tools.
摘要翻译: 可以将来自不同晶片的多个集成电路(IC)芯片取出并放置,使用施加到平坦化盘的真空并且彼此附接或基板将前侧平面化。 可以填充IC芯片之间的街道,并且某些技术或固定装置允许应用用于互连不同模具的单片半导体晶片处理。 可以使用用于将通孔对准I / O结构的结构和技术以及可编程地将IC I / O线路路由到适当的通孔来获得不同IC裸片之间的高密度I / O连接。 现有的IC芯片可以通过使用类似的技术或工具来改进与其它IC芯片的互连。
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公开(公告)号:US20070188606A1
公开(公告)日:2007-08-16
申请号:US11520782
申请日:2006-09-14
申请人: Kevin Atkinson , Nikola Dimitrov , Ross Rawlings
发明人: Kevin Atkinson , Nikola Dimitrov , Ross Rawlings
IPC分类号: H04N7/18
CPC分类号: G01S5/163
摘要: The invention is directed to a tracking system for tracking the use of an object on a work piece within a predetermined work space comprising a target, at least one video imaging source and a computer. The target is attached to the object and calibrated to derive an “Object Tracking Point”. Each target has a predetermined address space and a predetermined anchor. At least one video imaging source is arranged such that the work piece is within the field of view. Each video imaging source is adapted to record images within its field of view. The computer is for receiving the images from each video imaging source and comparing the images with the predetermined anchor and the predetermined address, calculating the location of the target and the tool attached thereto in the work space relative to the work piece.
摘要翻译: 本发明涉及一种跟踪系统,用于跟踪在包括目标,至少一个视频成像源和计算机的预定工作空间内的工件上的物体的使用。 目标被附加到对象并被校准以得到“对象跟踪点”。 每个目标具有预定的地址空间和预定的锚点。 至少一个视频成像源被布置成使得工件在视野内。 每个视频成像源适于在其视野内记录图像。 计算机用于从每个视频成像源接收图像,并将图像与预定的锚点和预定地址进行比较,计算目标和工具相对于工件附着在其上的工具的位置。
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公开(公告)号:US5777354A
公开(公告)日:1998-07-07
申请号:US837570
申请日:1997-04-21
IPC分类号: H01L27/118
CPC分类号: H01L27/11807 , H01L27/11898
摘要: An apparatus and method of (input/output) I/O design, utilizing a predetermined relationship, whereby the outer ring area of an integrated circuit die are set aside for the I/O circuits which are contained in I/O cells. The height of the I/O cell is first reduced from the prior art cell heights, and the width of the cell is then varied according to the particular need of the circuit. When the drive strength of the I/O circuit is high, and the circuit is more complicated, a wider cell is assigned. Conversely, for a circuit that is relatively simple, a narrower cell will be assigned. Each I/O cell has one associated bonding pad which is placed directly below the starting point of that cell. The height of the cells may also be varied on each side of the chip in order to be able to place more I/O cells along one or more sides or edges of the chip.
摘要翻译: 利用预定关系的(输入/输出)I / O设计的装置和方法,由此为集成电路管芯的外环区域设置在I / O单元中包含的I / O电路。 I / O单元的高度首先从现有技术的单元格高度减小,然后根据电路的特定需要改变单元的宽度。 当I / O电路的驱动强度高,并且电路更复杂时,分配更宽的单元。 相反,对于相对简单的电路,将分配更窄的单元。 每个I / O单元具有一个相关联的焊盘,其直接放置在该单元的起始点的下方。 单元的高度也可以在芯片的每一侧变化,以便能够沿着芯片的一个或多个侧面或边缘放置更多的I / O单元。
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公开(公告)号:USD727635S1
公开(公告)日:2015-04-28
申请号:US29454201
申请日:2013-05-07
申请人: Kevin Atkinson
设计人: Kevin Atkinson
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公开(公告)号:US08097526B2
公开(公告)日:2012-01-17
申请号:US12612256
申请日:2009-11-04
申请人: Kevin Atkinson , Clifford H. Boler
发明人: Kevin Atkinson , Clifford H. Boler
IPC分类号: H01L21/00
CPC分类号: G11C5/06 , G11C5/02 , G11C5/025 , G11C7/10 , G11C7/1069 , G11C11/4096 , H01L21/568 , H01L21/6835 , H01L23/50 , H01L23/5226 , H01L23/528 , H01L23/5382 , H01L23/5389 , H01L24/14 , H01L24/17 , H01L24/19 , H01L25/0657 , H01L2224/04105 , H01L2224/16113 , H01L2224/16145 , H01L2224/24137 , H01L2225/06513 , H01L2225/06544 , H01L2225/06548 , H01L2225/06555 , H01L2225/06593 , H01L2924/0002 , H01L2924/14 , H03K19/017581 , H01L2924/00
摘要: Multiple integrated circuits (ICs) die, from different wafers, can be picked-and-placed, front-side planarized using a vacuum applied to a planarizing disk, and attached to each other or a substrate. The streets between the IC die can be filled, and certain techniques or fixtures allow application of monolithic semiconductor wafer processing for interconnecting different die. High density I/O connections between different IC die can be obtained using structures and techniques for aligning vias to I/O structures, and programmably routing IC I/O lines to appropriate vias. Existing IC die can be retrofitted for such interconnection to other IC die, such as by using similar techniques or tools.
摘要翻译: 可以将来自不同晶片的多个集成电路(IC)芯片取出并放置,使用施加到平坦化盘的真空并且彼此附接或基板将前侧平面化。 可以填充IC芯片之间的街道,并且某些技术或固定装置允许应用用于互连不同模具的单片半导体晶片处理。 可以使用用于将通孔对准I / O结构的结构和技术以及可编程地将IC I / O线路路由到适当的通孔来获得不同IC裸片之间的高密度I / O连接。 现有的IC芯片可以通过使用类似的技术或工具来改进与其它IC芯片的互连。
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8.
公开(公告)号:US20070229330A1
公开(公告)日:2007-10-04
申请号:US11626134
申请日:2007-01-23
申请人: Srinivas Guda , Kevin Atkinson , Amit Butala
发明人: Srinivas Guda , Kevin Atkinson , Amit Butala
IPC分类号: H03M7/00
CPC分类号: H03G3/3042 , H03G2201/508 , H04W52/146 , H04W52/367
摘要: Techniques for achieving linear monotonic output power with piecewise non-linear and/or non-monotonic circuits are described. A coarse gain is selected for a first circuit having non-linear and/or non-monotonic characteristics. A fine gain is selected for a second circuit used to account for output power error due to the coarse gain. First and second look-up tables may store output power versus gain for the first and second circuits, respectively. An output power in the first look-up table may be selected based on the requested output power, and the gain corresponding to the selected output power may be provided as the coarse gain. An output power in the second look-up table may be selected based on the output power error, and the gain corresponding to the selected output power may be provided as the second gain.
摘要翻译: 描述了用分段非线性和/或非单调电路实现线性单调输出功率的技术。 对具有非线性和/或非单调特性的第一电路选择粗增益。 对于用于考虑由于粗增益导致的输出功率误差的第二电路,选择精细增益。 第一和第二查找表可以分别存储第一和第二电路的输出功率与增益。 可以基于所请求的输出功率来选择第一查找表中的输出功率,并且可以将与所选择的输出功率相对应的增益提供为粗增益。 可以基于输出功率误差来选择第二查找表中的输出功率,并且可以将与所选输出功率相对应的增益提供为第二增益。
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9.
公开(公告)号:US5552333A
公开(公告)日:1996-09-03
申请号:US307942
申请日:1994-09-16
IPC分类号: H01L27/118 , H01L21/70
CPC分类号: H01L27/11807 , H01L27/11898
摘要: An apparatus and method of (input/output) I/O design, utilizing a predetermined relationship, whereby the outer ring area of an integrated circuit die are set aside for the I/O circuits which are contained in I/O cells. The height of the I/O cell is first reduced from the prior art cell heights, and the width of the cell is then varied according to the particular need of the circuit. When the drive strength of the I/O circuit is high, and the circuit is more complicated, a wider cell is assigned. Conversely, for a circuit that is relatively simple, a narrower cell will be assigned. Each I/O cell has one associated bonding pad which is placed directly below the starting point of that cell. The height of the cells may also be varied on each side of the chip in order to be able to place more I/O cells along one or more sides or edges of the chip.
摘要翻译: 利用预定关系的(输入/输出)I / O设计的装置和方法,由此为集成电路管芯的外环区域设置在I / O单元中包含的I / O电路。 I / O单元的高度首先从现有技术的单元格高度减小,然后根据电路的特定需要改变单元的宽度。 当I / O电路的驱动强度高,并且电路更复杂时,分配更宽的单元。 相反,对于相对简单的电路,将分配更窄的单元。 每个I / O单元具有一个相关联的焊盘,其直接放置在该单元的起始点的下方。 单元的高度也可以在芯片的每一侧变化,以便能够沿着芯片的一个或多个侧面或边缘放置更多的I / O单元。
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公开(公告)号:US4329807A
公开(公告)日:1982-05-18
申请号:US131404
申请日:1980-03-17
申请人: Kevin Atkinson
发明人: Kevin Atkinson
摘要: An aerodynamic toy adapted for spinning and throwing having a cylindrical ring with at least one retaining element thereon and a tether for engaging at least one of the retaining elements, which tether can be also gripped by the thrower's hand to enable the thrower to impart a spin to the ring thereby moving the toy in a forward direction generally parallel to the axis of spin. The spin of the cylindrical toy imparts an inertial stability and the cylindrical shape causes the ring to glide through the air over great distances.
摘要翻译: 一种适于旋转和投掷的空气动力学玩具,其具有在其上具有至少一个保持元件的圆柱形环和用于接合至少一个保持元件的系绳,所述系绳也可以由抛出者的手抓住以使得投掷者能够进行旋转 从而使玩具沿大致平行于旋转轴线的前进方向移动。 圆柱形玩具的旋转赋予惯性稳定性,并且圆柱形形状导致环在很大距离上滑过空气。
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