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    Low profile variable width input/output cells
    1.
    发明授权
    Low profile variable width input/output cells 失效
    低调可变宽度输入/输出单元

    公开(公告)号：US5777354A

    公开(公告)日：1998-07-07

    申请号：US837570

    申请日：1997-04-21

    申请人： Gary H. Cheung ,  Elias Lozano ,  Trung Nguyen ,  Michael J. Colwell ,  Kevin Atkinson

    发明人： Gary H. Cheung ,  Elias Lozano ,  Trung Nguyen ,  Michael J. Colwell ,  Kevin Atkinson

    IPC分类号： H01L27/118

    CPC分类号： H01L27/11807 ,  H01L27/11898

    摘要： An apparatus and method of (input/output) I/O design, utilizing a predetermined relationship, whereby the outer ring area of an integrated circuit die are set aside for the I/O circuits which are contained in I/O cells. The height of the I/O cell is first reduced from the prior art cell heights, and the width of the cell is then varied according to the particular need of the circuit. When the drive strength of the I/O circuit is high, and the circuit is more complicated, a wider cell is assigned. Conversely, for a circuit that is relatively simple, a narrower cell will be assigned. Each I/O cell has one associated bonding pad which is placed directly below the starting point of that cell. The height of the cells may also be varied on each side of the chip in order to be able to place more I/O cells along one or more sides or edges of the chip.

    摘要翻译： 利用预定关系的（输入/输出）I / O设计的装置和方法，由此为集成电路管芯的外环区域设置在I / O单元中包含的I / O电路。 I / O单元的高度首先从现有技术的单元格高度减小，然后根据电路的特定需要改变单元的宽度。 当I / O电路的驱动强度高，并且电路更复杂时，分配更宽的单元。 相反，对于相对简单的电路，将分配更窄的单元。 每个I / O单元具有一个相关联的焊盘，其直接放置在该单元的起始点的下方。 单元的高度也可以在芯片的每一侧变化，以便能够沿着芯片的一个或多个侧面或边缘放置更多的I / O单元。

    Method for designing low profile variable width input/output cells
    2.
    发明授权
    Method for designing low profile variable width input/output cells 失效
    低调可变宽度输入/输出单元的设计方法

    公开(公告)号：US5552333A

    公开(公告)日：1996-09-03

    申请号：US307942

    申请日：1994-09-16

    申请人： Gary H. Cheung ,  Elias Lozano ,  Trung Nguyen ,  Michael J. Colwell ,  Kevin Atkinson

    发明人： Gary H. Cheung ,  Elias Lozano ,  Trung Nguyen ,  Michael J. Colwell ,  Kevin Atkinson

    IPC分类号： H01L27/118 ,  H01L21/70

    CPC分类号： H01L27/11807 ,  H01L27/11898

    摘要： An apparatus and method of (input/output) I/O design, utilizing a predetermined relationship, whereby the outer ring area of an integrated circuit die are set aside for the I/O circuits which are contained in I/O cells. The height of the I/O cell is first reduced from the prior art cell heights, and the width of the cell is then varied according to the particular need of the circuit. When the drive strength of the I/O circuit is high, and the circuit is more complicated, a wider cell is assigned. Conversely, for a circuit that is relatively simple, a narrower cell will be assigned. Each I/O cell has one associated bonding pad which is placed directly below the starting point of that cell. The height of the cells may also be varied on each side of the chip in order to be able to place more I/O cells along one or more sides or edges of the chip.

    摘要翻译： 利用预定关系的（输入/输出）I / O设计的装置和方法，由此为集成电路管芯的外环区域设置在I / O单元中包含的I / O电路。 I / O单元的高度首先从现有技术的单元格高度减小，然后根据电路的特定需要改变单元的宽度。 当I / O电路的驱动强度高，并且电路更复杂时，分配更宽的单元。 相反，对于相对简单的电路，将分配更窄的单元。 每个I / O单元具有一个相关联的焊盘，其直接放置在该单元的起始点的下方。 单元的高度也可以在芯片的每一侧变化，以便能够沿着芯片的一个或多个侧面或边缘放置更多的I / O单元。

    High speed driver circuit with improved off transition feedback
    3.
    发明授权
    High speed driver circuit with improved off transition feedback 失效
    高速驱动电路具有改进的过渡反馈

    公开(公告)号：US5539336A

    公开(公告)日：1996-07-23

    申请号：US432358

    申请日：1995-05-01

    申请人： Trung Nguyen ,  George Shing ,  Luong Hung ,  Gary H. Cheung ,  Elias Lozano

    发明人： Trung Nguyen ,  George Shing ,  Luong Hung ,  Gary H. Cheung ,  Elias Lozano

    IPC分类号： H03K17/16 ,  H03K19/003 ,  H03K19/0175

    CPC分类号： H03K19/00361 ,  H03K17/166

    摘要： A driver circuit has a single feedback transistor in the driver transistor well to provide a momentary feedback from source to gate and maintain conductance of the driver transistor during turnoff of the driver transistor and thus reduce ringing oscillation at the transistor source output. An enable/disable signal is applied to control conduction circuitry and the driver transistor and force the output to a high impedance state when the circuit is disabled. Clocked operation of the driver circuit is provided with circuitry merged with a latch. A terminal for receiving a global i.sub.dd test signal controls circuitry removing power to the driver circuit and applying a ground potential to the driver output in response to the global i.sub.dd test signal.

    摘要翻译： 驱动器电路在驱动晶体管中具有单反馈晶体管，从而提供从源极到栅极的瞬时反馈，并且在驱动晶体管截止期间保持驱动晶体管的导通，从而减少晶体管源极输出处的振荡振荡。 当禁止电路时，施加使能/禁止信号来控制导通电路和驱动晶体管，并将输出强制为高阻抗状态。 驱动器电路的时钟操作具有与锁存器合并的电路。 用于接收全局idd测试信号的终端控制电路去除驱动电路的电力，并且响应于全局idd测试信号将地电位施加到驱动器输出。

    Sample and hold circuit including a multiplexer
    5.
    发明授权
    Sample and hold circuit including a multiplexer 有权
    采样和保持电路包括多路复用器

    公开(公告)号：US06801146B2

    公开(公告)日：2004-10-05

    申请号：US10295449

    申请日：2002-11-14

    申请人： Kent Kernahan ,  Elias Lozano ,  Daniel W. Yoder

    发明人： Kent Kernahan ,  Elias Lozano ,  Daniel W. Yoder

    IPC分类号： H03M100

    CPC分类号： G11C27/02 ,  H03K5/133 ,  H03L7/0996

    摘要： A sample and hold circuit is provided which includes first and second input circuits adapted to sample, respectively, first and second voltage measurements. The second voltage measurements correspond to current measurements. A multiplexer coupled to the first and second input circuits selected either the first or second measurements. A voltage sealer is provided between the output of the first input circuit and the multiplexer. A multiplier circuit, which may be a switched capacitor network, is utilized to multiply the second voltage measurements. The multiplexer provides its output to an analog-to-digital converter.

    摘要翻译： 提供了采样和保持电路，其包括适于分别采样第一和第二电压测量的第一和第二输入电路。 第二电压测量对应于电流测量。 耦合到第一和第二输入电路的多路复用器选择第一或第二测量。 在第一输入电路的输出和多路复用器之间提供电压定标器。 可以使用可以是开关电容器网络的乘法器电路来乘以第二电压测量。 多路复用器将其输出提供给模数转换器。

    System for controlling a plurality of pulse-width-modulated switching power converters
    6.
    发明授权
    System for controlling a plurality of pulse-width-modulated switching power converters 有权
    用于控制多个脉宽调制开关电源转换器的系统

    公开(公告)号：US06965220B2

    公开(公告)日：2005-11-15

    申请号：US10295612

    申请日：2002-11-14

    申请人： Kent Kernahan ,  Elias Lozano ,  John Carl Thomas

    发明人： Kent Kernahan ,  Elias Lozano ,  John Carl Thomas

    IPC分类号： G05F3/26 ,  H02J7/00 ,  H02M1/084 ,  H02M3/156 ,  H02M3/157 ,  H02M3/158 ,  H03M5/08 ,  G05F1/40

    CPC分类号： H02M3/157 ,  G05F3/262 ,  H02J7/0065 ,  H02M1/0845 ,  H02M3/156 ,  H02M3/1588 ,  H02M2001/0012 ,  H02M2001/007 ,  H02M2001/008 ,  H03M5/08 ,  H05B41/2828 ,  Y02B20/186 ,  Y02B70/1466 ,  Y10T307/438 ,  Y10T307/469

    摘要： A plurality of pulse-width-modulated switching power converters are controlled in a system which includes a programmable control circuit which provides control information to cause generation of pulse-width-modulated signals as appropriate to correct an operation of a switching power converter. The programmable control circuit receives digital information which identifies the topology of each of the switching power converters being controlled. The programmable control circuit also receives digital information which identifies associated target performance for the switching power converters under its control. The programmable control circuit also receives information which is indicative of the performance of the power converters and compares the performance of the power converters with respect to the target performance of the power converters. If a difference between the performance and the target performance is identified, the programmable control circuit generates the control information is needed to correct the operation of the switching power converters.

    摘要翻译： 在包括可编程控制电路的系统中控制多个脉冲宽度调制的开关电源转换器，该可编程控制电路提供控制信息以适当地产生脉冲宽度调制信号以校正开关功率转换器的操作。 可编程控制电路接收识别被控制的每个开关功率转换器的拓扑的数字信息。 可编程控制电路还接收数字信息，其识别其控制下的开关电源转换器的相关目标性能。 可编程控制电路还接收指示功率转换器的性能的信息，并且相对于功率转换器的目标性能来比较功率转换器的性能。 如果识别出性能和目标性能之间的差异，则可编程控制电路产生需要的控制信息来校正开关电源转换器的操作。