公开(公告)号：US20080067623A1

公开(公告)日：2008-03-20

申请号：US11944839

申请日：2007-11-26

申请人： Douglas Coolbaugh ,  Jeffrey Johnson ,  Xuefeng Liu ,  Bradley Orner ,  Robert Rassel ,  David Sheridan

发明人： Douglas Coolbaugh ,  Jeffrey Johnson ,  Xuefeng Liu ,  Bradley Orner ,  Robert Rassel ,  David Sheridan

IPC分类号： H01L29/872

CPC分类号： H01L29/872 ,  H01L29/0657 ,  H01L29/417 ,  H01L29/66136 ,  H01L29/66143 ,  H01L29/861 ,  H01L29/868

摘要： A structure and method of fabricating lateral diodes. The diodes include Schottky diodes and PIN diodes. The method of fabrication includes forming one or more doped regions and more trenches in a silicon substrate and forming metal silicides on the sidewalls of the trenches. The fabrication of lateral diodes may be integrated with the fabrication of field effect, bipolar and SiGe bipolar transistors.

摘要翻译： 制造横向二极管的结构和方法。 二极管包括肖特基二极管和PIN二极管。 制造方法包括在硅衬底中形成一个或多个掺杂区域和更多沟槽，并在沟槽的侧壁上形成金属硅化物。 横向二极管的制造可以与场效应，双极和SiGe双极晶体管的制造集成。

公开(公告)号：US20070105354A1

公开(公告)日：2007-05-10

申请号：US11164108

申请日：2005-11-10

申请人： Douglas Coolbaugh ,  Xuefeng Liu ,  Robert Rassel ,  David Sheridan

发明人： Douglas Coolbaugh ,  Xuefeng Liu ,  Robert Rassel ,  David Sheridan

IPC分类号： H01L21/425

CPC分类号： H01L21/8249 ,  H01L29/0821 ,  H01L29/66272

摘要： A method of fabricating a buried subcollector in which the buried subcollector is implanted to a depth in which during subsequent epi growth the buried subcollector remains substantially below the fictitious interface between the epi layer and the substrate is provided. In particular, the inventive method forms a buried subcollector having an upper surface (i.e., junction) that is located at a depth from about 3000 Å or greater from the upper surface of the semiconductor substrate. This deep buried subcollector having an upper surface that is located at a depth from about 3000 Å or greater from the upper surface of the substrate is formed using a reduced implant energy (as compared to a standard deep implanted subcollector process) at a relative high dose. The present invention also provides a semiconductor structure including the inventive buried subcollector which can be used as cathode for passive devices in high frequency applications.

摘要翻译： 一种制造掩埋子集电极的方法，其中将埋入的子集电极注入深度，其中在随后的外延生长期间，掩埋子集电极基本上保持在外延层和衬底之间的虚拟界面的下方。 特别地，本发明的方法形成了具有从半导体衬底的上表面位于距离大约或更大的深度的上表面（即结）的掩埋子集电极。 该深埋底部集电器具有从衬底的上表面位于距离大约等于或更大的深度的上表面，其使用相对高剂量的减少的注入能量（与标准深度植入子集电极过程相比） 。 本发明还提供了一种半导体结构，其包括本发明的掩埋子集电极，其可以用作高频应用中的无源器件的阴极。

公开(公告)号：US20050161770A1

公开(公告)日：2005-07-28

申请号：US11004877

申请日：2004-12-07

申请人： Douglas Coolbaugh ,  Stephen Furkay ,  Jeffrey Johnson ,  Robert Rassel ,  David Sheridan

发明人： Douglas Coolbaugh ,  Stephen Furkay ,  Jeffrey Johnson ,  Robert Rassel ,  David Sheridan

IPC分类号： H01L29/93 ,  H01L29/94 ,  H01L27/108

CPC分类号： H01L29/93 ,  H01L29/94

摘要： A method and device providing a HA junction varactor which may be fabricated with a reduced variation in C-V tuning curve from one varactor to the next. The process produces a varactor with an active region formed substantially by doping an Si substrate with various dopants at various energy levels. Accordingly, unit-to-unit device variation is reduced because etching, growing, and deposition processes to make the active portion of the varactor are reduced or eliminated. The resulting HA junction has a more uniform thickness, and a more uniform doping profile.

摘要翻译： 提供HA结变容二极管的方法和装置，其可以以从一个变容二极管到下一个变容二极管的C-V调谐曲线的变化减小来制造。 该方法产生可变电抗器，其中有源区基本上通过以各种能级掺杂各种掺杂剂的Si衬底而形成。 因此，由于蚀刻，生长和沉积工艺以使变容二极管的活性部分减少或消除，因此减小了单元到单元的装置变化。 所得到的HA结具有更均匀的厚度和更均匀的掺杂分布。

公开(公告)号：US20050161769A1

公开(公告)日：2005-07-28

申请号：US10707905

申请日：2004-01-23

申请人： Douglas Coolbaugh ,  Stephen Furkay ,  Jeffrey Johnson ,  Robert Rassel ,  David Sheridan

发明人： Douglas Coolbaugh ,  Stephen Furkay ,  Jeffrey Johnson ,  Robert Rassel ,  David Sheridan

IPC分类号： H01L29/93 ,  H01L29/94

CPC分类号： H01L29/93 ,  H01L29/94

摘要： A method and device providing a HA junction varactor which may be fabricated with a reduced variation in C-V tuning curve from one varactor to the next. The process produces a varactor with an active region formed substantially by doping an Si substrate with various dopants at various energy levels. Accordingly, unit-to-unit device variation is reduced because etching, growing, and deposition processes to make the active portion of the varactor are reduced or eliminated. The resulting HA junction has a more uniform thickness, and a more uniform doping profile.

摘要翻译： 提供HA结变容二极管的方法和装置，其可以以从一个变容二极管到下一个变容二极管的C-V调谐曲线的变化减小来制造。 该方法产生可变电抗器，其中有源区基本上通过以各种能级掺杂各种掺杂剂的Si衬底而形成。 因此，由于蚀刻，生长和沉积工艺以使变容二极管的活性部分减少或消除，因此减小了单元到单元的装置变化。 所得到的HA结具有更均匀的厚度和更均匀的掺杂分布。

公开(公告)号：US20070275534A1

公开(公告)日：2007-11-29

申请号：US11839106

申请日：2007-08-15

申请人： Douglas Coolbaugh ,  Louis Lanzerotti ,  Bradley Orner ,  Jay Rascoe ,  David Sheridan ,  Stephen St. Onge

发明人： Douglas Coolbaugh ,  Louis Lanzerotti ,  Bradley Orner ,  Jay Rascoe ,  David Sheridan ,  Stephen St. Onge

IPC分类号： H01L21/331

CPC分类号： H01L21/8222 ,  H01L21/266 ,  H01L27/0825 ,  H01L29/0821 ,  H01L29/36

摘要： Methods are disclosed for forming a varied impurity profile for a collector using scattered ions while simultaneously forming a subcollector. In one embodiment, the invention includes: providing a substrate; forming a mask layer on the substrate including a first opening having a first dimension; and substantially simultaneously forming through the first opening a first impurity region at a first depth in the substrate (subcollector) and a second impurity region at a second depth different than the first depth in the substrate. The breakdown voltage of a device can be controlled by the size of the first dimension, i.e., the distance of first opening to an active region of the device. Numerous different sized openings can be used to provide devices with different breakdown voltages using a single mask and single implant. A semiconductor device is also disclosed.

摘要翻译： 公开了用于使用散射离子形成收集器的不同杂质分布的同时形成子集电极的方法。 在一个实施例中，本发明包括：提供衬底; 在所述基板上形成掩模层，所述掩模层包括具有第一尺寸的第一开口; 并且基本上同时地通过第一开口形成在衬底（子集电极）中的第一深度处的第一杂质区域和与衬底中的第一深度不同的第二深度的第二杂质区域。 装置的击穿电压可以通过第一尺寸的尺寸，即第一开口到装置的有源区域的距离来控制。 可以使用许多不同尺寸的开口来使用单个掩模和单个植入物来提供具有不同击穿电压的装置。 还公开了一种半导体器件。

公开(公告)号：US20060270203A1

公开(公告)日：2006-11-30

申请号：US10908884

申请日：2005-05-31

申请人： Douglas Coolbaugh ,  Louis Lanzerotti ,  Bradley Orner ,  Jay Rascoe ,  David Sheridan ,  Stephen St. Onge

发明人： Douglas Coolbaugh ,  Louis Lanzerotti ,  Bradley Orner ,  Jay Rascoe ,  David Sheridan ,  Stephen St. Onge

IPC分类号： H01L21/425

CPC分类号： H01L21/8222 ,  H01L21/266 ,  H01L27/0825 ,  H01L29/0821 ,  H01L29/36

摘要： Methods are disclosed for forming a varied impurity profile for a collector using scattered ions while simultaneously forming a subcollector. In one embodiment, the invention includes: providing a substrate; forming a mask layer on the substrate including a first opening having a first dimension; and substantially simultaneously forming through the first opening a first impurity region at a first depth in the substrate (subcollector) and a second impurity region at a second depth different than the first depth in the substrate. The breakdown voltage of a device can be controlled by the size of the first dimension, i.e., the distance of first opening to an active region of the device. Numerous different sized openings can be used to provide devices with different breakdown voltages using a single mask and single implant. A semiconductor device is also disclosed.

摘要翻译： 公开了用于使用散射离子形成收集器的不同杂质分布的同时形成子集电极的方法。 在一个实施例中，本发明包括：提供衬底; 在所述基板上形成掩模层，所述掩模层包括具有第一尺寸的第一开口; 并且基本上同时地通过第一开口形成在衬底（子集电极）中的第一深度处的第一杂质区域和与衬底中的第一深度不同的第二深度的第二杂质区域。 装置的击穿电压可以通过第一尺寸的尺寸，即第一开口到装置的有源区域的距离来控制。 可以使用许多不同尺寸的开口来使用单个掩模和单个植入物来提供具有不同击穿电压的装置。 还公开了一种半导体器件。

公开(公告)号：US20070096257A1

公开(公告)日：2007-05-03

申请号：US11163882

申请日：2005-11-02

申请人： Douglas Coolbaugh ,  Alvin Joseph ,  Seong-dong Kim ,  Louis Lanzerotti ,  Xuefeng Liu ,  Robert Rassel

发明人： Douglas Coolbaugh ,  Alvin Joseph ,  Seong-dong Kim ,  Louis Lanzerotti ,  Xuefeng Liu ,  Robert Rassel

IPC分类号： H01L27/102

CPC分类号： H01L27/0814 ,  H01L27/0664 ,  H01L27/0823 ,  H01L29/0821 ,  H01L29/7371 ,  H01L29/868

摘要： A structure comprises a single wafer with a first subcollector formed in a first region having a first thickness and a second subcollector formed in a second region having a second thickness, different from the first thickness. A method is also contemplated which includes providing a substrate including a first layer and forming a first doped region in the first layer. The method further includes forming a second layer on the first layer and forming a second doped region in the second layer. The second doped region is formed at a different depth than the first doped region. The method also includes forming a first reachthrough in the first layer and forming a second reachthrough in second layer to link the first reachthrough to the surface.

摘要翻译： 一种结构包括具有形成在具有第一厚度的第一区域中的第一子集电极的单晶片和形成在具有不同于第一厚度的第二厚度的第二区域中的第二子集电极。 还可以设想一种方法，其包括提供包括第一层并在第一层中形成第一掺杂区的衬底。 该方法还包括在第一层上形成第二层并在第二层中形成第二掺杂区域。 第二掺杂区形成在与第一掺杂区不同的深度。 该方法还包括在第一层中形成第一通道并在第二层中形成第二通道以将第一通道连接到表面。

公开(公告)号：US20080099787A1

公开(公告)日：2008-05-01

申请号：US11873696

申请日：2007-10-17

申请人： Douglas Coolbaugh ,  Alvin Joseph ,  Seong-dong Kim ,  Louis Lanzerotti ,  Xuefeng Liu ,  Robert Rassel

发明人： Douglas Coolbaugh ,  Alvin Joseph ,  Seong-dong Kim ,  Louis Lanzerotti ,  Xuefeng Liu ,  Robert Rassel

IPC分类号： H01L27/06

CPC分类号： H01L27/0814 ,  H01L27/0664 ,  H01L27/0823 ,  H01L29/0821 ,  H01L29/7371 ,  H01L29/868

摘要： A structure comprises a single wafer with a first subcollector formed in a first region having a first thickness and a second subcollector formed in a second region having a second thickness, different from the first thickness. A method is also contemplated which includes providing a substrate including a first layer and forming a first doped region in the first layer. The method further includes forming a second layer on the first layer and forming a second doped region in the second layer. The second doped region is formed at a different depth than the first doped region. The method also includes forming a first reachthrough in the first layer and forming a second reachthrough in second layer to link the first reachthrough to the surface.

摘要翻译： 一种结构包括具有形成在具有第一厚度的第一区域中的第一子集电极的单晶片和形成在具有不同于第一厚度的第二厚度的第二区域中的第二子集电极。 还可以设想一种方法，其包括提供包括第一层并在第一层中形成第一掺杂区的衬底。 该方法还包括在第一层上形成第二层并在第二层中形成第二掺杂区域。 第二掺杂区形成在与第一掺杂区不同的深度。 该方法还包括在第一层中形成第一通道并在第二层中形成第二通道以将第一通道连接到表面。

公开(公告)号：US20060145300A1

公开(公告)日：2006-07-06

申请号：US10905486

申请日：2005-01-06

申请人： Douglas Coolbaugh ,  Stephen Furkay ,  Jeffrey Johnson ,  Robert Rassel

发明人： Douglas Coolbaugh ,  Stephen Furkay ,  Jeffrey Johnson ,  Robert Rassel

IPC分类号： H01L29/93 ,  H01L21/20

CPC分类号： H01L29/93

摘要： A semiconductor structure comprising a hyperabrupt junction varactor with a compensated cathode contact as well as a method of fabricating the same are disclosed. The method includes a single implant mask which is used in forming the subcollector/cathode, collector/well and hyperabrupt junction.

摘要翻译： 公开了一种半导体结构，其包括具有补偿的阴极接触的超级连接变容二极管及其制造方法。 该方法包括用于形成子集电极/阴极，集电极/阱和超破裂结的单个注入掩模。

公开(公告)号：US20050245038A1

公开(公告)日：2005-11-03

申请号：US11053721

申请日：2005-02-08

申请人： Douglas Coolbaugh ,  James Dunn ,  Michael Gordon ,  Mohamed Hammad ,  Jeffrey Johnson ,  David Sheridan

发明人： Douglas Coolbaugh ,  James Dunn ,  Michael Gordon ,  Mohamed Hammad ,  Jeffrey Johnson ,  David Sheridan

IPC分类号： H01L21/8222 ,  H01L27/08 ,  H01L29/93 ,  H01L29/94

CPC分类号： H01L27/0811 ,  H01L27/0808 ,  H01L29/93 ,  H01L29/94

摘要： Varactors are provided which have a high tunability and/or a high quality factor associated therewith as well as methods for fabricating the same. One type of varactor disclosed is a quasi hyper-abrupt base-collector junction varactor which includes a substrate having a collector region of a first conductivity type atop a subcollector region, the collector region having a plurality of isolation regions present therein; reach-through implant regions located between at least a pair of the isolation regions; a SiGe layer atop a portion of the substrate not containing a reach-through implant region, the SiGe layer having an extrinsic base region of a second conductivity type which is different from the first conductivity type; and an antimony implant region located between the extrinsic base region and the subcollector region. Another type of varactor disclosed is an MOS varactor which includes at least a poly gate region and a well region wherein the poly gate region and the well region have opposite polarities.

摘要翻译： 提供了具有高可调性和/或与之相关的高品质因素的变形反应器及其制造方法。 公开的一种类型的变容二极管是准超突发的基极 - 集电极结变容二极管，其包括在子集电极区域顶部具有第一导电类型的集电极区域的基板，所述集电极区域中存在多个隔离区域; 位于至少一对隔离区之间的贯穿植入区; 所述SiGe层位于所述衬底的不包含直通注入区域的部分之上，所述SiGe层具有不同于所述第一导电类型的第二导电类型的非本征基区; 以及位于外部基极区域和子集电极区域之间的锑注入区域。 所公开的另一种类型的变容二极管是MOS变容二极管，其至少包括多晶硅栅极区域和阱区域，其中多晶硅栅极区域和阱区域具有相反的极性。