公开(公告)号：US20120213466A1

公开(公告)日：2012-08-23

申请号：US13029951

申请日：2011-02-17

申请人： Dusan Golubovic ,  Gerhard Koops ,  Tony Vanhoucke ,  Rob Van Dalen

发明人： Dusan Golubovic ,  Gerhard Koops ,  Tony Vanhoucke ,  Rob Van Dalen

IPC分类号： G02B6/122 ,  H01L31/18

CPC分类号： H01L27/15 ,  H01L31/173 ,  H01L33/343

摘要： An optocoupler device facilitates on-chip galvanic isolation. In accordance with various example embodiments, an optocoupler circuit includes a silicon-on-insulator substrate having a silicon layer on a buried insulator layer, a silicon-based light-emitting diode (LED) having a silicon p-n junction in the silicon layer, and a silicon-based photodetector in the silicon layer. The LED and photodetector are respectively connected to galvanically isolated circuits in the silicon layer. A local oxidation of silicon (LOCOS) isolation material and the buried insulator layer galvanically isolate the first circuit from the second circuit to prevent charge carriers from moving between the first and second circuits. The LED and photodetector communicate optically to pass signals between the galvanically isolated circuits.

摘要翻译： 光耦合器件便于片上电流隔离。 根据各种示例实施例，光耦合器电路包括在绝缘体层上具有硅层的绝缘体上硅衬底，在硅层中具有硅pn结的硅基发光二极管（LED），以及 硅层中的硅基光电探测器。 LED和光电检测器分别连接到硅层中的电隔离电路。 硅（LOCOS）隔离材料的局部氧化和掩埋绝缘体层将第一电路与第二电路电隔离，以防止电荷载流子在第一和第二电路之间移动。 LED和光电检测器以光学方式进行通信，以在电隔离电路之间传递信号。

公开(公告)号：US08260098B1

公开(公告)日：2012-09-04

申请号：US13029951

申请日：2011-02-17

申请人： Dusan Golubovic ,  Gerhard Koops ,  Tony Vanhoucke ,  Rob Van Dalen

发明人： Dusan Golubovic ,  Gerhard Koops ,  Tony Vanhoucke ,  Rob Van Dalen

IPC分类号： G02B6/12 ,  H01L21/70 ,  H01L21/8238 ,  H01L21/336 ,  H01L21/331 ,  H01L21/76

CPC分类号： H01L27/15 ,  H01L31/173 ,  H01L33/343

摘要： An optocoupler device facilitates on-chip galvanic isolation. In accordance with various example embodiments, an optocoupler circuit includes a silicon-on-insulator substrate having a silicon layer on a buried insulator layer, a silicon-based light-emitting diode (LED) having a silicon p-n junction in the silicon layer, and a silicon-based photodetector in the silicon layer. The LED and photodetector are respectively connected to galvanically isolated circuits in the silicon layer. A local oxidation of silicon (LOCOS) isolation material and the buried insulator layer galvanically isolate the first circuit from the second circuit to prevent charge carriers from moving between the first and second circuits. The LED and photodetector communicate optically to pass signals between the galvanically isolated circuits.

摘要翻译： 光耦合器件便于片上电流隔离。 根据各种示例实施例，光耦合器电路包括在绝缘体层上具有硅层的绝缘体上硅衬底，在硅层中具有硅pn结的硅基发光二极管（LED），以及 硅层中的硅基光电探测器。 LED和光电检测器分别连接到硅层中的电隔离电路。 硅（LOCOS）隔离材料的局部氧化和掩埋绝缘体层将第一电路与第二电路电隔离，以防止电荷载流子在第一和第二电路之间移动。 LED和光电检测器以光学方式进行通信，以在电隔离电路之间传递信号。

公开(公告)号：US09443773B2

公开(公告)日：2016-09-13

申请号：US13148023

申请日：2010-01-15

申请人： Tony Vanhoucke ,  Anco Heringa ,  Johannes Josephus Theodorus Martinus Donkers ,  Jan Willem Slotboom

发明人： Tony Vanhoucke ,  Anco Heringa ,  Johannes Josephus Theodorus Martinus Donkers ,  Jan Willem Slotboom

IPC分类号： H01L21/8249 ,  H01L27/06 ,  H01L29/08 ,  H01L29/732

CPC分类号： H01L21/8249 ,  H01L27/0623 ,  H01L29/0821 ,  H01L29/7322

摘要： Disclosed is a method of manufacturing a vertical bipolar transistor in a CMOS process, comprising implanting an impurity of a first type into a the substrate (100) to form a buried region (150, 260) therein; forming a halo implant (134) using an impurity of a second type and a shallow implant (132) using an impurity of the first type, said halo implant enveloping the shallow implant in the substrate and being located over said buried region (150, 250); forming, adjacent to the halo implant (134), a further implant (136) using an impurity of the second type for providing a conductive connection to the halo implant; and providing respective connections (170, 160, 270) to the further implant (136), the shallow implant (132) and the buried region (150, 260) allowing the shallow implant, halo implant and buried region to be respectively operable as emitter, base and collector of the vertical bipolar transistor. Hence, an IC may be provided that comprises vertical bipolar transistors manufactured using CMOS processing steps only.

摘要翻译： 公开了一种在CMOS工艺中制造垂直双极晶体管的方法，包括将第一类型的杂质注入到衬底（100）中以在其中形成掩埋区域（150,260）; 使用第二类型的杂质和使用第一类型的杂质的浅植入物（132）形成晕轮植入物（134），所述晕轮植入物将衬底中的浅植入物包围并位于所述掩埋区域（150,250） ）; 与所述晕轮植入物（134）相邻地形成使用所述第二类型的杂质的另外的植入物（136），用于提供与所述晕轮植入物的导电连接; 以及向所述另外的植入物（136）提供相应的连接（170,160,270），所述浅植入物（132）和所述掩埋区域（150,260）允许所述浅植入物，晕圈植入物和掩埋区域分别可作为发射体 ，垂直双极晶体管的基极和集电极。 因此，可以提供包括仅使用CMOS处理步骤制造的垂直双极晶体管的IC。

公开(公告)号：US08704335B2

公开(公告)日：2014-04-22

申请号：US13076290

申请日：2011-03-30

申请人： Tony Vanhoucke ,  Johannes Josephus Theodorus Marinus Donkers ,  Hans Mertens ,  Philippe Meunier-Beillard

发明人： Tony Vanhoucke ,  Johannes Josephus Theodorus Marinus Donkers ,  Hans Mertens ,  Philippe Meunier-Beillard

IPC分类号： H01L29/66 ,  H01L29/06 ,  H01L21/331 ,  H01L21/00

CPC分类号： H01L29/66318 ,  H01L29/0817 ,  H01L29/66242

摘要： A bipolar transistor is fabricated having a collector (52) in a substrate (1) and a base (57, 58) and an emitter (59) formed over the substrate. The base has a stack region (57) which is laterally separated from the emitter (59) by an electrically insulating spacer (71). The insulating spacer (71) has a width dimension at its top end at least as large as the width dimension at its bottom end and forms a Γ-shape or an oblique shape. The profile reduces the risk of silicide bridging at the top of the spacer in subsequent processing, while maintaining the width of emitter window.

摘要翻译： 制造了在衬底（1）中具有集电体（52）和形成在衬底上的基极（57,58）和发射极（59）的双极晶体管。 底座具有通过电绝缘间隔件（71）与发射器（59）横向分开的堆叠区域（57）。 绝缘间隔件（71）的顶端的宽度尺寸至少与其底端的宽度尺寸一样大，并形成一个“G”形或一个倾斜的形状。 该轮廓降低了后续处理中间隔物顶部的硅化物桥接的风险，同时保持了发射器窗口的宽度。

公开(公告)号：US08183894B2

公开(公告)日：2012-05-22

申请号：US12674735

申请日：2008-08-06

申请人： Sebastien Nuttinck ,  Tony Vanhoucke ,  Godefridus Hurkx

发明人： Sebastien Nuttinck ,  Tony Vanhoucke ,  Godefridus Hurkx

IPC分类号： H03B19/00

CPC分类号： H03F3/19 ,  H03B19/14 ,  H03D2200/0021

摘要： A device (100) for generating an output signal (So) having substantially same or increased output frequency compared to an input frequency of an input signal (Si), the device (100) comprising: a bipolar transistor (102) having a base (B), a collector (C), and an emitter (E); a control unit (104) adapted for controlling application of the input signal (Si) to the base (B) and adapted for controlling application of a collector-emitter voltage between the collector (C) and the emitter (E) in a manner for operating the bipolar transistor (102) in a snap-back regime to obtain a non-linear collector current characteristic to thereby generate the output signal (So) having the substantially same or increased output frequency resulting from a steeply rising collector current.

摘要翻译： 一种用于产生与输入信号（Si）的输入频率相比具有基本相同或增加的输出频率的输出信号（So）的装置（100），所述装置（100）包括：双极晶体管（102），具有基极（ B），集电极（C）和发射极（E）; 控制单元（104），其适于控制对基座（B）的输入信号（Si）的施加，并且适于控制在集电极（C）和发射极（E）之间施加集电极 - 发射极电压， 在回扫状态下操作双极晶体管（102）以获得非线性集电极电流特性，从而产生具有由急剧上升的集电极电流产生的基本相同或增加的输出频率的输出信号（So）。

公开(公告)号：US20110215841A1

公开(公告)日：2011-09-08

申请号：US12674735

申请日：2008-08-06

申请人： Sebastien Nuttinck ,  Tony Vanhoucke ,  Godefridus Hurkx

发明人： Sebastien Nuttinck ,  Tony Vanhoucke ,  Godefridus Hurkx

IPC分类号： H03B19/14

CPC分类号： H03F3/19 ,  H03B19/14 ,  H03D2200/0021

摘要： A device (100) for generating an output signal (So) having substantially same or increased output frequency compared to an input frequency of an input signal (Si), the device (100) comprising: a bipolar transistor (102) having a base (B), a collector (C), and an emitter (E); a control unit (104) adapted for controlling application of the input signal (Si) to the base (B) and adapted for controlling application of a collector-emitter voltage between the collector (C) and the emitter (E) in a manner for operating the bipolar transistor (102) in a snap-back regime to obtain a non-linear collector current characteristic to thereby generate the output signal (So) having the substantially same or increased output frequency resulting from a steeply rising collector current.

摘要翻译： 一种用于产生与输入信号（Si）的输入频率相比具有基本相同或增加的输出频率的输出信号（So）的装置（100），所述装置（100）包括：双极晶体管（102），具有基极（ B），集电极（C）和发射极（E）; 控制单元（104），其适于控制对基座（B）的输入信号（Si）的施加，并且适于控制在集电极（C）和发射极（E）之间施加集电极 - 发射极电压， 在回扫状态下操作双极晶体管（102）以获得非线性集电极电流特性，从而产生具有由急剧上升的集电极电流产生的基本相同或增加的输出频率的输出信号（So）。

公开(公告)号：US08872237B2

公开(公告)日：2014-10-28

申请号：US13299755

申请日：2011-11-18

申请人： Tony Vanhoucke ,  Johannes Josephus Theodorus Marinus Donkers ,  Hans Mertens ,  Blandine Duriez ,  Evelyne Gridelet

发明人： Tony Vanhoucke ,  Johannes Josephus Theodorus Marinus Donkers ,  Hans Mertens ,  Blandine Duriez ,  Evelyne Gridelet

IPC分类号： H01L29/66 ,  H01L29/737 ,  H01L29/08

CPC分类号： H01L29/0821 ,  H01L29/66242 ,  H01L29/7378

摘要： Disclosed is a method of manufacturing a heterojunction bipolar transistor comprising a substrate, an upper region of said substrate comprising an active region of the bipolar transistor bordered by shallow trench insulation, said active region comprising a buried collector region extending to a depth beyond the depth of the shallow trench insulation, the method comprising forming a trench in the substrate adjacent to said active region, said trench extending through the shallow trench insulation; at least partially filling said trench with an impurity; and forming a collector sinker in the substrate by developing said impurity to extend into the substrate to a depth beyond the depth of the shallow trench insulation. An IC comprising a heterojunction bipolar transistor manufactured by this method is also disclosed.

摘要翻译： 公开了一种制造包括衬底的异质结双极晶体管的方法，所述衬底的上部区域包括由浅沟槽绝缘体界定的双极晶体管的有源区，所述有源区包括延伸到超过深度 所述浅沟槽绝缘体，所述方法包括在所述衬底中邻近所述有源区形成沟槽，所述沟槽延伸穿过所述浅沟槽绝缘体; 至少部分地用杂质填充所述沟槽; 以及通过使所述杂质显影而在衬底中形成收集器沉降片，以延伸到衬底中深度超过浅沟槽绝缘深度的深度。 还公开了一种包括通过该方法制造的异质结双极晶体管的IC。

公开(公告)号：US08803156B2

公开(公告)日：2014-08-12

申请号：US13205932

申请日：2011-08-09

申请人： Tony Vanhoucke ,  Johannes Josephus Theodorus Marinus Donkers ,  Hans Mertens ,  Blandine Duriez ,  Evelyne Marie Josephe Fabienne Gridelet

发明人： Tony Vanhoucke ,  Johannes Josephus Theodorus Marinus Donkers ,  Hans Mertens ,  Blandine Duriez ,  Evelyne Marie Josephe Fabienne Gridelet

IPC分类号： H01L29/00 ,  H01L31/036

CPC分类号： H01L29/7378 ,  H01L29/1004 ,  H01L29/66242

摘要： A method of manufacturing a heterojunction bipolar transistor, including providing a substrate comprising an active region bordered by shallow trench insulation regions; depositing a stack of a dielectric layer and a polysilicon layer over the substrate; forming a base window in the stack, the base window extending over the active region and part of the shallow trench insulation regions, the base window having a trench extending vertically between the active region and one of the shallow trench insulation regions; growing an epitaxial base material inside the base window; forming a spacer on the exposed side walls of the base material; and filling the base window with an emitter material. A HBT manufactured in this manner and an IC including such an HBT.

摘要翻译： 一种制造异质结双极晶体管的方法，包括提供包括由浅沟槽绝缘区域界定的有源区的衬底; 在衬底上沉积介电层和多晶硅层的堆叠; 在所述堆叠中形成基窗，所述基窗在所述有源区和所述浅沟槽绝缘区的一部分上延伸，所述基窗具有在所述有源区和所述浅沟绝缘区之间的垂直延伸的沟槽; 在基座窗内生长外延基体材料; 在基材的暴露的侧壁上形成间隔物; 并用发射体材料填充基座窗口。 以这种方式制造的HBT和包括这种HBT的IC。

公开(公告)号：US08319546B2

公开(公告)日：2012-11-27

申请号：US13202922

申请日：2010-01-21

申请人： Tony Vanhoucke ,  Godefridus A. M. Hurkx

发明人： Tony Vanhoucke ,  Godefridus A. M. Hurkx

IPC分类号： G05F1/10 ,  G05F3/02 ,  H03K17/04

CPC分类号： H03F1/52 ,  H03F2200/447 ,  H03F2200/462 ,  H03F2200/468 ,  H03F2200/471

摘要： A control circuit for a transistor arrangement comprises a monitoring arrangement (60) for monitoring the current flow and voltage across the transistor arrangement (50) and means (62) for determining if the current and voltage values define an operating point which falls within a stable operating region. The stable operating region comprises a region having a boundary (30) which comprises an electro-thermal instability line.

摘要翻译： 一种用于晶体管装置的控制电路包括用于监测晶体管装置（50）两端的电流和电压的监视装置（60）和用于确定电流和电压值是否限定了稳定的工作点的装置（62） 经营区域。 稳定工作区域包括具有包括电热不稳定线的边界（30）的区域。

公开(公告)号：US20120132961A1

公开(公告)日：2012-05-31

申请号：US13299755

申请日：2011-11-18

申请人： Tony Vanhoucke ,  Johannes Josephus Theodorus Marinus Donkers ,  Hans Mertens ,  Blandine Duriez ,  Evelyne Gridelet

发明人： Tony Vanhoucke ,  Johannes Josephus Theodorus Marinus Donkers ,  Hans Mertens ,  Blandine Duriez ,  Evelyne Gridelet

IPC分类号： H01L29/737 ,  H01L21/328

CPC分类号： H01L29/0821 ,  H01L29/66242 ,  H01L29/7378

摘要： Disclosed is a method of manufacturing a heterojunction bipolar transistor comprising a substrate, an upper region of said substrate comprising an active region of the bipolar transistor bordered by shallow trench insulation, said active region comprising a buried collector region extending to a depth beyond the depth of the shallow trench insulation, the method comprising forming a trench in the substrate adjacent to said active region, said trench extending through the shallow trench insulation; at least partially filling said trench with an impurity; and forming a collector sinker in the substrate by developing said impurity to extend into the substrate to a depth beyond the depth of the shallow trench insulation. An IC comprising a heterojunction bipolar transistor manufactured by this method is also disclosed.

摘要翻译： 公开了一种制造包括衬底的异质结双极晶体管的方法，所述衬底的上部区域包括由浅沟槽绝缘体界定的双极晶体管的有源区，所述有源区包括延伸到超过深度 所述浅沟槽绝缘体，所述方法包括在所述衬底中邻近所述有源区形成沟槽，所述沟槽延伸穿过所述浅沟槽绝缘体; 至少部分地用杂质填充所述沟槽; 以及通过使所述杂质显影而在衬底中形成收集器沉降片，以延伸到衬底中深度超过浅沟槽绝缘深度的深度。 还公开了一种包括通过该方法制造的异质结双极晶体管的IC。