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公开(公告)号：US08319546B2
公开(公告)日：2012-11-27
申请号：US13202922
申请日：2010-01-21
CPC分类号： H03F1/52 , H03F2200/447 , H03F2200/462 , H03F2200/468 , H03F2200/471
摘要： A control circuit for a transistor arrangement comprises a monitoring arrangement (60) for monitoring the current flow and voltage across the transistor arrangement (50) and means (62) for determining if the current and voltage values define an operating point which falls within a stable operating region. The stable operating region comprises a region having a boundary (30) which comprises an electro-thermal instability line.
摘要翻译： 一种用于晶体管装置的控制电路包括用于监测晶体管装置（50）两端的电流和电压的监视装置（60）和用于确定电流和电压值是否限定了稳定的工作点的装置（62） 经营区域。 稳定工作区域包括具有包括电热不稳定线的边界（30）的区域。
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公开(公告)号：US07839209B2
公开(公告)日：2010-11-23
申请号：US12444140
申请日：2007-10-03
申请人： Gilberto Curatola , Prabhat Agarwal , Jan W. Slotboom , Godefridus A. M. Hurkx , Radu Surdeanu , Gerben Doornbos
发明人： Gilberto Curatola , Prabhat Agarwal , Jan W. Slotboom , Godefridus A. M. Hurkx , Radu Surdeanu , Gerben Doornbos
IPC分类号： H01L25/00
CPC分类号： H01L29/161 , H01L29/165 , H01L29/7391
摘要： A tunnel transistor includes source diffusion (4) of opposite conductivity type to a drain diffusion (6) so that a depletion layer is formed between source and drain diffusions in a lower doped region (8). An insulated gate (16) controls the position and thickness of the depletion layer. The device includes a quantum well formed in accumulation layer (20) which is made of a different material to the lower layer (2) and cap layer (22).
摘要翻译： 隧道晶体管包括与漏扩散（6）相反的导电类型的源极扩散（4），使得在较低掺杂区域（8）中的源极和漏极扩散之间形成耗尽层。 绝缘栅极（16）控制耗尽层的位置和厚度。 该装置包括形成在由下层（2）和盖层（22）的不同材料制成的聚集层（20）中的量子阱。
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3.发明授权Semiconductor device with a bipolar transistor, and method of manufacturing such a device 有权具有双极晶体管的半导体器件及其制造方法公开(公告)号：US06252282B1
公开(公告)日：2001-06-26
申请号：US09247782
申请日：1999-02-09
IPC分类号： H01L2976
CPC分类号： H01L29/1004 , H01L29/7322 , Y10S257/927 , Y10S257/928
摘要： The invention relates to a semiconductor device including a preferably discrete bipolar transistor with a collector region, a base region, and an emitter region which are provided with connection conductors. A known means of preventing a saturation of the transistor is that the latter is provided with a Schottky clamping diode. The latter is formed in that case in that the connection conductor of the base region is also put into contact with the collector region. In a device according to the invention, the second connection conductor is exclusively connected to the base region, and a partial region of that portion of the base region which lies outside the emitter region, as seen in projection, lying below the second connection conductor is given a smaller flux of dopant atoms. The bipolar transistor in a device according to the invention is provided with a pn clamping diode which is formed between the partial region and the collector region. Such a device has excellent properties, such as a short switching time and a saturation collector-emitter voltage which is not too high, while having a low, non-variable and well reproducible leakage current, unlike the known device. The reduced flux of dopant atoms of the partial region is preferably realized in that the partial region is given a smaller doping concentration and/or thickness than the remainder of the portion of the base region which lies outside the emitter region. In a favorable modification, a region provided simultaneously with the emitter region is present between the partial region and the second connection conductor.
摘要翻译： 本发明涉及一种包括具有集电极区域，基极区域和发射极区域的优选分立的双极晶体管的半导体器件，其设置有连接导体。 防止晶体管饱和的已知方法是后者具有肖特基钳位二极管。 在这种情况下形成后者，因为基极区域的连接导体也与集电极区域接触。 在根据本发明的装置中，第二连接导体专门连接到基极区域，并且位于发射极区域外部的基极区域的部分区域的位于第二连接导体下方的突出部分的部分区域是 给出较小的掺杂剂原子通量。 根据本发明的器件中的双极晶体管设置有形成在部分区域和集电极区域之间的pn钳位二极管。 与已知的器件不同，这种器件具有优异的特性，例如开关时间短和饱和集电极 - 发射极电压不太高，同时具有低的，不可变的和良好重现的漏电流。 优选地实现部分区域的掺杂剂原子的减小的通量，其中所述部分区域被赋予比位于发射极区域外部的基极区域的其余部分更小的掺杂浓度和/或厚度。 在有利的变型中，与发射极区同时设置的区域存在于部分区域和第二连接导体之间。
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公开(公告)号：US5760450A
公开(公告)日：1998-06-02
申请号：US828238
申请日：1997-03-31
IPC分类号： H01L27/04 , H01L21/822 , H01L23/64 , H01L27/08 , H01L29/8605 , H01L29/866 , H01L29/78
CPC分类号： H01L29/866 , H01L27/0814 , H01L29/8605
摘要： Very high resistance values may be necessary in integrated circuits, for example in the gigaohm range, for example for realizing RC times of 1 ms to 1 s. Such resistance values cannot or substantially not be realized by known methods in standard i.c. processes because of the too large space occupation. In addition, known embodiments are usually strongly dependent on the temperature. According to the invention, therefore, two zener diodes (10, 4; 11, 4) connected back-to-back are used as the resistor. The current through each zener diode is mainly determined by band--band tunneling when the voltage is not too high, for example up to approximately 0.2 V. This current has a value such that resistors in the giga range can be readily realized on a small surface area. Since the current is mainly determined by intrinsic material properties of silicon, the temperature dependence is very small. The resistor may furthermore be manufactured in any standard CMOS process or bipolar process.
摘要翻译： 在集成电路中可能需要非常高的电阻值，例如在高戈范围内，例如用于实现1ms至1s的RC时间。 这种电阻值不能或基本上不能通过标准电流中的已知方法来实现。 因为占用空间太大。 此外，已知的实施方案通常强烈地依赖于温度。 因此，根据本发明，使用背对背连接的两个齐纳二极管（10,4; 11,4）作为电阻器。 通过每个齐纳二极管的电流主要由电压不太高（例如高达约0.2V）时的带带隧穿确定。该电流具有这样的值，使得可以在小的表面上容易地实现千兆范围内的电阻 区。 由于电流主要取决于硅的固有材料性质，因此温度依赖性非常小。 此外，电阻器可以以任何标准CMOS工艺或双极工艺制造。
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5.发明授权
公开(公告)号：US5694071A
公开(公告)日：1997-12-02
申请号：US615558
申请日：1996-03-12
CPC分类号： H01L27/0652 , H01L2924/0002
摘要： A device compensated for an undesired capacitance includes a first and a second node between which nodes the undesired capacitance is present. A diode driven in breakthrough is coupled between the first and the second node. As a diode driven in breakthrough exhibits the characteristics of a negative capacitance, a compensation of the undesired capacitance is achieved.
摘要翻译： 补偿不需要的电容的装置包括第一和第二节点，在该节点之间存在不需要的电容。 驱动穿透的二极管耦合在第一和第二节点之间。 作为突破驱动的二极管表现出负电容的特性，实现了不期望的电容的补偿。
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公开(公告)号：US20120038415A1
公开(公告)日：2012-02-16
申请号：US13202922
申请日：2010-01-21
CPC分类号： H03F1/52 , H03F2200/447 , H03F2200/462 , H03F2200/468 , H03F2200/471
摘要： A control circuit for a transistor arrangement comprises a monitoring arrangement (60) for monitoring the current flow and voltage across the transistor arrangement (50) and means (62) for determining if the current and voltage values define an operating point which falls within a stable operating region. The stable operating region comprises a region having a boundary (30) which comprises an electro-thermal instability line.
摘要翻译： 一种用于晶体管装置的控制电路包括用于监测晶体管装置（50）两端的电流和电压的监视装置（60）和用于确定电流和电压值是否限定了稳定的工作点的装置（62） 经营区域。 稳定工作区域包括具有包括电热不稳定线的边界（30）的区域。
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公开(公告)号：US06605862B2
公开(公告)日：2003-08-12
申请号：US10068921
申请日：2002-02-07
IPC分类号： H01L29414
CPC分类号： H01L29/405 , H01L29/408 , H01L29/41766 , H01L29/7802 , H01L29/7813 , H01L29/861
摘要： A semiconductor device, such as a MOSFET or PN diode rectifier, has a p-n junction (24) between a first device region (23) and an underlying voltage-sustaining zone (20). Trenched field-shaping regions (40) extend through the voltage-sustaining zone (20) to improve the voltage-blocking and on-resistance characteristics of the device. The trenched field-shaping region (40) comprises a resistive path (42) accommodated in a trench (41) that has an insulating layer (44) at its side-walls. The insulating layer (44) dielectrically couples potential from the resistive path (42) to the voltage-sustaining zone (20) that is depleted in a voltage-blocking mode of operation of the device. The insulating layer (44) extends at the side-walls of the trench (41) to an upper level (81) that is higher than a lower level (82) at which the resistive path (42) starts in the trench (41). This lower level (82) is more closely aligned to the p-n junction (24) and is protected by the insulating layer (44) extending to the higher level (81). This construction enables the electric field distribution in the voltage-sustaining zone (20) to be improved by aligning very closely the start of the potential drop along the resistive path (42) with the p-n junction depth (d).
摘要翻译： 诸如MOSFET或PN二极管整流器的半导体器件在第一器件区域（23）和下伏电压维持区（20）之间具有p-n结（24）。 倾斜的场成形区域（40）延伸通过电压维持区域（20），以改善装置的压阻和导通电阻特性。 沟槽场整形区域（40）包括容纳在其侧壁上具有绝缘层（44）的沟槽（41）中的电阻路径（42）。 绝缘层（44）将电阻从电阻路径（42）介电地耦合到耗尽该器件的电压阻断模式的电压维持区（20）。 绝缘层（44）在沟槽（41）的侧壁处延伸到高于电阻路径（42）在沟槽（41）中开始的较低电平（82）的上电平（81） 。 该较低电平（82）与p-n结（24）更紧密地对准，并被延伸到较高电平（81）的绝缘层（44）保护。 这种结构使得能够通过非常接近地沿着电阻路径（42）与p-n结深度（d）非常接近的电位降的起始来提高电压维持区（20）中的电场分布。
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8.发明授权Enhanced flux semiconductor device with mesa and method of manufacturing same 失效具有台面的增强型通量半导体器件及其制造方法公开(公告)号：US06459133B1
公开(公告)日：2002-10-01
申请号：US09545782
申请日：2000-04-07
申请人： Adam R. Brown , Godefridus A. M. Hurkx , Wiebe B. De Boer , Hendrik G. A. Huizing , Eddie Huang
发明人： Adam R. Brown , Godefridus A. M. Hurkx , Wiebe B. De Boer , Hendrik G. A. Huizing , Eddie Huang
IPC分类号： H01L2358
CPC分类号： H01L29/8618
摘要： The invention relates to a so-called punch-through diode with a mesa (12) comprising, in succession, a first (1), a second (2) and a third (3) semiconductor region (1) of, respectively, a first, a second and the first conductivity type, which punch-through diode is provided with two connection conductors (5, 6). During operation of said diode, a voltage is applied such that the second semiconductor region (2) is fully depleted. A drawback of the known punch-through diode resides in that the current flow is too large at lower voltages. In a punch-through diode according to the invention, a part (2A, 2B) of the second semiconductor region (2), which, viewed in projection, borders on the edge of the mesa (12), is provided with a larger flux of doping atoms of the second conductivity type than the remainder (2A) of the second semiconductor region (2). It has been found that the high current at a low voltage of the known diode is caused by the fact that the second semiconductor region (2) at the edge of the mesa (12) is depleted before the remainder of the second semiconductor region (2). By locally increasing the flux of doping atoms, the depletion at the edge is delayed as compared to the remainder of the second semiconductor region. Preferably, this result is obtained by locally increasing the thickness of the second semiconductor region (2). In this manner, a substantial current reduction at lower voltages is obtained in the diode in accordance with the invention.
摘要翻译： 本发明涉及一种所谓的穿通二极管，其具有台面（12），它们分别包括第一（1），第二（2）和第三（3）半导体区域（1） 第一和第二导电类型，该穿通二极管设置有两个连接导体（5,6）。 在所述二极管的操作期间，施加电压使得第二半导体区域（2）完全耗尽。 已知的穿通二极管的缺点在于电流在较低的电压下太大。 在根据本发明的穿通二极管中，第二半导体区域（2）的一部分（2A，2B）在投影面上与台面（12）的边缘相邻地设置有较大的通量 的第二导电类型的掺杂原子比第二半导体区域（2）的其余部分（2A）。 已经发现，已知二极管的低电压下的高电流是由于在第二半导体区域（2）的剩余部分之前在台面（12）的边缘处的第二半导体区域（2）被耗尽的事实引起的， ）。 通过局部增加掺杂原子的通量，与第二半导体区域的剩余部分相比，边缘处的耗尽被延迟。 优选地，通过局部增加第二半导体区域（2）的厚度来获得该结果。 以这种方式，在根据本发明的二极管中获得在较低电压下的实质电流降低。
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公开(公告)号：US07660180B2
公开(公告)日：2010-02-09
申请号：US11720320
申请日：2005-11-24
申请人： Hans M. B. Boeve , Karen Attenborough , Godefridus A. M. Hurkx , Prabhat Agarwal , Hendrik G. A. Huizing , Michael A. A. In'T Zandt , Jan W. Slotboom
发明人： Hans M. B. Boeve , Karen Attenborough , Godefridus A. M. Hurkx , Prabhat Agarwal , Hendrik G. A. Huizing , Michael A. A. In'T Zandt , Jan W. Slotboom
IPC分类号： G11C17/18
CPC分类号： G11C11/5678 , G11C13/0004 , H01L27/2409 , H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/144
摘要： A thermally programmable memory has a programmable element (20) of a thermally programmable resistance preferably of phase change material, material and a blown antifuse (80) located adjacent to the programmable material. Such a blown antifuse has a dielectric layer (100) surrounded by conductive layers (90, 110) to enable a brief high voltage to be applied across the dielectric to blow a small hole in the dielectric during manufacture to form a small conductive path which can be used as a tiny electrical heater for programming the material. Due to the current confinement by the hole, the volume of the material that must be heated in order to switch to a highly-resistive state is very small. As a result the programming power can be low.
摘要翻译： 热可编程存储器具有可编程电阻的可编程电阻（20），优选地是相变材料的材料和位于可编程材料附近的吹制反熔丝（80）。 这种吹制的反熔丝具有由导电层（90,110）包围的电介质层（100），以使得能够在制造期间在电介质两端施加短暂的高电压来吹动电介质中的小孔，以形成小导电路径， 用作编程材料的微小电加热器。 由于目前由孔的限制，为了切换到高电阻状态必须被加热的材料的体积非常小。 因此，编程功率可能很低。
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10.发明授权Semiconductor device with a bipolar transistor, and method of manufacturing such a device 有权具有双极晶体管的半导体器件及其制造方法公开(公告)号：US06930011B2
公开(公告)日：2005-08-16
申请号：US09854403
申请日：2001-05-11
IPC分类号： H01L29/73 , H01L21/331 , H01L21/8222 , H01L27/06 , H01L29/10 , H01L29/732
CPC分类号： H01L29/1004 , H01L29/7322 , Y10S257/927 , Y10S257/928
摘要： A semiconductor device includes a preferably discrete bipolar transistor with a collector region, a base region, and an emitter region which are provided with connection conductors. A known means of preventing a saturation of the transistor is that the latter is provided with a Schottky clamping diode. The latter is formed in that case in that the connection conductor of the base region is also put into contact with the collector region. Here, the second connection conductor is exclusively connected to the base region, and a partial region of that portion of the base region which lies outside the emitter region, as seen in projection, lying below the second connection conductor is given a smaller flux of dopant atoms. The bipolar transistor is provided with a pn clamping diode which is formed between the partial region and the collector region.
摘要翻译： 半导体器件包括具有集电极区域，基极区域和发射极区域的优选分立的双极晶体管，其设置有连接导体。 防止晶体管饱和的已知方法是后者具有肖特基钳位二极管。 在这种情况下形成后者，因为基极区域的连接导体也与集电极区域接触。 这里，第二连接导体专门连接到基极区域，并且位于第二连接导体下方的位于发射极区域外侧的基极区域的部分的部分区域被给予较小的掺杂剂量 原子 双极晶体管设置有形成在部分区域和集电极区域之间的pn钳位二极管。
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