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公开(公告)号:US09958744B2
公开(公告)日:2018-05-01
申请号:US15356058
申请日:2016-11-18
Inventor: Jihun Choi , Jae-Eun Pi
IPC: H01L31/00 , G02F1/1345 , H01L27/12 , H01L23/00
CPC classification number: G02F1/13458 , H01L23/498 , H01L24/05 , H01L24/06 , H01L24/14 , H01L24/16 , H01L24/17 , H01L27/124 , H01L2224/0401 , H01L2224/05025 , H01L2224/06102 , H01L2224/1403 , H01L2224/16227 , H01L2224/16237 , H01L2224/1703 , H01L2224/81447 , H05K1/113 , H05K2201/094 , H05K2201/09509 , H05K2201/09672 , H05K2201/10659 , H05K2201/10674 , H01L2924/00014
Abstract: Provided is display panel including a substrate including a pixel area and a pad area; and a first conductive line and a second conductive line stacked on the substrate, wherein the first conductive line includes a first part disposed on the pixel area and a second part disposed on the pad area and the second conductive line includes a first part disposed on the pixel area and a second part disposed on the pad area. The first part of the first conductive line and the first part of the second conductive line are parallel to each other and the second part of the first conductive line and the second part of the second conductive line are overlapped vertically.