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公开(公告)号：US08969151B2
公开(公告)日：2015-03-03
申请号：US12040761
申请日：2008-02-29
IPC分类号： H01L21/8234 , H01L21/8244 , H01L27/06 , H01L21/8238 , H01L29/78 , H01L21/00
CPC分类号： H01L27/0629 , H01L21/823807 , H01L29/7847
摘要： An integrated circuit system that includes: providing a substrate including a first region and a second region; forming a first device over the first region and a resistance device over the second region; forming a first dielectric layer and a second dielectric layer over the substrate; removing a portion of the second dielectric layer; and annealing the integrated circuit system to remove dopant from the resistance device.
摘要翻译： 一种集成电路系统，包括：提供包括第一区域和第二区域的衬底; 在第一区域上形成第一器件，在第二区域上形成电阻器件; 在所述衬底上形成第一电介质层和第二电介质层; 去除所述第二电介质层的一部分; 并退火集成电路系统以从电阻器件去除掺杂剂。
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公开(公告)号：US20090221117A1
公开(公告)日：2009-09-03
申请号：US12040761
申请日：2008-02-29
IPC分类号： H01L21/8234 , H01L21/20
CPC分类号： H01L27/0629 , H01L21/823807 , H01L29/7847
摘要： An integrated circuit system that includes: providing a substrate including a first region and a second region; forming a first device over the first region and a resistance device over the second region; forming a first dielectric layer and a second dielectric layer over the substrate; removing a portion of the second dielectric layer; and annealing the integrated circuit system to remove dopant from the resistance device.
摘要翻译： 一种集成电路系统，包括：提供包括第一区域和第二区域的衬底; 在第一区域上形成第一器件，在第二区域上形成电阻器件; 在所述衬底上形成第一电介质层和第二电介质层; 去除所述第二电介质层的一部分; 并退火集成电路系统以从电阻器件去除掺杂剂。
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3.发明授权公开(公告)号：US07795104B2
公开(公告)日：2010-09-14
申请号：US12030598
申请日：2008-02-13
IPC分类号： H01L21/20
CPC分类号： H01L29/66166 , H01L21/324 , H01L27/0802 , H01L28/20
摘要： A method for forming device structures having a variation in electrical conductivity includes forming a device structure and a radiation absorbing layer overlying the device structure. The radiation absorbing layer has a spatial variation and radiation absorbing characteristics, such that upon irradiating the device structure, the radiation absorbing layer attenuates the intensity of the radiation so that a variation in dopant activation takes place within the device structure. Accordingly, device structures are formed having a variation in electrical resistance independent of the physical size of the device structures.
摘要翻译： 用于形成具有导电性变化的器件结构的方法包括形成器件结构和覆盖器件结构的辐射吸收层。 辐射吸收层具有空间变化和辐射吸收特性，使得在照射器件结构时，辐射吸收层衰减辐射的强度，使得在器件结构内发生掺杂剂激活的变化。 因此，形成具有独立于器件结构的物理尺寸的电阻变化的器件结构。
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4.发明申请INTEGRATED CIRCUIT SYSTEM WITH VERTICAL CONTROL GATE AND METHOD OF MANUFACTURE THEREOF 审中-公开具有垂直控制门的集成电路系统及其制造方法公开(公告)号：US20100304556A1
公开(公告)日：2010-12-02
申请号：US12471803
申请日：2009-05-26
申请人： Chunshan Yin , Jae Gon Lee , Shyue Seng Tan , Elgin Kiok Boone Quek , Chung Foong Tan , Lee Wee Teo
发明人： Chunshan Yin , Jae Gon Lee , Shyue Seng Tan , Elgin Kiok Boone Quek , Chung Foong Tan , Lee Wee Teo
IPC分类号： H01L21/28
CPC分类号： H01L29/42332 , H01L29/42328 , H01L29/7881
摘要： A method of manufacture of an integrated circuit system includes: providing a mesa over a substrate; forming a trench in the substrate adjacent the mesa; forming a second gate and a charge storage material along a trench sidewall; and forming a first gate from the mesa.
摘要翻译： 一种制造集成电路系统的方法，包括：在衬底上提供台面; 在邻近台面的衬底中形成沟槽; 沿着沟槽侧壁形成第二栅极和电荷存储材料; 并从台面形成第一个门。
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5.发明申请METHOD FOR FABRICATING DEVICE STRUCTURES HAVING A VARIATION IN ELECTRICAL CONDUCTIVITY 有权用于制造具有电导率变化的器件结构的方法公开(公告)号：US20090203185A1
公开(公告)日：2009-08-13
申请号：US12030598
申请日：2008-02-13
CPC分类号： H01L29/66166 , H01L21/324 , H01L27/0802 , H01L28/20
摘要： A method for forming device structures having a variation in electrical conductivity includes forming a device structure and a radiation absorbing layer overlying the device structure. The radiation absorbing layer has a spatial variation and radiation absorbing characteristics, such that upon irradiating the device structure, the radiation absorbing layer attenuates the intensity of the radiation so that a variation in dopant activation takes place within the device structure. Accordingly, device structures are formed having a variation in electrical resistance independent of the physical size of the device structures.
摘要翻译： 用于形成具有导电性变化的器件结构的方法包括形成器件结构和覆盖器件结构的辐射吸收层。 辐射吸收层具有空间变化和辐射吸收特性，使得在照射器件结构时，辐射吸收层衰减辐射的强度，使得在器件结构内发生掺杂剂激活的变化。 因此，形成具有独立于器件结构的物理尺寸的电阻变化的器件结构。
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公开(公告)号：US07816274B2
公开(公告)日：2010-10-19
申请号：US12057072
申请日：2008-03-27
IPC分类号： H01L21/302
CPC分类号： H01L21/823807 , H01L21/823814 , H01L21/823864 , H01L29/7848
摘要： The electrical performance enhancing effects of inducing strain in semiconductor devices is made substantially uniform across a substrate having a varying population density of device components by selectively spacing apart the strain-inducing structures from the effected regions of the semiconductor devices depending upon the population density of device components. Differing separation distances are obtained by selectively forming sidewall spacers on device components, such as MOS transistor gate electrodes, in which the sidewall spacers have a relatively small width in regions having a relatively high density of device components, and a relatively larger width in regions having a relatively low density of device components. By varying the separation distance of strain-inducing structures from the effected components, uniform electrical performance is obtained in the various components of the devices in an integrated circuit regardless of the component population density.
摘要翻译： 通过根据器件的种群密度选择性地将应变诱导结构与半导体器件的受影响区域分离开，使得在半导体器件中诱导应变的电性能增强效应通过具有变化的器件部件的种群密度的衬底基本上均匀 组件。 通过在诸如MOS晶体管栅电极的器件部件上选择性地形成侧壁间隔而获得不同的间隔距离，其中侧壁间隔物在具有相对较高密度的器件部件的区域中具有相对较小的宽度，并且具有 相对低密度的器件组件。 通过改变应变诱导结构与受影响部件的分离距离，在集成电路中的器件的各种部件中获得均匀的电性能，而不管部件群体密度如何。
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7.发明授权Process for fabricating a semiconductor device having embedded epitaxial regions 有权具有嵌入式外延区域的半导体器件的制造方法公开(公告)号：US07994010B2
公开(公告)日：2011-08-09
申请号：US11965415
申请日：2007-12-27
IPC分类号： H01L21/336
CPC分类号： H01L29/78 , H01L21/26586 , H01L29/6653 , H01L29/66636
摘要： A process for fabricating a semiconductor device, such as a strained-channel transistor, includes forming epitaxial regions in a substrate in proximity to a gate electrode in which the surface profile of the epitaxial regions is defined by masking sidewall spacers adjacent the gate electrode. The epitaxial regions are formed by depositing an epitaxial material into cavities selectively etched into the semiconductor substrate on either side of the gate electrode. The masking sidewall spacers limit the thickness of the epitaxial deposited material in proximity of the gate electrode, such that the upper surface of the epitaxial material is substantially the same as the principal surface of the semiconductor substrate. Doped regions are formed in the channel region beneath the gate electrode using an angled ion beam, such that doping profiles of the implanted regions are substantially unaffected by surface irregularities in the epitaxially-deposited material.
摘要翻译： 用于制造诸如应变通道晶体管的半导体器件的工艺包括在靠近栅电极的衬底中形成外延区域，其中通过掩蔽邻近栅电极的侧壁间隔来限定外延区域的表面轮廓。 通过将外延材料沉积到选择性地蚀刻到栅电极的任一侧上的半导体衬底中的空腔中形成外延区域。 掩蔽侧壁间隔物限制了栅极附近的外延沉积材料的厚度，使得外延材料的上表面与半导体衬底的主表面基本上相同。 使用成角度的离子束在栅电极下方的沟道区域中形成掺杂区域，使得注入区域的掺杂分布基本上不受外延沉积材料中的表面不规则性的影响。
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公开(公告)号：US07833888B2
公开(公告)日：2010-11-16
申请号：US12116156
申请日：2008-05-06
IPC分类号： H01L21/425
CPC分类号： H01L21/823807 , H01L21/26506 , H01L21/28035 , H01L21/823864 , H01L29/4925 , H01L29/7833 , H01L29/7843 , H01L29/7845
摘要： An integrated circuit system that includes: providing a substrate including an active device with a gate top surface exposed; implanting a do pant within the gate to alter the grain size of the gate material; forming a dielectric layer over the active device and the substrate; and annealing the integrated circuit system to transfer the stress of the dielectric layer into the active device.
摘要翻译： 一种集成电路系统，包括：提供包括具有暴露的栅极顶表面的有源器件的衬底; 在门内植入一条裤子来改变栅极材料的晶粒尺寸; 在所述有源器件和所述衬底上形成介电层; 并对集成电路系统退火以将介电层的应力转移到有源器件中。
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公开(公告)号：US20090280629A1
公开(公告)日：2009-11-12
申请号：US12116156
申请日：2008-05-06
IPC分类号： H01L21/425
CPC分类号： H01L21/823807 , H01L21/26506 , H01L21/28035 , H01L21/823864 , H01L29/4925 , H01L29/7833 , H01L29/7843 , H01L29/7845
摘要： An integrated circuit system that includes: providing a substrate including an active device with a gate top surface exposed; implanting a dopant within the gate to alter the grain size of the gate material; forming a dielectric layer over the active device and the substrate; and annealing the integrated circuit system to transfer the stress of the dielectric layer into the active device.
摘要翻译： 一种集成电路系统，包括：提供包括具有暴露的栅极顶表面的有源器件的衬底; 在栅极内注入掺杂剂以改变栅极材料的晶粒尺寸; 在所述有源器件和所述衬底上形成介电层; 并对集成电路系统退火以将介电层的应力转移到有源器件中。
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公开(公告)号：US20090246920A1
公开(公告)日：2009-10-01
申请号：US12057072
申请日：2008-03-27
IPC分类号： H01L21/8232
CPC分类号： H01L21/823807 , H01L21/823814 , H01L21/823864 , H01L29/7848
摘要： The electrical performance enhancing effects of inducing strain in semiconductor devices is made substantially uniform across a substrate having a varying population density of device components by selectively spacing apart the strain-inducing structures from the effected regions of the semiconductor devices depending upon the population density of device components. Differing separation distances are obtained by selectively forming sidewall spacers on device components, such as MOS transistor gate electrodes, in which the sidewall spacers have a relatively small width in regions having a relatively high density of device components, and a relatively larger width in regions having a relatively low density of device components. By varying the separation distance of strain-inducing structures from the effected components, uniform electrical performance is obtained in the various components of the devices in an integrated circuit regardless of the component population density.
摘要翻译： 通过根据器件的种群密度选择性地将应变诱导结构与半导体器件的受影响区域分离开，使得在半导体器件中诱导应变的电性能增强效应通过具有变化的器件部件的种群密度的衬底基本上均匀 组件。 通过在诸如MOS晶体管栅电极的器件部件上选择性地形成侧壁间隔而获得不同的间隔距离，其中侧壁间隔物在具有相对较高密度的器件部件的区域中具有相对较小的宽度，并且具有 相对低密度的器件组件。 通过改变应变诱导结构与受影响部件的分离距离，在集成电路中的器件的各种部件中获得均匀的电性能，而不管部件群体密度如何。
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