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1.发明申请Semiconductor Structures Employing Strained Material Layers with Defined Impurity Gradients and Methods for Fabricating Same 有权采用具有定义杂质梯度的应变材料层的半导体结构及其制造方法公开(公告)号：US20110095363A1
公开(公告)日：2011-04-28
申请号：US12982101
申请日：2010-12-30
IPC分类号： H01L29/78
CPC分类号： H01L29/1054 , H01L29/105 , H01L29/161 , H01L29/36 , H01L29/66477 , H01L29/66545 , H01L29/66651 , H01L29/78 , H01L29/7842 , Y10S438/926
摘要： Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.
摘要翻译： 包括具有无杂质区域的应变材料层的半导体结构和器件及其制造方法。 应变材料层的某些区域保持没有可以从半导体的相邻部分相互扩散的杂质。 当杂质存在于应变材料层的某些区域中时，器件性能下降。 通过采用具有所描述或者根据所描述的步骤制造的特征的半导体结构和器件（例如，场效应晶体管或“FET”），器件操作被增强。
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2.发明申请Methods for forming strained-semiconductor-on-insulator device structures by use of cleave planes 有权通过使用分裂面形成绝缘体上半导体器件结构的方法公开(公告)号：US20050212061A1
公开(公告)日：2005-09-29
申请号：US11127508
申请日：2005-05-12
IPC分类号： H01L21/20 , H01L21/331 , H01L21/336 , H01L21/337 , H01L21/762 , H01L21/84 , H01L27/12 , H01L29/786 , H01L29/76
CPC分类号： H01L29/7847 , H01L21/28518 , H01L21/76254 , H01L21/76256 , H01L21/76259 , H01L21/76264 , H01L21/76275 , H01L21/84 , H01L27/1203 , H01L29/0649 , H01L29/1033 , H01L29/165 , H01L29/41783 , H01L29/66242 , H01L29/66628 , H01L29/66772 , H01L29/66787 , H01L29/66916 , H01L29/7842 , H01L29/7843 , H01L29/7849 , H01L29/785 , H01L29/78603 , H01L29/78684 , H01L29/78687
摘要： The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
摘要翻译： 应变半导体的优点与基板和器件制造上的绝缘体绝缘体方法相结合。
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3.发明申请Gate technology for strained surface channel and strained buried channel MOSFET devices 有权用于应变表面通道和应变埋入通道MOSFET器件的栅极技术公开(公告)号：US20050202640A1
公开(公告)日：2005-09-15
申请号：US11013838
申请日：2004-12-16
IPC分类号： H01L21/20 , H01L21/28 , H01L21/336 , H01L29/10 , H01L29/78
CPC分类号： H01L29/66477 , H01L21/02381 , H01L21/0245 , H01L21/02502 , H01L21/02505 , H01L21/0251 , H01L21/02532 , H01L21/02664 , H01L21/28194 , H01L21/28211 , H01L21/28238 , H01L29/1054 , H01L29/78 , H01L29/7838 , H01L2924/0002 , H01L2924/00
摘要： A method of fabricating a semiconductor device including providing a semiconductor heterostructure, the heterostructure having a relaxed Si1-xGex layer on a substrate, a strained channel layer on the relaxed Si1-xGex layer, and a Si1-yGey layer; removing the Si1-yGey layer; and providing a dielectric layer. The dielectric layer includes a gate dielectric of a MISFET. In alternative embodiments, the heterostructure includes a SiGe spacer layer and a Si layer.
摘要翻译： 一种制造半导体器件的方法，包括提供半导体异质结构，所述异质结构在衬底上具有松弛的Si 1-x Ge 2 x层，在弛豫时产生应变沟道层 Si 1-x Ge Ge层，以及Si 1-y Ge Ge层; 除去Si 1-y Y y Y y层; 并提供介电层。 电介质层包括MISFET的栅极电介质。 在替代实施例中，异质结构包括SiGe间隔层和Si层。
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4.发明申请SEMICONDUCTOR STRUCTURES EMPLOYING STRAINED MATERIAL LAYERS WITH DEFINED IMPURITY GRADIENTS AND METHODS FOR FABRICATING SAME 有权使用定义的污染物等级的应变材料层的半导体结构及其制造方法公开(公告)号：US20070293009A1
公开(公告)日：2007-12-20
申请号：US11848642
申请日：2007-08-31
IPC分类号： H01L21/336
CPC分类号： H01L29/1054 , H01L29/105 , H01L29/161 , H01L29/36 , H01L29/66477 , H01L29/66545 , H01L29/66651 , H01L29/78 , H01L29/7842 , Y10S438/926
摘要： Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.
摘要翻译： 包括具有无杂质区域的应变材料层的半导体结构和器件及其制造方法。 应变材料层的某些区域保持没有可以从半导体的相邻部分相互扩散的杂质。 当杂质存在于应变材料层的某些区域中时，器件性能下降。 通过采用具有所描述或者根据所描述的步骤制造的特征的半导体结构和器件（例如，场效应晶体管或“FET”），器件操作被增强。
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5.发明申请Methods for forming double gate strained-semiconductor-on-insulator device structures 审中-公开用于形成双栅应变半导体绝缘体上器件结构的方法公开(公告)号：US20060197125A1
公开(公告)日：2006-09-07
申请号：US11415784
申请日：2006-05-02
申请人： Thomas Langdo , Matthew Currie , Glyn Braithwaite , Richard Hammond , Anthony Lochtefeld , Eugene Fitzgerald
发明人： Thomas Langdo , Matthew Currie , Glyn Braithwaite , Richard Hammond , Anthony Lochtefeld , Eugene Fitzgerald
IPC分类号： H01L21/8234 , H01L29/76 , H01L31/00
CPC分类号： H01L29/785 , H01L21/76254 , H01L21/76259 , H01L21/76264 , H01L21/76275 , H01L21/84 , H01L27/1203 , H01L29/66772 , H01L29/66795 , H01L29/66916 , H01L29/7842 , H01L29/78603 , H01L29/78684 , H01L29/78687
摘要： The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
摘要翻译： 应变半导体的优点与基板和器件制造上的绝缘体绝缘体方法相结合。
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6.发明授权Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same 有权使用具有限定杂质梯度的应变材料层的半导体结构及其制造方法公开(公告)号：US07884353B2
公开(公告)日：2011-02-08
申请号：US10972578
申请日：2004-10-25
IPC分类号： H01L29/06
CPC分类号： H01L29/1054 , H01L29/105 , H01L29/161 , H01L29/36 , H01L29/66477 , H01L29/66545 , H01L29/66651 , H01L29/78 , H01L29/7842 , Y10S438/926
摘要： Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.
摘要翻译： 包括具有无杂质区域的应变材料层的半导体结构和器件及其制造方法。 应变材料层的某些区域保持没有可以从半导体的相邻部分相互扩散的杂质。 当杂质存在于应变材料层的某些区域中时，器件性能下降。 通过采用具有所描述或者根据所描述的步骤制造的特征的半导体结构和器件（例如，场效应晶体管或“FET”），器件操作被增强。
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公开(公告)号：US20060197124A1
公开(公告)日：2006-09-07
申请号：US11415706
申请日：2006-05-01
申请人： Anthony Lochtefeld , Thomas Langdo , Richard Hammond , Matthew Currie , Glyn Braithwaite , Eugene Fitzgerald
发明人： Anthony Lochtefeld , Thomas Langdo , Richard Hammond , Matthew Currie , Glyn Braithwaite , Eugene Fitzgerald
IPC分类号： H01L21/8234 , H01L29/76 , H01L31/00
CPC分类号： H01L29/785 , H01L21/76254 , H01L21/76259 , H01L21/76264 , H01L21/76275 , H01L21/84 , H01L27/1203 , H01L29/66772 , H01L29/66795 , H01L29/66916 , H01L29/7842 , H01L29/78603 , H01L29/78684 , H01L29/78687
摘要： The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
摘要翻译： 应变半导体的优点与基板和器件制造上的绝缘体绝缘体方法相结合。
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公开(公告)号：US20050280103A1
公开(公告)日：2005-12-22
申请号：US11211933
申请日：2005-08-25
申请人： Thomas Langdo , Matthew Currie , Glyn Braithwaite , Richard Hammond , Anthony Lochtefeld , Eugene Fitzgerald
发明人： Thomas Langdo , Matthew Currie , Glyn Braithwaite , Richard Hammond , Anthony Lochtefeld , Eugene Fitzgerald
IPC分类号： H01L21/336 , H01L21/337 , H01L21/762 , H01L21/84 , H01L27/12 , H01L29/786 , H01L29/76
CPC分类号： H01L29/785 , H01L21/76254 , H01L21/76259 , H01L21/76264 , H01L21/76275 , H01L21/84 , H01L27/1203 , H01L29/66772 , H01L29/66795 , H01L29/66916 , H01L29/7842 , H01L29/78603 , H01L29/78684 , H01L29/78687
摘要： The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
摘要翻译： 应变半导体的优点与基板和器件制造上的绝缘体绝缘体方法相结合。
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9.发明申请Methods for forming strained-semiconductor-on-insulator device structures by mechanically inducing strain 有权通过机械诱导应变形成绝缘体上半导体器件结构的方法公开(公告)号：US20050199954A1
公开(公告)日：2005-09-15
申请号：US11128628
申请日：2005-05-13
IPC分类号： H01L21/20 , H01L21/331 , H01L21/336 , H01L21/337 , H01L21/762 , H01L21/84 , H01L27/12 , H01L29/786 , H01L27/01 , H01L21/425
CPC分类号： H01L29/7847 , H01L21/28518 , H01L21/76254 , H01L21/76256 , H01L21/76259 , H01L21/76264 , H01L21/76275 , H01L21/84 , H01L27/1203 , H01L29/0649 , H01L29/1033 , H01L29/165 , H01L29/41783 , H01L29/66242 , H01L29/66628 , H01L29/66772 , H01L29/66787 , H01L29/66916 , H01L29/7842 , H01L29/7843 , H01L29/7849 , H01L29/785 , H01L29/78603 , H01L29/78684 , H01L29/78687
摘要： The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
摘要翻译： 应变半导体的优点与基板和器件制造上的绝缘体绝缘体方法相结合。
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10.发明申请Semiconductor Structures Employing Strained Material Layers with Defined Impurity Gradients and Methods for Fabricating Same 有权采用具有定义杂质梯度的应变材料层的半导体结构及其制造方法公开(公告)号：US20120086047A1
公开(公告)日：2012-04-12
申请号：US13327194
申请日：2011-12-15
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/1054 , H01L29/105 , H01L29/161 , H01L29/36 , H01L29/66477 , H01L29/66545 , H01L29/66651 , H01L29/78 , H01L29/7842 , Y10S438/926
摘要： Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.
摘要翻译： 包括具有无杂质区域的应变材料层的半导体结构和器件及其制造方法。 应变材料层的某些区域保持没有可以从半导体的相邻部分相互扩散的杂质。 当杂质存在于应变材料层的某些区域中时，器件性能下降。 通过采用具有所描述或者根据所描述的步骤制造的特征的半导体结构和器件（例如，场效应晶体管或“FET”），器件操作被增强。
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