公开(公告)号：US20160292093A1

公开(公告)日：2016-10-06

申请号：US15084560

申请日：2016-03-30

申请人： FANUC Corporation

发明人： Takaaki KOMATSU ,  Masahiro TSUJI

IPC分类号： G06F13/16 ,  G06F13/42

CPC分类号： G06F13/1652 ,  G06F13/1673 ,  G06F13/1678 ,  G06F13/4282

摘要： A bus system is configured by connecting an unretriable interlock bus and a split bus through first and second bridge circuits and respectively connecting first and second channels of the split bus and the interlock bus through the first and second bridge circuits. An access from the split bus side to the interlock bus side is processed by the first bridge circuit and an access from the interlock bus side to the split bus side is processed by the second bridge circuit, whereby a deadlock during a bus conflict is avoided.

摘要翻译： 总线系统通过第一和第二桥接电路连接不可配置的互锁总线和分离总线，并通过第一和第二桥接电路分别连接分接总线和互锁总线的第一和第二通道。 从第一桥接电路处理从分路总线侧到互锁总线侧的通路，由第二桥接电路处理从互锁总线侧到分路总线一侧的接入，从而避免总线冲突期间的死锁。

公开(公告)号：US20170146973A1

公开(公告)日：2017-05-25

申请号：US15355255

申请日：2016-11-18

申请人： FANUC CORPORATION

发明人： Kouji HADA ,  Yoshito MIYAZAKI ,  Takaaki KOMATSU ,  Yasumichi SAKODA

IPC分类号： G05B19/19

CPC分类号： G05B19/19 ,  G05B19/4147 ,  G05B2219/50047

摘要： A numerical control device includes a CPU for outputting a position command value of a servomotor; an IC including a servo controller for outputting a current command value to an amplifier for driving the servomotor, and an I/O unit for inputting and outputting an external signal; a DSP for reading the position command value and performing control so as to move the servomotor to a position indicated by the position command value; and an inter-device communication path between the CPU and the IC. The IC includes an internal bus connected to a communication interface connected to the inter-device communication path, and the I/O unit; and an internal communication path for directly transmitting a signal between the servo controller and the I/O unit without passing through the internal bus.

公开(公告)号：US20200280305A1

公开(公告)日：2020-09-03

申请号：US16784968

申请日：2020-02-07

申请人： FANUC CORPORATION

发明人： Takaaki KOMATSU

IPC分类号： H03K5/1252 ,  H03K5/135 ,  H03K19/003

摘要： A glitch removal circuit removes glitch noise contained in a Power-good signal and a Power-on Reset signal, and includes: a first glitch removal unit that operates according to a first clock signal, and removes glitch noise from a Power-good signal; and a second glitch removal unit that operates according to a second clock signal, and removes glitch noise from a Power-on Reset signal, in which the first glitch removal unit is configured so as to be initialized according to an output signal of the second glitch removal unit, and the second glitch removal unit is configured so as to be initialized according to an output signal of the first glitch removal unit.

公开(公告)号：US20160349307A1

公开(公告)日：2016-12-01

申请号：US15166216

申请日：2016-05-26

申请人： FANUC Corporation

发明人： Takaaki KOMATSU ,  Yasumichi SAKODA

IPC分类号： G01R31/04 ,  H03K19/20 ,  H05K1/18 ,  H03K3/037

CPC分类号： H03K19/20 ,  G01R31/2812 ,  H01L22/32 ,  H01L22/34 ,  H01L2224/131 ,  H01L2224/16227 ,  H05K3/3436 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2203/162 ,  H01L2924/014

摘要： An electronic component having a plurality of terminals arranged on a bottom side of a package and mounted on a printed wiring board includes at least one detection terminal as a portion of the plurality of terminals, the detection terminal being connected to a ground outside the electronic component, wherein the detection terminal is connected to an input port of an input buffer and one end of a resistor inside the electronic component, the other end of the resistor is connected to a power supply, and the input buffer detects a poor connection of a solder joint or a socket by outputting a first binary signal obtained by binarizing a voltage level input into the input buffer using a predetermined threshold.

摘要翻译： 具有布置在封装的底侧并安装在印刷布线板上的多个端子的电子部件包括至少一个检测端子作为多个端子的一部分，检测端子连接到电子部件外部的接地 其特征在于，所述检测端子与所述电子部件的输入缓冲器的输入端口和所述电阻器的一端连接，所述电阻器的另一端与电源连接，所述输入缓冲器检测焊料的连接不良 通过输出通过使用预定阈值将输入到输入缓冲器的电压电平二值化而获得的第一二进制信号来连接或插座。

公开(公告)号：US20180275924A1

公开(公告)日：2018-09-27

申请号：US15928394

申请日：2018-03-22

申请人： FANUC CORPORATION

发明人： Takaaki KOMATSU

IPC分类号： G06F3/06 ,  G06F11/10 ,  G11C29/52

摘要： To provide a multi-rank SDRAM control method and an SDRAM controller that prevent performance degradation and minimize increase in parts count even in a multi-rank SDRAM configuration. A multi-rank SDRAM control method controls a multi-rank SDRAM formed by connecting data buses of multiple SDRAM devices. In each of the multiple SDRAM devices, only a data mask signal for a rank of the SDRAM device, which is to be accessed, is negated, whereby an access to the rank is executed.

公开(公告)号：US20180032404A1

公开(公告)日：2018-02-01

申请号：US15660138

申请日：2017-07-26

申请人： FANUC CORPORATION

发明人： Takaaki KOMATSU

IPC分类号： G06F11/14

CPC分类号： G06F11/1448 ,  G06F11/1456 ,  G06F11/1458 ,  G06F11/1469 ,  G06F2201/875

摘要： To allow restoration of a backup target device more properly. An automatic backup device comprises: a history information acquisition unit that acquires history information containing a time of a change in setting on a backup target device and a content of the change associated with each other; a restoration request acquisition unit that acquires a restoration request containing a time intended for restoration of the backup target device; a restoration information generation unit that generates restoration information for restoring the backup target device based on the time contained in the restoration request by using the history information acquired by the history information acquisition unit; and a restoration information transmission unit that transmits the restoration information generated by the restoration information generation unit to the backup target device.

公开(公告)号：US20170146966A1

公开(公告)日：2017-05-25

申请号：US15353911

申请日：2016-11-17

申请人： FANUC CORPORATION

发明人： Kouji HADA ,  Yoshito MIYAZAKI ,  Takaaki KOMATSU ,  Akira KOIZUMI

IPC分类号： G05B19/042

CPC分类号： G05B19/0421 ,  G05B19/4148 ,  G05B2219/34008 ,  G05B2219/34013 ,  G05B2219/34019 ,  G05B2219/34047

摘要： A numerical control device includes a multicore CPU for outputting a position command value of a servomotor, an ASIC including a servo controller, which outputs a current command value to an amplifier for driving the servomotor, and another processor, and a DSP for reading the position command value and controlling the servomotor such that the servomotor moves to a position indicated by the position command value. The CPU and the ASIC are connected through a plurality of serial interfaces.

公开(公告)号：US20200244255A1

公开(公告)日：2020-07-30

申请号：US16740310

申请日：2020-01-10

申请人： FANUC CORPORATION

发明人： Takaaki KOMATSU

IPC分类号： H03K5/1252 ,  H03K21/08

摘要： An electronic device according to the present disclosure is an electronic device having a function of removing glitches contained in a signal, and includes a glitch removal circuit which removes glitches from an inputted signal, and a count unit which counts a number of times removing glitches.

公开(公告)号：US20160246659A1

公开(公告)日：2016-08-25

申请号：US15019051

申请日：2016-02-09

申请人： FANUC Corporation

发明人： Takaaki KOMATSU ,  Yasumichi SAKODA

IPC分类号： G06F11/07

CPC分类号： G06F11/0751 ,  G06F11/008 ,  G06F11/0748 ,  G06F11/3452

摘要： From an error information containing a content of a correctable error that has occurred in a controller of a failure prediction system and an ID of the controller and manufacturing information of a machine to which the controller is attached, a failure of a controller belonging to a group of controllers in which such an error as indicated in the error information has not occurred yet is predicted.

摘要翻译： 从包含故障预测系统的控制器中发生的可校正错误的内容的错误信息和控制器的ID以及控制器附接的机器的制造信息，属于组的控制器的故障 预测出错误信息中未显示出错误的控制器。