High voltage drive circuit employing capacitive signal coupling and associated devices and methods
    1.
    发明授权
    High voltage drive circuit employing capacitive signal coupling and associated devices and methods 有权
    采用电容式信号耦合的高压驱动电路及相关器件及方法

    公开(公告)号:US07741896B2

    公开(公告)日:2010-06-22

    申请号:US12163275

    申请日:2008-06-27

    IPC分类号: H03K17/687

    摘要: According to one embodiment, there is provided a high voltage drive circuit comprising drive and sense electrodes formed substantially in a single plane. The device effects signal transfer between drive and receive circuits through the drive and sense electrodes by capacitive means, and permits high voltage devices, such as IGBTs, to be driven thereby without the use of high voltage transistors, thereby eliminating the need to use expensive fabrication processes such as SOI when manufacturing high voltage gate drive circuits and ICs. The device may be formed in a small package using, by way of example, using CMOS or other conventional low-cost semiconductor fabrication and packaging processes.

    摘要翻译: 根据一个实施例,提供了一种高压驱动电路,其包括基本上在单个平面中形成的驱动和感测电极。 该器件通过电容方式通过驱动和感测电极来影响驱动和接收电路之间的信号传输,并且允许诸如IGBT之类的高电压器件由此驱动,而不需要使用高压晶体管,从而无需使用昂贵的制造 制造高压栅极驱动电路和IC时的SOI等工艺。 例如,可以使用CMOS或其它常规的低成本半导体制造和封装工艺,将器件形成为小封装。

    High Voltage Drive Circuit Employing Capacitive Signal Coupling and Associated Devices and Methods
    2.
    发明申请
    High Voltage Drive Circuit Employing Capacitive Signal Coupling and Associated Devices and Methods 有权
    采用电容信号耦合的高压驱动电路及相关器件及方法

    公开(公告)号:US20090206817A1

    公开(公告)日:2009-08-20

    申请号:US12163275

    申请日:2008-06-27

    IPC分类号: G05F5/04

    摘要: According to one embodiment, there is provided a high voltage drive circuit comprising drive and sense electrodes formed substantially in a single plane. The device effects signal transfer between drive and receive circuits through the drive and sense electrodes by capacitive means, and permits high voltage devices, such as IGBTs, to be driven thereby without the use of high voltage transistors, thereby eliminating the need to use expensive fabrication processes such as SOI when manufacturing high voltage gate drive circuits and ICs. The device may be formed in a small package using, by way of example, using CMOS or other conventional low-cost semiconductor fabrication and packaging processes.

    摘要翻译: 根据一个实施例,提供了一种高压驱动电路,其包括基本上在单个平面中形成的驱动电极和感测电极。 该器件通过电容方式通过驱动和感测电极来影响驱动和接收电路之间的信号传输,并且允许诸如IGBT之类的高电压器件由此驱动,而不需要使用高压晶体管,从而无需使用昂贵的制造 制造高压栅极驱动电路和IC时的SOI等工艺。 例如,可以使用CMOS或其它常规的低成本半导体制造和封装工艺,将器件形成为小封装。

    Wake-Up Circuits, Devices and Methods for Galvanic Isolators
    3.
    发明申请
    Wake-Up Circuits, Devices and Methods for Galvanic Isolators 有权
    唤醒电路,电阻隔离器的装置和方法

    公开(公告)号:US20100329363A1

    公开(公告)日:2010-12-30

    申请号:US12491354

    申请日:2009-06-25

    IPC分类号: H04B3/00

    CPC分类号: H04B3/00 H04L12/12 Y02D50/40

    摘要: According to one embodiment, there is provided a method of reducing the amount of power consumed by a galvanic isolator. A transmitter transmits a wake-up signal to a receiver located across an isolation medium when the transmitter is ready or preparing to transmit data or power signals to a receiver, which is operably connected to a sensing circuit. The sensing circuit receives the wake-up signal through the isolation medium, which may be operably connected to and powered substantially continuously or intermittently by a first power source. In response to the sensing circuit receiving the wake-up signal, the receiver is powered up from a sleep mode to an operating mode. After a period of time tRDY has passed since the wake-up signal was transmitted, a signature pattern is transmitted from the transmitter to the sensing circuit through the isolation medium. Next, the sensing circuit or the receiver verifies the validity of the signature pattern. If the signature pattern is determined at to be valid, the receiver is enabled to receive the data or power signals from the transmitter. The transmitter then transmits the data or power signals from the transmitter through the isolation medium to the receiver.

    摘要翻译: 根据一个实施例,提供了一种减少电流隔离器消耗的功率量的方法。 当发射机准备就绪或准备将数据或功率信号发射到可操作地连接到感测电路的接收机时,发射机将唤醒信号发射到位于隔离介质两端的接收器。 感测电路通过隔离介质接收唤醒信号,该隔离介质可以由第一电源可操作地连接到基本连续或间歇地供电。 响应于感测电路接收到唤醒信号,接收机从睡眠模式上电到操作模式。 在发送唤醒信号后经过一段时间tRDY后,通过隔离介质从发射机向感测电路发送签名模式。 接下来,感测电路或接收器验证签名图案的有效性。 如果签名模式被确定为有效,则接收器被允许从发射机接收数据或功率信号。 然后,发射机通过隔离介质将数据或功率信号从发射机发射到接收机。

    Wake-up circuits, devices and methods for galvanic isolators
    5.
    发明授权
    Wake-up circuits, devices and methods for galvanic isolators 有权
    唤醒电路,电隔离器的装置和方法

    公开(公告)号:US08629714B2

    公开(公告)日:2014-01-14

    申请号:US12491354

    申请日:2009-06-25

    IPC分类号: G05F1/10

    CPC分类号: H04B3/00 H04L12/12 Y02D50/40

    摘要: According to one embodiment, there is provided a method of reducing the amount of power consumed by a galvanic isolator. A transmitter transmits a wake-up signal to a receiver located across an isolation medium when the transmitter is ready or preparing to transmit data or power signals to a receiver, which is operably connected to a sensing circuit. The sensing circuit receives the wake-up signal through the isolation medium, which may be operably connected to and powered substantially continuously or intermittently by a first power source. In response to the sensing circuit receiving the wake-up signal, the receiver is powered up from a sleep mode to an operating mode. After a period of time tRDY has passed since the wake-up signal was transmitted, a signature pattern is transmitted from the transmitter to the sensing circuit through the isolation medium. Next, the sensing circuit or the receiver verifies the validity of the signature pattern. If the signature pattern is determined at to be valid, the receiver is enabled to receive the data or power signals from the transmitter. The transmitter then transmits the data or power signals from the transmitter through the isolation medium to the receiver.

    摘要翻译: 根据一个实施例,提供了一种减少电流隔离器消耗的功率量的方法。 当发射机准备就绪或准备将数据或功率信号发射到可操作地连接到感测电路的接收机时,发射机将唤醒信号发射到位于隔离介质两端的接收器。 感测电路通过隔离介质接收唤醒信号,该隔离介质可以由第一电源可操作地连接到基本连续或间歇地供电。 响应于感测电路接收到唤醒信号,接收机从睡眠模式上电到操作模式。 在发送唤醒信号后经过一段时间tRDY后,通过隔离介质从发射机向感测电路发送签名模式。 接下来,感测电路或接收器验证签名图案的有效性。 如果签名模式被确定为有效,则接收器被允许从发射机接收数据或功率信号。 然后,发射机通过隔离介质将数据或功率信号从发射机发射到接收机。

    High Voltage Isolation Semiconductor Capacitor Digital Communication Device and Corresponding Package
    6.
    发明申请
    High Voltage Isolation Semiconductor Capacitor Digital Communication Device and Corresponding Package 有权
    高压隔离半导体电容数字通信设备及相应封装

    公开(公告)号:US20090206958A1

    公开(公告)日:2009-08-20

    申请号:US12032165

    申请日:2008-02-15

    IPC分类号: H01P1/00 H05K3/00

    摘要: According to one embodiment, there is provided a semiconductor digital communication device comprising communication drive and sense electrodes formed in a single plane, where the electrodes have relatively high sidewalls. The relatively high sidewalls permit low electrical field densities to be obtained in the sense and drive electrodes during operation, and further permit very high breakdown voltages to be obtained between the electrodes, and between the drive electrode and an underlying ground plane substrate. The device effects communications between drive and receive circuits through the drive and sense electrodes by capacitive means, and in a preferred embodiment is capable of effecting relatively high-speed digital communications. The device may be formed in a small package using, by way of example, CMOS or other semiconductor fabrication and packaging processes.

    摘要翻译: 根据一个实施例,提供了一种半导体数字通信设备,其包括形成在单个平面中的通信驱动和感测电极,其中电极具有相对较高的侧壁。 相对较高的侧壁允许在操作期间在感测和驱动电极中获得低电场密度,并且还允许在电极之间以及在驱动电极和下面的接地平面衬底之间获得非常高的击穿电压。 该装置通过驱动器和电容器件感测电极来实现驱动和接收电路之间的通信,并且在优选实施例中能够实现相对高速的数字通信。 可以使用例如CMOS或其他半导体制造和封装工艺,将器件形成为小封装。

    High voltage isolation semiconductor capacitor digital communication device and corresponding package
    8.
    发明授权
    High voltage isolation semiconductor capacitor digital communication device and corresponding package 有权
    高压隔离半导体电容数字通讯装置及相应封装

    公开(公告)号:US07741935B2

    公开(公告)日:2010-06-22

    申请号:US12032165

    申请日:2008-02-15

    IPC分类号: H01P1/00

    摘要: According to one embodiment, there is provided a semiconductor digital communication device comprising communication drive and sense electrodes formed in a single plane, where the electrodes have relatively high sidewalls. The relatively high sidewalls permit low electrical field densities to be obtained in the sense and drive electrodes during operation, and further permit very high breakdown voltages to be obtained between the electrodes, and between the drive electrode and an underlying ground plane substrate. The device effects communications between drive and receive circuits through the drive and sense electrodes by capacitive means, and in a preferred embodiment is capable of effecting relatively high-speed digital communications. The device may be formed in a small package using, by way of example, CMOS or other semiconductor fabrication and packaging processes.

    摘要翻译: 根据一个实施例,提供了一种半导体数字通信设备,其包括形成在单个平面中的通信驱动和感测电极,其中电极具有相对较高的侧壁。 相对较高的侧壁允许在操作期间在感测和驱动电极中获得低电场密度,并且还允许在电极之间以及在驱动电极和下面的接地平面衬底之间获得非常高的击穿电压。 该装置通过驱动器和电容器件感测电极来实现驱动和接收电路之间的通信,并且在优选实施例中能够实现相对高速的数字通信。 可以使用例如CMOS或其他半导体制造和封装工艺,将器件形成为小封装。

    Optocoupler System with Reduced Power Consumption and Pulse Width Distortion
    9.
    发明申请
    Optocoupler System with Reduced Power Consumption and Pulse Width Distortion 有权
    具有降低功耗和脉冲宽度失真的光耦合器系统

    公开(公告)号:US20100213874A1

    公开(公告)日:2010-08-26

    申请号:US12394025

    申请日:2009-02-26

    IPC分类号: H05B39/04

    CPC分类号: H04L25/26 H04B10/802

    摘要: According to one embodiment, there is provided an optocoupler system configured to generate current signals having high, low and no amplitude portions in response to the receipt of logic high and low input signals. The varying amplitude portions of the current signals are used to drive other portions of the isolation circuitry, and result in reduced power consumption and dissipation, as well as reduced pulse width distortion.

    摘要翻译: 根据一个实施例,提供了一种光耦合器系统,其被配置为响应于逻辑高和低输入信号的接收而产生具有高,低和无振幅部分的电流信号。 电流信号的变化幅度部分用于驱动隔离电路的其他部分,并且导致降低的功耗和耗散以及减小的脉冲宽度失真。

    Integrated battery voltage sensor with high voltage isolation, a battery voltage sensing system and methods therefor
    10.
    发明授权
    Integrated battery voltage sensor with high voltage isolation, a battery voltage sensing system and methods therefor 有权
    具有高电压隔离的集成电池电压传感器,电池电压检测系统及其方法

    公开(公告)号:US07876071B2

    公开(公告)日:2011-01-25

    申请号:US11763522

    申请日:2007-06-15

    摘要: An integrated circuit battery sensor and system thereof are provided. The battery sensor includes a voltage sensor configured to sample a voyage of a battery and a buffer in electrical communication with the voltage sensor and configured for scaling the sampled battery voltage and outputting a voltage signal proportional to the sampled battery voltage; wherein the voltage sensor is further configured for isolating the buffer from the battery. The voltage sensor includes a first capacitor coupled to a positive potential terminal of the battery and a second capacitor coupled to a negative potential terminal of the battery. The battery sensor includes a first die including a first and second input terminal configured for coupling to the positive and negative potential terminals of the battery; and a second die including the voltage sensor, wherein the first and second die are electrically isolated from each other.

    摘要翻译: 提供集成电路电池传感器及其系统。 电池传感器包括电压传感器,其被配置为对电池的航行进行采样,并且缓冲器与电压传感器电连通并且被配置为缩放所采样的电池电压并输出与采样的电池电压成比例的电压信号; 其中所述电压传感器还被配置为将所述缓冲器与所述电池隔离。 电压传感器包括耦合到电池的正电位端子的第一电容器和耦合到电池的负电位端子的第二电容器。 电池传感器包括:第一管芯,其包括被配置为耦合到电池的正极和负极端子的第一和第二输入端子; 以及包括所述电压传感器的第二管芯,其中所述第一管芯和所述第二管芯彼此电隔离。