公开(公告)号：US20170139740A1

公开(公告)日：2017-05-18

申请号：US14939662

申请日：2015-11-12

Applicant: Futurewei Technologies, Inc.

Inventor： Lee Dobson McFearin ,  Alan Gatherer ,  Yan Bei

IPC: G06F9/46 ,  G06F9/54

CPC classification number: G06F9/466 ,  G06F9/468 ,  G06F9/5077 ,  G06F9/54

Abstract: An embodiment method includes receiving, by an intellectual property (IP) block within a computing system, a transaction request and determining, by the IP block, a context corresponding to the transaction request. The method further includes determining, by the IP block, a view of the computing system defined by the context and processing, by the IP block, the transaction request in accordance with the view of the computing system defined by the context.

公开(公告)号：US20170293512A1

公开(公告)日：2017-10-12

申请号：US15096966

申请日：2016-04-12

Applicant: Futurewei Technologies, Inc.

Inventor： Peter Yan ,  Alan Gatherer ,  Alex Elisa Chandra ,  Lee Dobson Mcfearin ,  Mark Brown ,  Debashis Bhattacharya ,  Fang Yu ,  Xingfeng Chen ,  Yan Bei ,  Ke Ning ,  Chushun Huang ,  Tong Sun ,  Xiaotao Chen

IPC: G06F9/54 ,  G06F13/28

CPC classification number: G06F9/546 ,  G06F13/28

Abstract: Methods and apparatus for inter-process communication are provided. A circuit may have a plurality of clusters, and at least one cluster may have a computation element (CE), a memory operatively coupled with the CE, and an autonomic transport system (ATS) block operatively coupled with the CE and the memory. The ATS block may be configured to perform inter-process communication (IPC) for the at least one cluster. In one embodiment, the ATS block may transfer a message to a different cluster based on a request from the CE. In another embodiment, the ATS block may receive a message by allocating a buffer in the memory and write the message into the buffer. The ATS block may also be configured to manage synchronization and schedule tasks for the CE.

公开(公告)号：US20150309725A1

公开(公告)日：2015-10-29

申请号：US14265127

申请日：2014-04-29

Applicant: Futurewei Technologies, Inc.

Inventor： Hao Luan ,  Alan Gatherer ,  Yan Bei ,  Jun Ying

IPC: G06F3/06

CPC classification number: G06F3/061 ,  G06F3/0659 ,  G06F3/0673 ,  G06F13/1605

Abstract: Disclosed herein are a shared memory controller and a method of controlling a shared memory. An embodiment method of controlling a shared memory includes concurrently scanning-in a plurality of read/write commands for respective transactions. Each of the plurality of read/write commands includes respective addresses and respective priorities. Additionally, each of the respective transactions is divisible into at least one beat and at least one of the respective transactions is divisible into multiple beats. The method also includes dividing the plurality of read/write commands into respective beat-level read/write commands and concurrently arbitrating the respective beat-level read/write commands according to the respective addresses and the respective priorities. Concurrently arbitrating yields respective sequences of beat-level read/write commands corresponding to the respective addresses. The method further includes concurrently dispatching the respective sequences of beat-level read/write commands to the shared memory, thereby accessing the shared memory.

Abstract translation: 这里公开了共享存储器控制器和控制共享存储器的方法。 控制共享存储器的一个实施方式包括同时扫描多个用于各个事务的读/写命令。 多个读/写命令中的每一个包括各自的地址和各自的优先级。 另外，各个交易中的每一个都可以被分为至少一个节拍，并且各个交易中的至少一个可以被划分为多个节拍。 该方法还包括将多个读/写命令划分成相应的节拍读/写命令，并根据相应的地址和相应的优先级同时仲裁相应的节拍级读/写命令。 同时仲裁产生对应于各个地址的节拍级读/写命令的各个序列。 该方法还包括将各级序列的节拍读/写命令同时发送到共享存储器，从而访问共享存储器。

公开(公告)号：US10185606B2

公开(公告)日：2019-01-22

申请号：US15096966

申请日：2016-04-12

Applicant: Futurewei Technologies, Inc.

Inventor： Peter Yan ,  Alan Gatherer ,  Alex Elisa Chandra ,  Lee Dobson Mcfearin ,  Mark Brown ,  Debashis Bhattacharya ,  Fang Yu ,  Xingfeng Chen ,  Yan Bei ,  Ke Ning ,  Chushun Huang ,  Tong Sun ,  Xiaotao Chen

IPC: G06F3/00 ,  G06F9/44 ,  G06F9/46 ,  G06F13/00 ,  G06F9/54 ,  G06F13/28

Abstract: Methods and apparatus for inter-process communication are provided. A circuit may have a plurality of clusters, and at least one cluster may have a computation element (CE), a memory operatively coupled with the CE, and an autonomic transport system (ATS) block operatively coupled with the CE and the memory. The ATS block may be configured to perform inter-process communication (IPC) for the at least one cluster. In one embodiment, the ATS block may transfer a message to a different cluster based on a request from the CE. In another embodiment, the ATS block may receive a message by allocating a buffer in the memory and write the message into the buffer. The ATS block may also be configured to manage synchronization and schedule tasks for the CE.

公开(公告)号：US09335934B2

公开(公告)日：2016-05-10

申请号：US14265127

申请日：2014-04-29

Applicant: Futurewei Technologies, Inc.

Inventor： Hao Luan ,  Alan Gatherer ,  Yan Bei ,  Jun Ying

IPC: G06F12/00 ,  G06F3/00 ,  G06F3/06

CPC classification number: G06F3/061 ,  G06F3/0659 ,  G06F3/0673 ,  G06F13/1605

Abstract: Disclosed herein are a shared memory controller and a method of controlling a shared memory. An embodiment method of controlling a shared memory includes concurrently scanning-in a plurality of read/write commands for respective transactions. Each of the plurality of read/write commands includes respective addresses and respective priorities. Additionally, each of the respective transactions is divisible into at least one beat and at least one of the respective transactions is divisible into multiple beats. The method also includes dividing the plurality of read/write commands into respective beat-level read/write commands and concurrently arbitrating the respective beat-level read/write commands according to the respective addresses and the respective priorities. Concurrently arbitrating yields respective sequences of beat-level read/write commands corresponding to the respective addresses. The method further includes concurrently dispatching the respective sequences of beat-level read/write commands to the shared memory, thereby accessing the shared memory.

Abstract translation: 这里公开了共享存储器控制器和控制共享存储器的方法。 控制共享存储器的一个实施方式包括同时扫描多个用于各个事务的读/写命令。 多个读/写命令中的每一个包括各自的地址和各自的优先级。 另外，各个交易中的每一个都可以被分为至少一个节拍，并且各个交易中的至少一个可以被划分为多个节拍。 该方法还包括将多个读/写命令划分成相应的节拍读/写命令，并根据相应的地址和相应的优先级同时仲裁相应的节拍级读/写命令。 同时仲裁产生对应于各个地址的节拍级读/写命令的各个序列。 该方法还包括将各级序列的节拍读/写命令同时发送到共享存储器，从而访问共享存储器。