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    Non-blocking network
    1.
    发明授权
    Non-blocking network 有权

    公开(公告)号：US10289598B2

    公开(公告)日：2019-05-14

    申请号：US15096982

    申请日：2016-04-12

    Applicant: Futurewei Technologies, Inc.

    Inventor： Peter Yan ,  Alex Elisa Chandra ,  YwhPyng Harn ,  Xiaotao Chen ,  Alan Gatherer ,  Fang Yu ,  Xingfeng Chen ,  Zhuolei Wang ,  Yang Zhou

    IPC: G06F13/38 ,  G06F13/42 ,  G06F13/40

    Abstract: A described embodiment of the present invention includes a network having a first, second and third plurality of routers connected to a plurality of endpoints. At least one of the first plurality of routers includes a plurality of interposers having a number of queues. The at least one of the first plurality of routers has a demultiplexer for each interposer configured to receive multiplexed data from the interposer and provide demultiplexed data on to a plurality of second queues corresponding to the first queues of the number of queues. The at least one of the first plurality of routers also includes a number multiplexers, each of the number multiplexers having inputs configured to receive data from the number of queues.

    NoC interconnect with linearly-tunable QoS guarantees for real-time isolation
    6.
    发明授权
    NoC interconnect with linearly-tunable QoS guarantees for real-time isolation 有权

    公开(公告)号：US10387355B2

    公开(公告)日：2019-08-20

    申请号：US15097091

    申请日：2016-04-12

    Applicant: Futurewei Technologies, Inc.

    Inventor： Peter Yan ,  Alex Elisa Chandra ,  Lee Dobson McFearin ,  Fang Yu ,  Alan Gatherer

    IPC: G06F13/42 ,  G06F15/78 ,  G06F13/20

    Abstract: Disclosed is method for operating an interposer that includes assigning a binary port weight to a plurality of input ports of the interposer. The sum of all of the port weights is less than or equal to a number of traversals available to the interposer in a cycle. A traversal counter is set zero at the beginning of each cycle. The output of the traversal counter is a binary number of m bits. A mask is generated when a bit of the traversal counter transitions from a zero to a one. The mask is generated having the m−k+1 bit of the mask equal to one and all other bits of the mask equal to zero. Data is transmitted from each port when both the binary port weight and the mask have a one in the same bit position.

    Systems and methods for messaging-based fine granularity system-on-a-chip power gating
    7.
    发明授权
    Systems and methods for messaging-based fine granularity system-on-a-chip power gating 有权
    基于消息传递的精细粒度系统片上电源门控的系统和方法

    公开(公告)号：US09448617B2

    公开(公告)日：2016-09-20

    申请号：US14204555

    申请日：2014-03-11

    Applicant: FutureWei Technologies, Inc.

    Inventor： Mark Brown ,  Mehran Bagheri ,  Peter Yan ,  Alan Gatherer

    IPC: G06F1/32 ,  G06F13/40 ,  G06F9/44

    CPC classification number: G06F1/3293 ,  G06F1/3243 ,  G06F9/4418 ,  G06F13/4022 ,  Y02D10/151 ,  Y02D10/152 ,  Y02D50/20

    Abstract: System and method embodiments are provided for messaging-based System-on-a-chip (SoC) power gating. The embodiments enable fine granularity SoC power gating without introducing significant latency and substantially maximizes SoC power reduction. In an embodiment, a method in a first SoC resource for messaging-based power gating includes receiving at the first SoC resource a wakeup notification message (WNM) from a second SoC resource, wherein the WNM comprises a time at which a result message from the second SoC resource is expected to arrive at the first SoC resource; determining with the first SoC resource a wake-up time according to the time at which the result message from the second SoC resource is expected to arrive at the first SoC resource; setting a wake-up time timer to expire at the wake-up time; and waking up the first SoC resource when the wake-up time timer expires when the first SoC resource is asleep.

    Abstract translation: 为基于消息传递的片上系统（SoC）电源门控提供系统和方法实施例。 这些实施例使得细粒度SoC功率门控不引入显着的延迟并且基本上使SoC功率降低最大化。 在一个实施例中，用于基于消息的功率门控的第一SoC资源中的方法包括在第一SoC资源处从第二SoC资源接收唤醒通知消息（WNM），其中WNM包括来自 第二个SoC资源有望到达第一个SoC资源; 根据预期来自第二SoC资源的结果消息到达第一SoC资源的时间，利用第一SoC资源确定唤醒时间; 设置唤醒时间计时器在唤醒时间到期; 当第一个SoC资源处于睡眠状态时唤醒时间定时器到期时，唤醒第一个SoC资源。

    Systems and Methods for Messaging-based Fine Granularity System-on-a-Chip Power Gating
    10.
    发明申请
    Systems and Methods for Messaging-based Fine Granularity System-on-a-Chip Power Gating 有权
    基于消息传送的精细粒度系统的片上电源门控系统和方法

    公开(公告)号：US20150261290A1

    公开(公告)日：2015-09-17

    申请号：US14204555

    申请日：2014-03-11

    Applicant: FUTUREWEI TECHNOLOGIES, INC.

    Inventor： Mark Brown ,  Mehran Bagheri ,  Peter Yan ,  Alan Gatherer

    IPC: G06F1/32 ,  G06F9/44 ,  G06F13/40

    CPC classification number: G06F1/3293 ,  G06F1/3243 ,  G06F9/4418 ,  G06F13/4022 ,  Y02D10/151 ,  Y02D10/152 ,  Y02D50/20

    Abstract: System and method embodiments are provided for messaging-based System-on-a-chip (SoC) power gating. The embodiments enable fine granularity SoC power gating without introducing significant latency and substantially maximizes SoC power reduction. In an embodiment, a method in a first SoC resource for messaging-based power gating includes receiving at the first SoC resource a wakeup notification message (WNM) from a second SoC resource, wherein the WNM comprises a time at which a result message from the second SoC resource is expected to arrive at the first SoC resource; determining with the first SoC resource a wake-up time according to the time at which the result message from the second SoC resource is expected to arrive at the first SoC resource; setting a wake-up time timer to expire at the wake-up time; and waking up the first SoC resource when the wake-up time timer expires when the first SoC resource is asleep.

    Abstract translation: 为基于消息传递的片上系统（SoC）电源门控提供系统和方法实施例。 这些实施例使得细粒度SoC功率门控不引入显着的延迟并且基本上使SoC功率降低最大化。 在一个实施例中，用于基于消息的功率门控的第一SoC资源中的方法包括在第一SoC资源处从第二SoC资源接收唤醒通知消息（WNM），其中WNM包括来自 第二个SoC资源有望到达第一个SoC资源; 根据预期来自第二SoC资源的结果消息到达第一SoC资源的时间，利用第一SoC资源确定唤醒时间; 设置唤醒时间计时器在唤醒时间到期; 当第一个SoC资源处于睡眠状态时唤醒时间定时器到期时，唤醒第一个SoC资源。

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