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公开(公告)号:US10185606B2
公开(公告)日:2019-01-22
申请号:US15096966
申请日:2016-04-12
Applicant: Futurewei Technologies, Inc.
Inventor: Peter Yan , Alan Gatherer , Alex Elisa Chandra , Lee Dobson Mcfearin , Mark Brown , Debashis Bhattacharya , Fang Yu , Xingfeng Chen , Yan Bei , Ke Ning , Chushun Huang , Tong Sun , Xiaotao Chen
Abstract: Methods and apparatus for inter-process communication are provided. A circuit may have a plurality of clusters, and at least one cluster may have a computation element (CE), a memory operatively coupled with the CE, and an autonomic transport system (ATS) block operatively coupled with the CE and the memory. The ATS block may be configured to perform inter-process communication (IPC) for the at least one cluster. In one embodiment, the ATS block may transfer a message to a different cluster based on a request from the CE. In another embodiment, the ATS block may receive a message by allocating a buffer in the memory and write the message into the buffer. The ATS block may also be configured to manage synchronization and schedule tasks for the CE.
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公开(公告)号:US20170293587A1
公开(公告)日:2017-10-12
申请号:US15096982
申请日:2016-04-12
Applicant: Futurewei Technologies, Inc.
Inventor: Peter Yan , Alex Elisa Chandra , YwhPyng Harn , Xiaotao Chen , Alan Gatherer , Fang Yu , Xingfeng Chen , Zhuolei Wang , Yang Zhou
CPC classification number: G06F13/4265 , G06F13/4022 , G06F13/4045 , Y02D10/14 , Y02D10/151
Abstract: A described embodiment of the present invention includes a network having a first, second an d third plurality of routers connected to a plurality of endpoints. At least one of the first plurality of routers includes a plurality of interposers having a number of queues. The at least one of the first plurality of routers has a demultiplexer for each interposer configured to receive multiplexed data from the interposer and provide demultiplexed data on to a plurality of second queues corresponding to the first queues of the number of queues. The at least one of the first plurality of routers also includes a number multiplexers, each of the number multiplexers having inputs configured to receive data from the number of queues.
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公开(公告)号:US10546075B2
公开(公告)日:2020-01-28
申请号:US15140246
申请日:2016-04-27
Applicant: Futurewei Technologies, Inc.
Inventor: YwhPyng Harn , Fa Yin , Xiaotao Chen
IPC: G06F17/50
Abstract: A system and method for a synthetic trace model includes providing a first system model, the first system model comprising a plurality of subsystem models, each of the plurality of subsystem models having a trace format, generating a first plurality of traces from an overall pool of trace instructions, each of the first plurality of traces generated for respective ones of the plurality of subsystem models, according to the trace format of the subsystem model, executing the traces on each of the subsystem models, and evaluating execution characteristics for each trace executed on the first system model.
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公开(公告)号:US11636122B2
公开(公告)日:2023-04-25
申请号:US14983934
申请日:2015-12-30
Applicant: Futurewei Technologies, Inc.
Inventor: YwhPyng Harn , Xiaotao Chen , Fa Yin
Abstract: According to an embodiment, there is provided a method for data mining from core traces in a processing system for wireless baseband design that includes detecting a core trace in the processing system where the core trace is a sequence of instructions executed in the processing system. Instruction addresses in the core trace are mapped to a plurality of application or operating system functions. The mapped functions are sorted into a hierarchical format. A gene function is identified in the hierarchical format where the gene function is a fundamental function executed by the processing system. Attributes for the gene function are derived from the hierarchical format. The attributes are stored into a gene function library database.
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公开(公告)号:US20160335379A1
公开(公告)日:2016-11-17
申请号:US15140246
申请日:2016-04-27
Applicant: Futurewei Technologies, Inc.
Inventor: YwhPyng Harn , Fa Yin , Xiaotao Chen
IPC: G06F17/50
Abstract: A system and method for a synthetic trace model includes providing a first system model, the first system model comprising a plurality of subsystem models, each of the plurality of subsystem models having a trace format, generating a first plurality of traces from an overall pool of trace instructions, each of the first plurality of traces generated for respective ones of the plurality of subsystem models, according to the trace format of the subsystem model, executing the traces on each of the subsystem models, and evaluating execution characteristics for each trace executed on the first system model.
Abstract translation: 一种用于合成跟踪模型的系统和方法包括:提供第一系统模型,所述第一系统模型包括多个子系统模型,所述多个子系统模型中的每一个具有跟踪格式,从总体池中生成第一多个迹线 跟踪指令,根据子系统模型的跟踪格式为每个子系统模型中的相应子模型生成的第一组多个跟踪中的每一个,执行每个子系统模型上的跟踪,以及针对在每个子系统模型上执行的每个跟踪来评估执行特性 第一个系统模型。
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公开(公告)号:US10289598B2
公开(公告)日:2019-05-14
申请号:US15096982
申请日:2016-04-12
Applicant: Futurewei Technologies, Inc.
Inventor: Peter Yan , Alex Elisa Chandra , YwhPyng Harn , Xiaotao Chen , Alan Gatherer , Fang Yu , Xingfeng Chen , Zhuolei Wang , Yang Zhou
Abstract: A described embodiment of the present invention includes a network having a first, second and third plurality of routers connected to a plurality of endpoints. At least one of the first plurality of routers includes a plurality of interposers having a number of queues. The at least one of the first plurality of routers has a demultiplexer for each interposer configured to receive multiplexed data from the interposer and provide demultiplexed data on to a plurality of second queues corresponding to the first queues of the number of queues. The at least one of the first plurality of routers also includes a number multiplexers, each of the number multiplexers having inputs configured to receive data from the number of queues.
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公开(公告)号:US20170293512A1
公开(公告)日:2017-10-12
申请号:US15096966
申请日:2016-04-12
Applicant: Futurewei Technologies, Inc.
Inventor: Peter Yan , Alan Gatherer , Alex Elisa Chandra , Lee Dobson Mcfearin , Mark Brown , Debashis Bhattacharya , Fang Yu , Xingfeng Chen , Yan Bei , Ke Ning , Chushun Huang , Tong Sun , Xiaotao Chen
Abstract: Methods and apparatus for inter-process communication are provided. A circuit may have a plurality of clusters, and at least one cluster may have a computation element (CE), a memory operatively coupled with the CE, and an autonomic transport system (ATS) block operatively coupled with the CE and the memory. The ATS block may be configured to perform inter-process communication (IPC) for the at least one cluster. In one embodiment, the ATS block may transfer a message to a different cluster based on a request from the CE. In another embodiment, the ATS block may receive a message by allocating a buffer in the memory and write the message into the buffer. The ATS block may also be configured to manage synchronization and schedule tasks for the CE.
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