公开(公告)号：US20190355624A1

公开(公告)日：2019-11-21

申请号：US16529162

申请日：2019-08-01

申请人： GLOBALFOUNDRIES INC.

发明人： Asli Sirman ,  Jiehui Shu ,  Chih-Chiang Chang ,  Huy Cao ,  Haigou Huang ,  Jinping Liu

IPC分类号： H01L21/8234 ,  H01L21/762 ,  H01L27/088 ,  H01L29/66

摘要： Methods produce integrated circuit structures that include (among other components) fins extending from a first layer, source/drain structures on the fins, source/drain contacts on the source/drain structures, an insulator on the source/drain contacts defining trenches between the source/drain contacts, gate conductors in a lower portion of the trenches adjacent the fins, a first liner material lining a middle portion and an upper portion of the trenches, a fill material in the middle portion of the trenches, and a second material in the upper portion of the trenches. The first liner material is on the gate conductors in the trenches.

公开(公告)号：US20190304843A1

公开(公告)日：2019-10-03

申请号：US15936734

申请日：2018-03-27

申请人： GLOBALFOUNDRIES INC.

发明人： Asli Sirman ,  Jiehui Shu ,  Chih-Chiang Chang ,  Huy Cao ,  Haigou Huang ,  Jinping Liu

IPC分类号： H01L21/8234 ,  H01L27/088 ,  H01L21/762 ,  H01L29/66

摘要： Methods produce integrated circuit structures that include (among other components) fins extending from a first layer, source/drain structures on the fins, source/drain contacts on the source/drain structures, an insulator on the source/drain contacts defining trenches between the source/drain contacts, gate conductors in a lower portion of the trenches adjacent the fins, a first liner material lining a middle portion and an upper portion of the trenches, a fill material in the middle portion of the trenches, and a second material in the upper portion of the trenches. The first liner material is on the gate conductors in the trenches.

公开(公告)号：US10192791B1

公开(公告)日：2019-01-29

申请号：US15913547

申请日：2018-03-06

申请人： GLOBALFOUNDRIES Inc.

发明人： Man Gu ,  Tao Han ,  Junsic Hong ,  Jiehui Shu ,  Asli Sirman ,  Charlotte Adams ,  Jinping Liu ,  Keith Tabakman

IPC分类号： H01L21/8242 ,  H01L21/8238 ,  H01L21/3105 ,  H01L21/02 ,  H01L29/51 ,  H01L27/092

摘要： A method of forming a robust low-k sidewall spacer by exposing an upper portion of the spacer to a thermal and plasma treatment prior to downstream processes and resulting device are provided. Embodiments include providing a pair of gates separated by a canyon trench over a substrate, an EPI layer in a bottom of the canyon trench, respectively, and a low-k spacer on each opposing sidewall of the pair; forming a masking layer in a bottom portion of the canyon trench, an upper portion of the low-k spacers exposed; and treating the upper portion of the low-k spacers with a thermal and plasma treatment.

公开(公告)号：US10431500B1

公开(公告)日：2019-10-01

申请号：US15936734

申请日：2018-03-27

申请人： GLOBALFOUNDRIES INC.

发明人： Asli Sirman ,  Jiehui Shu ,  Chih-Chiang Chang ,  Huy Cao ,  Haigou Huang ,  Jinping Liu

IPC分类号： H01L21/00 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/762 ,  H01L27/088 ,  H01L29/78

摘要： Methods produce integrated circuit structures that include (among other components) fins extending from a first layer, source/drain structures on the fins, source/drain contacts on the source/drain structures, an insulator on the source/drain contacts defining trenches between the source/drain contacts, gate conductors in a lower portion of the trenches adjacent the fins, a first liner material lining a middle portion and an upper portion of the trenches, a fill material in the middle portion of the trenches, and a second material in the upper portion of the trenches. The first liner material is on the gate conductors in the trenches.