公开(公告)号：US10930549B2

公开(公告)日：2021-02-23

申请号：US16573209

申请日：2019-09-17

申请人： GLOBALFOUNDRIES INC.

发明人： Jinsheng Gao ,  Daniel Jaeger ,  Chih-Chiang Chang ,  Michael Aquilino ,  Patrick Carpenter ,  Junsic Hong ,  Mitchell Rutkowski ,  Haigou Huang ,  Huy Cao

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L21/768 ,  H01L21/28 ,  H01L21/311 ,  H01L29/417

摘要： The present disclosure relates to semiconductor structures and, more particularly, to a cap structure and methods of manufacture. The structure includes: a gate structure composed of conductive gate material; sidewall spacers on the gate structure, extending above the conductive gate material; and a capping material on the conductive gate material and extending over the sidewall spacers on the gate structure.

公开(公告)号：US10431500B1

公开(公告)日：2019-10-01

申请号：US15936734

申请日：2018-03-27

申请人： GLOBALFOUNDRIES INC.

发明人： Asli Sirman ,  Jiehui Shu ,  Chih-Chiang Chang ,  Huy Cao ,  Haigou Huang ,  Jinping Liu

IPC分类号： H01L21/00 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/762 ,  H01L27/088 ,  H01L29/78

摘要： Methods produce integrated circuit structures that include (among other components) fins extending from a first layer, source/drain structures on the fins, source/drain contacts on the source/drain structures, an insulator on the source/drain contacts defining trenches between the source/drain contacts, gate conductors in a lower portion of the trenches adjacent the fins, a first liner material lining a middle portion and an upper portion of the trenches, a fill material in the middle portion of the trenches, and a second material in the upper portion of the trenches. The first liner material is on the gate conductors in the trenches.

公开(公告)号：US09620381B2

公开(公告)日：2017-04-11

申请号：US14050472

申请日：2013-10-10

申请人： GLOBALFOUNDRIES Inc.

发明人： Suraj K. Patil ,  Huy Cao ,  Hui Zhan ,  Huang Liu

IPC分类号： H01L21/311 ,  H01L29/66 ,  H01L21/3115

CPC分类号： H01L21/31105 ,  H01L21/31116 ,  H01L21/31155 ,  H01L29/66795

摘要： Methods of facilitating fabrication of circuit structures are provided which include, for instance: providing a structure with a film layer; modifying an etch property of the film layer by implanting at least one species of element or molecule into the upper portion of the film layer, the etch property of the film layer remaining unmodified beneath the upper portion; and subjecting the structure and film layer with the modified etch property to an etching process, the modified etch property of the film layer facilitating the etching process. Modifying the etch property of the upper portion of the film layer may include making the upper portion of the film layer preferentially susceptible or preferentially resistant to the etching process depending on the circuit fabrication approach being facilitated.

公开(公告)号：US20190355624A1

公开(公告)日：2019-11-21

申请号：US16529162

申请日：2019-08-01

申请人： GLOBALFOUNDRIES INC.

发明人： Asli Sirman ,  Jiehui Shu ,  Chih-Chiang Chang ,  Huy Cao ,  Haigou Huang ,  Jinping Liu

IPC分类号： H01L21/8234 ,  H01L21/762 ,  H01L27/088 ,  H01L29/66

摘要： Methods produce integrated circuit structures that include (among other components) fins extending from a first layer, source/drain structures on the fins, source/drain contacts on the source/drain structures, an insulator on the source/drain contacts defining trenches between the source/drain contacts, gate conductors in a lower portion of the trenches adjacent the fins, a first liner material lining a middle portion and an upper portion of the trenches, a fill material in the middle portion of the trenches, and a second material in the upper portion of the trenches. The first liner material is on the gate conductors in the trenches.

公开(公告)号：US20190304843A1

公开(公告)日：2019-10-03

申请号：US15936734

申请日：2018-03-27

申请人： GLOBALFOUNDRIES INC.

发明人： Asli Sirman ,  Jiehui Shu ,  Chih-Chiang Chang ,  Huy Cao ,  Haigou Huang ,  Jinping Liu

IPC分类号： H01L21/8234 ,  H01L27/088 ,  H01L21/762 ,  H01L29/66

摘要： Methods produce integrated circuit structures that include (among other components) fins extending from a first layer, source/drain structures on the fins, source/drain contacts on the source/drain structures, an insulator on the source/drain contacts defining trenches between the source/drain contacts, gate conductors in a lower portion of the trenches adjacent the fins, a first liner material lining a middle portion and an upper portion of the trenches, a fill material in the middle portion of the trenches, and a second material in the upper portion of the trenches. The first liner material is on the gate conductors in the trenches.

公开(公告)号：US20170338325A1

公开(公告)日：2017-11-23

申请号：US15160845

申请日：2016-05-20

申请人： GLOBALFOUNDRIES INC.

发明人： Huy Cao ,  Chih-Chiang Chang ,  Katsunori Onishi ,  Songkram Srivathanakul

IPC分类号： H01L29/66 ,  H01L21/3105 ,  H01L21/02 ,  H01L27/088 ,  H01L21/8234

CPC分类号： H01L29/66545 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/02348 ,  H01L21/31055 ,  H01L21/823418 ,  H01L21/823437 ,  H01L27/088 ,  H01L29/78

摘要： We disclose a semiconductor device, comprising a semiconductor substrate; at least one gate structure disposed above the semiconductor substrate, wherein the gate structure comprises a gate structure cavity partially filled with at least one metal layer; and an ultraviolet (UV) cured high density plasma (HDP) nitride cap layer in the gate structure cavity above the at least one metal layer. We also disclose at least one method and at least one system by which the semiconductor device may be formed. The UV cured HDP nitride cap layer may be substantially free of voids or seams, and as a result, the semiconductor device may have a reduced Vt shift relative to comparable semiconductor devices known in the art.

公开(公告)号：US09130019B2

公开(公告)日：2015-09-08

申请号：US14150260

申请日：2014-01-08

申请人： GLOBALFOUNDRIES Inc.

发明人： Huy Cao ,  Songkram Srivathanakul ,  Huang Liu ,  Garo Jacques Derderian ,  Boaz Alperson

IPC分类号： H01L21/4763 ,  H01L21/768 ,  H01L23/482

CPC分类号： H01L23/5329 ,  H01L21/02126 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/31105 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/76831 ,  H01L23/485 ,  H01L2924/0002 ,  H01L2924/00

摘要： Conductive contact structure of a circuit structures and methods of fabrication thereof are provided. The fabrication includes, for instance, providing at least one contact opening disposed over a semiconductor substrate; forming a carbon-rich contact liner material including a carbon-containing species and an elemental carbon disposed therein, the carbon-containing species and the elemental carbon together defining a set carbon content within the carbon-rich contact liner material; and depositing the carbon-rich contact liner material conformally within the at least one contact opening disposed over the semiconductor substrate.

摘要翻译： 提供电路结构的导电接触结构及其制造方法。 该制造包括例如提供设置在半导体衬底上的至少一个接触开口; 形成包含含碳物质和设置在其中的元素碳的富碳接触衬垫材料，所述含碳物质和所述元素碳一起限定所述富碳接触衬里材料内的固定碳含量; 以及将所述富碳接触衬垫材料共形地沉积在设置在所述半导体衬底上的所述至少一个接触开口内。

公开(公告)号：US20190326416A1

公开(公告)日：2019-10-24

申请号：US15956306

申请日：2018-04-18

申请人： GLOBALFOUNDRIES Inc.

发明人： Haigou Huang ,  Jiehui Shu ,  Chih-Chiang Chang ,  Xingzhao Shi ,  Jinsheng Gao ,  Huy Cao

IPC分类号： H01L29/66 ,  H01L29/78

摘要： Structures for a field-effect transistor and methods of forming a structure for field-effect transistor. A gate electrode is arranged in a lower portion of a trench in an interlayer dielectric layer, and a liner is formed inside an upper portion of the trench and over a top surface of the interlayer dielectric layer. A dielectric material is deposited in in the upper portion of the trench and over the liner on the top surface of the interlayer dielectric layer. The dielectric material is polished with a polishing process to remove the dielectric material from the liner on the top surface of the interlayer dielectric layer and to form a cap comprised of the dielectric material in the upper portion of the trench. The liner on the interlayer dielectric layer operates as a polish stop during the polishing process.

公开(公告)号：US10269654B1

公开(公告)日：2019-04-23

申请号：US15890246

申请日：2018-02-06

申请人： GLOBALFOUNDRIES INC.

发明人： Jinsheng Gao ,  Daniel Jaeger ,  Michael Aquilino ,  Patrick Carpenter ,  Jessica Dechene ,  Huy Cao ,  Mitchell Rutkowski ,  Haigou Huang

IPC分类号： H01L21/00 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/06 ,  H01L27/092

摘要： At least one method, apparatus and system disclosed herein involves forming trench silicide region contact. A plurality of fins are formed on a semiconductor substrate. An epitaxial (EPI) feature is formed at a top portion of each fin of the first portion over a first portion of the fins. A gate region is formed over a second portion of the fins. A replacement metal gate (RMG) process is performed in the gate region. A trench is formed in a portion of the gate region. A void is formed adjacent the a portion of the gate region. A first silicon feature is formed in the trench. A second silicon feature is formed in the void. A TS cut region is formed over the trench. The first silicon feature and the second silicon feature are removed. A metallization process is performed in the void to form a contact.

公开(公告)号：US20180005893A1

公开(公告)日：2018-01-04

申请号：US15703601

申请日：2017-09-13

申请人： GLOBALFOUNDRIES Inc.

发明人： Huy Cao ,  Huang Liu ,  Guillaume Bouche ,  Songkram Srivathanakul

IPC分类号： H01L21/8234 ,  H01L21/308 ,  H01L21/02 ,  H01L21/3115 ,  H01L21/311

CPC分类号： H01L21/823431 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/823821 ,  H01L29/66795

摘要： One method disclosed herein includes, among other things, forming a process layer on a substrate. A patterned mask layer is formed above the process layer. The patterned mask layer includes first openings exposing portions of the process layer. A carbon-containing silicon dioxide layer is formed above the patterned mask layer and in the first openings. The carbon-containing silicon dioxide layer is planarized to remove portions extending outside the first openings and generate a plurality of mask elements from remaining portions of the carbon-containing silicon dioxide layer. The patterned mask layer is removed. The process layer is etched using the mask elements as an etch mask.