PARALLEL TEST STRUCTURE
    1.
    发明申请

    公开(公告)号:US20190067056A1

    公开(公告)日:2019-02-28

    申请号:US15682704

    申请日:2017-08-22

    Abstract: An exemplary apparatus includes a testing module connected to, and providing a test voltage to, an integrated circuit containing devices under test. The testing module performs a time-dependent dielectric breakdown (TDDB) test on the devices under test. A decoder is connected to the devices under test and the testing module. The decoder selectively connects each device being tested to the testing module. Efuses are connected to a different one of the devices under test. The efuses separately electrically disconnect each of the devices under test from the test voltage upon failure of a corresponding device under test. Protection circuits are connected between the efuses and a ground voltage. Each protection circuit provides a shunt around the decoder upon failure of the device under test.

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