公开(公告)号：US20190027433A1

公开(公告)日：2019-01-24

申请号：US15652594

申请日：2017-07-18

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Erdem Kaltalioglu ,  Ronald G. Filippi, JR. ,  Ping-Chuan Wang ,  Cathryn Christiansen

IPC: H01L23/528 ,  H01L23/522 ,  H01L21/3065 ,  H01L21/306 ,  H01L21/308 ,  H01L21/768

Abstract: Interconnect structures for a security application and methods of forming an interconnect structure for a security application. A sacrificial masking layer is formed that includes a plurality of particles arranged with a random distribution. An etch mask is formed using the sacrificial masking layer. A hardmask is etched while masked by the etch mask to define a plurality of mask features arranged with the random distribution. A dielectric layer is etched while masked by the hardmask to form a plurality of openings in the dielectric layer that are arranged at the locations of the mask features. The openings in the dielectric layer are filled with a conductor to define a plurality of conductive features.

公开(公告)号：US20200219826A1

公开(公告)日：2020-07-09

申请号：US16240436

申请日：2019-01-04

Applicant: GLOBALFOUNDRIES INC.

Inventor： Zhuojie Wu ,  Cathryn J. Christiansen ,  Erdem Kaltalioglu ,  Ping-Chuan Wang ,  Ronald G. Filippi, JR. ,  Eric D. Hunt-Schroeder ,  Nicholas A. Polomoff

IPC: H01L23/00 ,  G01N27/12 ,  H01L23/538

Abstract: An integrated circuit (IC) structure includes a back end of line (BEOL) stack on a substrate, the BEOL stack having a plurality of metal layers therein and a plurality of inter-level dielectric (ILD) layers therein. The plurality of metal layers includes a lowermost metal layer and an uppermost metal layer. A pair of metal guard structures proximate a perimeter of the BEOL stack concentrically surrounds the active circuitry. Each metal guard structure includes a continuous metal fill between the lowermost metal layer and the uppermost metal layer of the plurality of metal layers. A set of interdigitating conductive elements within one of the plurality of metal layers includes a first plurality of conductive elements electrically coupled to one of the pair of metal guard structures interdigitating with a second plurality of conductive elements electrically coupled to the other of the pair of metal guard structures.

公开(公告)号：US20190067056A1

公开(公告)日：2019-02-28

申请号：US15682704

申请日：2017-08-22

Applicant: GLOBALFOUNDRIES INC.

Inventor： Tian Shen ,  Anil Kumar ,  Yuncheng Song ,  Kong Boon Yeap ,  Ronald G. Filippi, JR. ,  Linjun Cao ,  Seungman Choi ,  Cathryn J. Christiansen ,  Patrick R. Justison

IPC: H01L21/67 ,  G01R3/00 ,  G01R31/12 ,  H01L21/66

Abstract: An exemplary apparatus includes a testing module connected to, and providing a test voltage to, an integrated circuit containing devices under test. The testing module performs a time-dependent dielectric breakdown (TDDB) test on the devices under test. A decoder is connected to the devices under test and the testing module. The decoder selectively connects each device being tested to the testing module. Efuses are connected to a different one of the devices under test. The efuses separately electrically disconnect each of the devices under test from the test voltage upon failure of a corresponding device under test. Protection circuits are connected between the efuses and a ground voltage. Each protection circuit provides a shunt around the decoder upon failure of the device under test.