公开(公告)号：US08739098B1

公开(公告)日：2014-05-27

申请号：US13771478

申请日：2013-02-20

Applicant: GlobalFoundries Inc.

Inventor： Christopher H. Clifford ,  Fan Jiang ,  Pawitter Mangat

IPC: G06F17/50

CPC classification number: G03F1/72 ,  G03F1/22

Abstract: Embodiments of the invention provide approaches for extreme ultraviolet (EUV) defect reconstruction and compensation repair. Specifically, a defect starting point of a defect of a mask is determined, and the performance of the mask with the defect is simulated. The simulated performance of the mask is compared to an empirical analysis of the mask to produce a profile of the mask and the defect. An initial image of the mask geometry, with the defect, is calculated, and then compared to a target image of the mask. From this, a compensated layout is generated. As such, embodiments provide a EUV fabrication system that detects and corrects for defects in the blanks and patterned masks to avoid or counteract the defect. Once a compensated pattern has been designed and successfully simulated, the mask may be patterned with the compensated design.

Abstract translation: 本发明的实施例提供了用于极紫外（EUV）缺陷重建和补偿修复的方法。 具体地说，确定掩模的缺陷的缺陷起点，并模拟具有缺陷的掩模的性能。 将掩模的模拟性能与掩模的经验分析进行比较以产生掩模和缺陷的轮廓。 计算具有缺陷的掩模几何的初始图像，然后与掩模的目标图像进行比较。 由此产生补偿布局。 因此，实施例提供了一种EUV制造系统，其检测和校正毛坯和图案化掩模中的缺陷以避免或抵消缺陷。 一旦已经设计并成功地模拟了补偿图案，则可以用补偿设计对掩模进行图案化。

公开(公告)号：US20190056651A1

公开(公告)日：2019-02-21

申请号：US15681491

申请日：2017-08-21

Applicant: GLOBALFOUNDRIES INC.

Inventor： Erik Verduijn ,  Yulu Chen ,  Lars Liebmann ,  Pawitter Mangat

IPC: G03F1/24 ,  G03F1/72 ,  G03F1/84 ,  G03F7/40 ,  H01L21/033 ,  H01L21/3213

Abstract: A photomask includes a substrate having a top surface. A topographical feature is formed on the top surface of the substrate. The topographical feature may be a bump or a pit created on the top surface of the substrate. A reflector is formed on the top surface of the substrate over the topographical feature. The topographical feature warps the reflector in order to generate phase and/or amplitude gradients in light reflected off the reflector. An absorber is patterned on the reflector defining lithographic patterns for a resist material. The gradients in the light reflected off the reflector create shadow regions during lithography of the resist material using extreme ultraviolet (EUV) light.

公开(公告)号：US08911920B2

公开(公告)日：2014-12-16

申请号：US13840790

申请日：2013-03-15

Applicant: GlobalFoundries, Inc.

Inventor： Sudharshanan Raghunathan ,  Pawitter Mangat ,  Hui Peng Koh

IPC: G03F1/44 ,  G03F1/22 ,  G03F7/20

CPC classification number: G03F7/2022 ,  G03F1/22

Abstract: A method for fabricating integrated circuits includes fabricating an EUV mask by providing a photomask having a border region. A photoresist is formed over the photomask and has a border region overlying the border region of the photomask. The method exposes an inner portion and an outer portion of the photoresist border region. The method removes the inner portion and the outer portion to expose the border region of the photomask. The border region of the photomask is etched using the photoresist as a mask to form the EUV mask with a non-reflective border. The photoresist is removed from the EUV mask. The method includes forming another photoresist over a partially-fabricated integrated circuit layer and patterning the photoresist by exposure to EUV light reflected from the EUV mask to expose portions of the partially-fabricated integrated circuit layer. Portions of the partially-fabricated integrated circuit layer and the photoresist are removed.

Abstract translation: 制造集成电路的方法包括通过提供具有边界区域的光掩模来制造EUV掩模。 在光掩模上形成光致抗蚀剂，并且具有覆盖在光掩模的边界区域上的边界区域。 该方法曝光光刻胶边界区域的内部部分和外部部分。 该方法移除内部部分和外部部分以暴露光掩模的边界区域。 使用光致抗蚀剂作为掩模蚀刻光掩模的边界区域，以形成具有非反射边界的EUV掩模。 从EUV掩模中去除光致抗蚀剂。 该方法包括在部分制造的集成电路层上形成另一光致抗蚀剂，并通过暴露于从EUV掩模反射的EUV光来图案化光致抗蚀剂，以暴露部分制造的集成电路层的部分。 去除部分制造的集成电路层和光致抗蚀剂的部分。

公开(公告)号：US20140272677A1

公开(公告)日：2014-09-18

申请号：US13840790

申请日：2013-03-15

Applicant: GLOBALFOUNDRIES, INC.

Inventor： Sudharshanan Raghunathan ,  Pawitter Mangat ,  Hui Peng Koh

IPC: G03F7/20 ,  G03F1/22

CPC classification number: G03F7/2022 ,  G03F1/22

Abstract: A method for fabricating integrated circuits includes fabricating an EUV mask by providing a photomask having a border region. A photoresist is formed over the photomask and has a border region overlying the border region of the photomask. The method exposes an inner portion and an outer portion of the photoresist border region. The method removes the inner portion and the outer portion to expose the border region of the photomask. The border region of the photomask is etched using the photoresist as a mask to form the EUV mask with a non-reflective border. The photoresist is removed from the EUV mask. The method includes forming another photoresist over a partially-fabricated integrated circuit layer and patterning the photoresist by exposure to EUV light reflected from the EUV mask to expose portions of the partially-fabricated integrated circuit layer. Portions of the partially-fabricated integrated circuit layer and the photoresist are removed.

Abstract translation: 制造集成电路的方法包括通过提供具有边界区域的光掩模来制造EUV掩模。 在光掩模上形成光致抗蚀剂，并且具有覆盖在光掩模的边界区域上的边界区域。 该方法曝光光刻胶边界区域的内部部分和外部部分。 该方法移除内部部分和外部部分以暴露光掩模的边界区域。 使用光致抗蚀剂作为掩模蚀刻光掩模的边界区域，以形成具有非反射边界的EUV掩模。 从EUV掩模中去除光致抗蚀剂。 该方法包括在部分制造的集成电路层上形成另一光致抗蚀剂，并通过暴露于从EUV掩模反射的EUV光来图案化光致抗蚀剂，以暴露部分制造的集成电路层的部分。 去除部分制造的集成电路层和光致抗蚀剂的部分。