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    Cut first alternative for 2D self-aligned via
    2.
    发明授权
    Cut first alternative for 2D self-aligned via 有权
    切割2D自对准通道的首选

    公开(公告)号：US09425097B1

    公开(公告)日：2016-08-23

    申请号：US14699154

    申请日：2015-04-29

    Applicant: GLOBALFOUNDRIES Inc.

    Inventor： Guillaume Bouche ,  Andy Wei ,  Sudharshanan Raghunathan

    IPC: H01L23/48 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532

    CPC classification number: H01L23/528 ,  H01L21/02118 ,  H01L21/0337 ,  H01L21/31051 ,  H01L21/32139 ,  H01L21/76802 ,  H01L21/76816 ,  H01L21/76897

    Abstract: A method of lithographically cutting a Mx line before the Mx line is lithographically defined by patterning and the resulting 2DSAV device are provided. Embodiments include forming an a-Si dummy metal layer over a SiO2 layer; forming a first softmask stack over the a-Si dummy metal layer; patterning a plurality of vias through the first softmask stack down to the SiO2 layer; removing the first soft mask stack; forming first and second etch stop layers over the a-Si dummy metal layer, the first etch stop layer formed in the plurality of vias; forming a-Si mandrels on the second etch stop layer; forming oxide spacers on opposite sides of each a-Si mandrel; removing the a-Si mandrels; forming a-Si dummy metal lines in the a-Si dummy metal layer below the oxide spacers; and forming a SiOC layer between the a-Si dummy metal lines.

    Abstract translation: 在Mx线之前光刻地切割Mx线的方法通过图案化光刻定义，并且提供所得到的2DSAV器件。 实施例包括在SiO 2层上形成a-Si虚拟金属层; 在所述a-Si虚拟金属层上形成第一软掩模堆叠; 将通过第一软掩模堆叠的多个通孔图形化成SiO 2层; 移除第一软掩模层; 在a-Si虚拟金属层上形成第一和第二蚀刻停止层，形成在多个通孔中的第一蚀刻停止层; 在第二蚀刻停止层上形成a-Si心轴; 在每个a-Si心轴的相对侧上形成氧化物间隔物; 去除a-Si心轴; 在氧化物间隔物下面的a-Si虚拟金属层中形成a-Si虚拟金属线; 并在a-Si虚拟金属线之间形成SiOC层。

    2D self-aligned via first process flow
    6.
    发明授权
    2D self-aligned via first process flow 有权
    通过第一工艺流程进行二维自对准

    公开(公告)号：US09362165B1

    公开(公告)日：2016-06-07

    申请号：US14707443

    申请日：2015-05-08

    Applicant: GLOBALFOUNDRIES Inc.

    Inventor： Guillaume Bouche ,  Andy Wei ,  Sudharshanan Raghunathan

    IPC: H01L23/48 ,  H01L21/02 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532

    CPC classification number: H01L23/5226 ,  H01L21/76816 ,  H01L21/76897 ,  H01L23/528 ,  H01L23/53228 ,  H01L23/53238 ,  H01L23/53257 ,  H01L23/53266 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A method of forming 2D self-aligned vias before forming a subsequent metal layer and reducing capacitance of the resulting device and the resulting device are provided. Embodiments include forming dummy metal lines in a SiOC layer and extending in a first direction; replacing the dummy metal lines with metal lines, each metal line having a nitride cap; forming a softmask stack over the nitride cap and the SiOC layer; patterning a plurality of vias through the softmask stack down to the metal lines, the plurality of vias self-aligned along a second direction; removing the softmask stack; forming second dummy metal lines over the metal lines and extending in the second direction; forming a second SiOC layer between the dummy second metal lines on the SiOC layer; and replacing the dummy second metal lines with second metal lines, the second metal lines electrically connected to the metal lines through a via.

    Abstract translation: 提供了在形成后续金属层之前形成2D自对准通孔并降低所得器件和所得器件的电容的方法。 实施例包括在SiOC层中形成虚拟金属线并沿第一方向延伸; 用金属线替代虚拟金属线，每条金属线都有氮化物盖; 在氮化物盖和SiOC层上形成软掩模堆叠; 通过所述软掩模堆叠将多个通孔图形化成金属线，所述多个通孔沿着第二方向自对准; 去除软掩码堆栈; 在金属线上形成第二虚拟金属线并在第二方向上延伸; 在SiOC层上的虚拟第二金属线之间形成第二SiOC层; 并且用第二金属线代替虚拟第二金属线，第二金属线通过通孔与金属线电连接。

    METHODS AND CONTROLLERS FOR CONTROLLING FOCUS OF ULTRAVIOLET LIGHT FROM A LITHOGRAPHIC IMAGING SYSTEM, AND APPARATUSES FOR FORMING AN INTEGRATED CIRCUIT EMPLOYING THE SAME
    7.
    发明申请
    METHODS AND CONTROLLERS FOR CONTROLLING FOCUS OF ULTRAVIOLET LIGHT FROM A LITHOGRAPHIC IMAGING SYSTEM, AND APPARATUSES FOR FORMING AN INTEGRATED CIRCUIT EMPLOYING THE SAME 审中-公开
    用于控制来自地平面成像系统的超紫外线聚焦的方法和控制器，以及用于形成使用其的集成电路的装置

    公开(公告)号：US20160033879A1

    公开(公告)日：2016-02-04

    申请号：US14446784

    申请日：2014-07-30

    Applicant: GLOBALFOUNDRIES, Inc.

    Inventor： Sudharshanan Raghunathan ,  Obert Reeves Wood II ,  Moshe E. Preil

    IPC: G03F7/20

    CPC classification number: G03F7/70641

    Abstract: Methods and controllers for controlling focus of ultraviolet light produced by a lithographic imaging system, and apparatuses for forming an integrated circuit employing the same are provided. In an embodiment, a method includes providing a wafer having a resist film disposed thereon. The resist film is patterned through illumination of a lithography mask with ultraviolet light at an off-normal incidence angle with a first test pattern formed at a first pitch and a second test pattern formed at a second pitch different from the first pitch. Non-telecentricity induced shift of the first and second test patterns is measured to produce relative shift data using a measurement device. Focus of the ultraviolet light is adjusted based upon comparison of the relative shift data to a pre-determined correlation between the non-telecentricity induced shift of the first and second test patterns as a function of focus error.

    Abstract translation: 提供了用于控制由光刻成像系统产生的紫外光的焦点的方法和控制器，以及用于形成使用该光学成像系统的集成电路的装置。 在一个实施例中，一种方法包括提供其上设置有抗蚀剂膜的晶片。 通过以与第一间距形成的第一测试图案和以第一间距不同的第二间距形成的第二测试图案以非法入射角的紫外光照射光刻掩模来对抗蚀剂膜进行图案化。 测量第一和第二测试图案的非远心引起的偏移，以使用测量装置产生相对移位数据。 基于相对移位数据与作为焦点误差的函数的第一和第二测试图案的非远心引起的偏移之间的预定相关性进行比较来调整紫外线的焦点。

    Methods for fabricating EUV masks and methods for fabricating integrated circuits using such EUV masks
    10.
    发明授权
    Methods for fabricating EUV masks and methods for fabricating integrated circuits using such EUV masks 有权
    制造EUV掩模的方法和使用这种EUV掩模制造集成电路的方法

    公开(公告)号：US08911920B2

    公开(公告)日：2014-12-16

    申请号：US13840790

    申请日：2013-03-15

    Applicant: GlobalFoundries, Inc.

    Inventor： Sudharshanan Raghunathan ,  Pawitter Mangat ,  Hui Peng Koh

    IPC: G03F1/44 ,  G03F1/22 ,  G03F7/20

    CPC classification number: G03F7/2022 ,  G03F1/22

    Abstract: A method for fabricating integrated circuits includes fabricating an EUV mask by providing a photomask having a border region. A photoresist is formed over the photomask and has a border region overlying the border region of the photomask. The method exposes an inner portion and an outer portion of the photoresist border region. The method removes the inner portion and the outer portion to expose the border region of the photomask. The border region of the photomask is etched using the photoresist as a mask to form the EUV mask with a non-reflective border. The photoresist is removed from the EUV mask. The method includes forming another photoresist over a partially-fabricated integrated circuit layer and patterning the photoresist by exposure to EUV light reflected from the EUV mask to expose portions of the partially-fabricated integrated circuit layer. Portions of the partially-fabricated integrated circuit layer and the photoresist are removed.

    Abstract translation: 制造集成电路的方法包括通过提供具有边界区域的光掩模来制造EUV掩模。 在光掩模上形成光致抗蚀剂，并且具有覆盖在光掩模的边界区域上的边界区域。 该方法曝光光刻胶边界区域的内部部分和外部部分。 该方法移除内部部分和外部部分以暴露光掩模的边界区域。 使用光致抗蚀剂作为掩模蚀刻光掩模的边界区域，以形成具有非反射边界的EUV掩模。 从EUV掩模中去除光致抗蚀剂。 该方法包括在部分制造的集成电路层上形成另一光致抗蚀剂，并通过暴露于从EUV掩模反射的EUV光来图案化光致抗蚀剂，以暴露部分制造的集成电路层的部分。 去除部分制造的集成电路层和光致抗蚀剂的部分。

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