Methods of forming vertical transistor devices with self-aligned replacement gate structures
    1.
    发明授权
    Methods of forming vertical transistor devices with self-aligned replacement gate structures 有权
    形成具有自对准替代栅极结构的垂直晶体管器件的方法

    公开(公告)号:US09530863B1

    公开(公告)日:2016-12-27

    申请号:US15097574

    申请日:2016-04-13

    CPC classification number: H01L29/66545 H01L29/0847 H01L29/66666 H01L29/7827

    Abstract: One illustrative method disclosed herein includes, among other things, forming a vertically oriented channel semiconductor structure, forming a layer of a bottom spacer material around the vertically oriented channel semiconductor structure and forming a sacrificial material layer above the layer of a bottom spacer material. In this example, the method further includes forming a sidewall spacer adjacent the vertically oriented channel semiconductor structure and above an upper surface of the sacrificial material layer, removing the sacrificial material layer so as to define a replacement gate cavity between a bottom surface of the sidewall spacer and the layer of a bottom spacer material, and forming a replacement gate structure in the replacement gate cavity.

    Abstract translation: 本文中公开的一种说明性方法包括形成垂直取向的沟道半导体结构,在垂直取向的沟道半导体结构周围形成底部间隔物材料的层,并在底部间隔物材料的层的上方形成牺牲材料层。 在该示例中,该方法还包括形成邻近垂直取向的沟道半导体结构并且在牺牲材料层的上表面上方的侧壁间隔物,去除牺牲材料层,以便在侧壁的底表面之间限定替换栅腔 间隔物和底部间隔物材料的层,并且在替换浇口腔中形成替代浇口结构。

    Methods of forming vertical transistor devices with self-aligned top source/drain conductive contacts
    3.
    发明授权
    Methods of forming vertical transistor devices with self-aligned top source/drain conductive contacts 有权
    形成具有自对准顶部源极/漏极导电触点的垂直晶体管器件的方法

    公开(公告)号:US09530866B1

    公开(公告)日:2016-12-27

    申请号:US15097621

    申请日:2016-04-13

    Abstract: Forming a first sidewall spacer adjacent a vertically oriented channel semiconductor structure (“VCS structure’) and adjacent a cap layer, performing at least one planarization process so as to planarize an insulating material and expose an upper surface of the cap layer and an upper surface of the first spacer and removing a portion of the first spacer and an entirety of the cap layer so as to thereby expose an upper surface of the VCS structure and define a spacer/contact cavity above the VCS structure and the first spacer. The method also includes forming a second spacer in the spacer/contact cavity, forming a top source/drain region in the VCS structure and forming a top source/drain contact within the spacer/contact cavity that is conductively coupled to the top source/drain region, wherein the conductive contact physically contacts the second spacer in the spacer/contact cavity.

    Abstract translation: 形成与垂直取向的沟道半导体结构(“VCS结构”)相邻并且与覆盖层相邻的第一侧壁间隔物,执行至少一个平坦化处理,以平坦化绝缘材料并暴露盖层的上表面和上表面 并且去除所述第一间隔物的一部分和所述盖层的整体,从而暴露所述VCS结构的上表面并且在所述VCS结构和所述第一间隔物之上限定间隔物/接触腔。 该方法还包括在间隔物/接触腔中形成第二间隔物,在VCS结构中形成顶部源极/漏极区域,并在间隔物/接触腔内形成顶部源极/漏极接触,导电耦合到顶部源极/漏极 区域,其中所述导电接触物质地接触所述间隔件/接触腔中的所述第二间隔件。

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