公开(公告)号：US20230403953A1

公开(公告)日：2023-12-14

申请号：US18451892

申请日：2023-08-18

Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.

Inventor： Ju Dy LIM ,  Mei Zhen NG ,  Kazutaka YAMANE ,  Chim Seng SEET

IPC: H10N70/00 ,  H10N70/20

CPC classification number: H10N70/828 ,  H10N70/021 ,  H10N70/24 ,  H10N70/063 ,  H10N70/231 ,  H10N70/826

Abstract: A memory device may be provided, including a first planar electrode, a second planar electrode, and a switching element arranged between the first planar electrode and the second planar electrode to where a first side of the switching element is arranged over the first planar electrode and where a second side of the switching element is arranged under the second planar electrode. The switching element is thicker at the first side than the second side, and the switching element is configured to provide a conductive filament formation region.

公开(公告)号：US20220359114A1

公开(公告)日：2022-11-10

申请号：US17314754

申请日：2021-05-07

Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.

Inventor： Kazutaka YAMANE ,  Eng-Huat TOH ,  Vinayak Bharat NAIK ,  Hemant M. DIXIT

IPC: H01F10/32 ,  G01R33/09 ,  G01R33/00

Abstract: The present disclosure relates to integrated circuits, and more particularly, to a highly sensitive tunnel magnetoresistance sensor (TMR) with a Wheatstone bridge for field/position detection in integrated circuits and methods of manufacture and operation. In particular, the present disclosure relates to a structure including: a first magnetic tunneling junction (MTJ) structure on a first device level; and a second magnetic tunneling junction (MTJ) structure on a different device level than the first MTJ structure. The second MTJ structure includes properties different than the first MTJ structure.

公开(公告)号：US20220384082A1

公开(公告)日：2022-12-01

申请号：US17330934

申请日：2021-05-26

Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.

Inventor： Eng-Huat TOH ,  Hemant M. DIXIT ,  Vinayak Bharat NAIK ,  Kazutaka YAMANE

IPC: H01F10/32 ,  H01F41/32 ,  G01R33/09

Abstract: The present disclosure relates to integrated circuits, and more particularly, a tunnel magneto-resistive (TMR) sensor with perpendicular magnetic tunneling junction (p-MTJ) structures and methods of manufacture and operation. The structure includes: a first magnetic tunneling junction (MTJ) structure on a first level; a second MTJ structure on a same wiring level as the first MTJ structure; and at least one metal line between the first MTJ structure and the second MTJ structure.

公开(公告)号：US20180130943A1

公开(公告)日：2018-05-10

申请号：US15803874

申请日：2017-11-06

Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.

Inventor： Vinayak Bharat NAIK ,  Kazutaka YAMANE ,  Kangho LEE

IPC: H01L43/08 ,  H01L27/22 ,  H01L43/10 ,  H01L43/12 ,  H01F41/14 ,  H01F10/32 ,  H01F10/14

CPC classification number: H01L43/08 ,  H01F10/14 ,  H01F10/32 ,  H01F10/3254 ,  H01F10/3272 ,  H01F41/14 ,  H01F41/302 ,  H01L27/228 ,  H01L43/10 ,  H01L43/12

Abstract: A magnetic tunneling junction (MTJ) with a reference layer is less temperature sensitive and is reflow compatible at 260° C. The reference layer may be a composite reference layer having n magnetic layers separated by (n−1) non-magnetic spacer layers. The reference layers may include low temperature coefficient reference layers or a combination of low temperature coefficient and high MR reference layers to produce a low temperature sensitive reference layer with good MR.

公开(公告)号：US20170125664A1

公开(公告)日：2017-05-04

申请号：US15339928

申请日：2016-10-31

Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.

Inventor： Taiebeh TAHMASEBI ,  Vinayak Bharat NAIK ,  Kangho LEE ,  Chim Seng SEET ,  Kazutaka YAMANE

IPC: H01L43/02 ,  H01L27/22 ,  H01L43/12 ,  H01L43/08 ,  H01L43/10

CPC classification number: H01L43/02 ,  H01L27/228 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

Abstract: A bottom pinned perpendicular magnetic tunnel junction (pMTJ) with high TMR which can withstand high temperature back-end-of-line (BEOL) processing is disclosed. The pMTJ includes a composite spacer layer between a SAF layer and a reference layer of the fixed magnetic layer of the pMTJ. The composite spacer layer includes a first non-magnetic (NM) spacer layer, a magnetic (M) spacer layer disposed over the first NM spacer layer and a second NM spacer layer disposed over the M layer. The M layer is a magnetically continuous amorphous layer, which provides a good template for the reference layer.

公开(公告)号：US20230076514A1

公开(公告)日：2023-03-09

申请号：US17469221

申请日：2021-09-08

Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.

Inventor： Vinayak Bharat NAIK ,  Eng Huat TOH ,  Kazutaka YAMANE ,  Hemant M. DIXIT

IPC: G01R33/09

Abstract: The present disclosure relates to integrated circuits, and, more particularly, to a magnetic field sensor using magnetic tunneling junction (MTJ) structures and passive resistors, and methods of manufacture and operation. The structure includes: a first portion of a circuit including a first MTJ structure and a first resistor coupled in series between a first voltage source and a second voltage source; and a second portion of the circuit including a second MTJ structure and a second resistor coupled in series between the first voltage source and the second voltage source. The first portion and the second portion are coupled in parallel between the first voltage source and the second voltage source.

公开(公告)号：US20220209102A1

公开(公告)日：2022-06-30

申请号：US17134582

申请日：2020-12-28

Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.

Inventor： Wai Cheung LAW ,  Grayson Dao Hwee WONG ,  Kazutaka YAMANE ,  Chim Seng SEET ,  Wen Siang LEW

IPC: H01L43/08 ,  H01L43/02 ,  H01L43/10 ,  H01F10/32

Abstract: According to various embodiments, a spin diode device may include a magnetic tunnel junction stack. The magnetic tunnel junction stack may include a lower magnetic layer, a tunnel barrier layer over the lower magnetic layer, and an upper magnetic layer over the tunnel barrier layer. The lower magnetic layer may include a lower magnetic film. The tunnel barrier layer comprising an insulating material. The upper magnetic layer may include an upper magnetic film. Each of the lower magnetic film and the upper magnetic film may have perpendicular magnetic anisotropy.

公开(公告)号：US20210247470A1

公开(公告)日：2021-08-12

申请号：US16787226

申请日：2020-02-11

Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.

Inventor： Ping ZHENG ,  Eng Huat TOH ,  Kazutaka YAMANE ,  Shyue Seng TAN ,  Kiok Boone Elgin QUEK

IPC: G01R33/09 ,  H01L43/02 ,  H01L27/22 ,  H01F10/32 ,  H01L43/12 ,  H01F41/34

Abstract: A semiconductor device may be provided including a first series portion and a second series portion electrically connected in parallel with the first series portion. The first series portion may include a first MTJ stack and a first resistive element electrically connected in series. The second series portion may include a second MTJ stack and a second resistive element electrically connected in series. The first resistive element may include a third MTJ stack and the second resistive element may include a fourth MTJ stack. The first, second, third, and fourth MTJ stacks may include a same number of layers, which may include a fixed layer, a free layer, and a tunnelling barrier layer between the fixed layer and the free layer. Alternatively, the first resistive element may include a first transistor and the second resistive element may include a second transistor.

公开(公告)号：US20210159393A1

公开(公告)日：2021-05-27

申请号：US16695333

申请日：2019-11-26

Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.

Inventor： Wai Cheung LAW ,  Ganesh KOLLIYIL RAJAN ,  Yuichi OTANI ,  Kazutaka YAMANE ,  Chim Seng SEET ,  Grayson Dao Hwee WONG

IPC: H01L43/02 ,  H01L43/12 ,  H01L43/10 ,  H01F10/32

Abstract: In a non-limiting embodiment, a semiconductor device may include a magnetic tunnel junction (MTJ) stack. The MTJ stack may include a reference layer comprising a magnetic layer, a first tunneling barrier layer arranged over the reference layer, a free layer comprising a magnetic layer arranged over the first tunneling barrier layer, and a capping layer arranged over the reference layer, the first tunneling barrier layer and the free layer. The capping layer may be a non-magnetic layer. According to various non-limiting embodiments, the capping layer may include a rare earth element. According to various non-limiting embodiments, the MTJ stack may further include a second tunneling barrier layer arranged between the free layer and the capping layer. The capping layer may contact the second tunneling barrier layer.

公开(公告)号：US20210057645A1

公开(公告)日：2021-02-25

申请号：US16548854

申请日：2019-08-23

Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.

Inventor： Ju Dy LIM ,  Mei Zhen NG ,  Kazutaka YAMANE ,  Chim Seng SEET

IPC: H01L45/00

Abstract: A memory device may be provided, including a first planar electrode, a second planar electrode, and a switching element arranged between the first planar electrode and the second planar electrode to where a first side of the switching element is arranged over the first planar electrode and where a second side of the switching element is arranged under the second planar electrode. The switching element is thicker at the first side than the second side, and the switching element is configured to provide a conductive filament formation region.