公开(公告)号：US20230324332A1

公开(公告)日：2023-10-12

申请号：US17715282

申请日：2022-04-07

Applicant: GlobalFoundries U.S. Inc.

Inventor： Mark D. Levy ,  Siva P. Adusumilli ,  Aaron L. Vallett

IPC: G01N27/414

CPC classification number: G01N27/4148 ,  G01N27/4145

Abstract: Disclosed is a semiconductor structure including a device (e.g., a field effect transistor (FET), a biosensor FET (bioFET) or an ion-sensitive FET (ISFET)) with a fluid-based gate. The structure includes a substrate, an intermediate layer on the substrate, and a semiconductor layer on the intermediate layer. The device includes, within the semiconductor layer, a source region, a drain region, and a channel region between the source and drain regions. The structure includes, for the fluid-base gate, a cavity within the intermediate layer below the channel region and lined with a dielectric liner. Optionally, the exposed surface of the dielectric liner within the cavity is functionalized. Additional dielectric layers are stacked on the semiconductor layer and at least one port extends essentially vertically through the dielectric layers, the semiconductor layer and the dielectric liner to the cavity so as to allow fluid for the fluid-based gate to flow into the cavity.

公开(公告)号：US11316045B2

公开(公告)日：2022-04-26

申请号：US16691691

申请日：2019-11-22

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Anthony K. Stamper ,  Aaron L. Vallett ,  Steven M. Shank ,  John J. Ellis-Monaghan

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/08 ,  H01L29/45 ,  H01L29/66 ,  H01L29/417 ,  H01L29/49 ,  H01L29/51

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to vertical field effect transistors (FETS) and methods of manufacture. The structure includes: a substrate material; at least one vertically oriented gate structure extending into the substrate material and composed of a gate dielectric material and conductive gate material; and vertically oriented source/drain regions extending into the substrate material and composed of conductive dopant material and a silicide on the source/drain regions.

公开(公告)号：US20240178290A1

公开(公告)日：2024-05-30

申请号：US18059186

申请日：2022-11-28

Applicant: GlobalFoundries U.S. Inc.

Inventor： Megan Lydon-Nuhfer ,  Steven M. Shank ,  Aaron L. Vallett ,  Michel Abou-Khalil ,  Sarah A. McTaggart ,  Rajendran Krishnasamy

IPC: H01L29/423 ,  H01L29/06 ,  H01L29/08 ,  H01L29/40 ,  H01L29/49 ,  H01L29/66

CPC classification number: H01L29/42376 ,  H01L29/0657 ,  H01L29/0847 ,  H01L29/401 ,  H01L29/42356 ,  H01L29/4916 ,  H01L29/6653

Abstract: An integrated circuit (IC) structure includes a V-shaped cavity in a semiconductor substrate. A source region and a drain region are on opposing sides of the V-shaped cavity. A gate structure includes a gate dielectric layer, spacers, and a gate electrode on the gate dielectric layer between the spacers. The gate structure is fully within the V-shaped cavity. The IC structure provides a switch that finds advantageous application as part of a low noise amplifier. The IC structure provides a smaller gate width, decreased capacitance, increased gain and increased radio frequency (RF) performance compared to planar devices or devices without the gate structure fully within V-shaped cavity.