公开(公告)号：US20220268994A1

公开(公告)日：2022-08-25

申请号：US17179532

申请日：2021-02-19

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Asli Sahin ,  Karen A. Nummy ,  Thomas Houghton ,  Kevin K. Dezfulian ,  Kenneth J. Giewont ,  Yusheng Bian

IPC: G02B6/122 ,  G02B6/13

Abstract: A photonics integrated circuit includes a semiconductor substrate; a buried insulator layer positioned over the semiconductor substrate; and a back-end-of-line (BEOL) insulator stack over a first portion of the buried insulator layer. In addition, the PIC includes a silicon nitride (SiN) waveguide edge coupler positioned in a first region over the buried insulator layer and at least partially under the BEOL insulator stack. An oxide layer extends over a side of the BEOL insulator stack. The SiN waveguide edge coupler provides better power handling and fabrication tolerance than silicon waveguide edge couplers, despite the location under various BEOL layers. The PIC can also include silicon waveguide edger coupler(s).

公开(公告)号：US11810870B2

公开(公告)日：2023-11-07

申请号：US18146039

申请日：2022-12-23

Applicant: GlobalFoundries U.S. Inc.

Inventor： Asli Sahin ,  Thomas F. Houghton ,  Jennifer A. Oakley ,  Jeremy S. Alderman ,  Karen A. Nummy ,  Zhuojie Wu

IPC: G02B6/42 ,  H01L23/00 ,  G02B6/12

CPC classification number: H01L23/564 ,  G02B6/4243 ,  G02B6/4248 ,  G02B6/4251 ,  H01L23/562 ,  G02B6/12 ,  G02B2006/12061

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a moisture seal for photonic devices and methods of manufacture. The structure includes: a first trench in at least one substrate material; a guard ring structure with an opening and which at least partially surrounds the first trench; and a second trench at a dicing edge of the substrate, the second trench being lined on sidewalls with barrier material and spacer material over the barrier material.

公开(公告)号：US20210278611A1

公开(公告)日：2021-09-09

申请号：US16807811

申请日：2020-03-03

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Asli Sahin ,  Colleen Meagher ,  Thomas Houghton ,  Bo Peng ,  Karen Nummy ,  Javier Ayala ,  Yusheng Bian

IPC: G02B6/42 ,  H01L21/84 ,  H01L21/311

Abstract: One illustrative device disclosed herein includes a V-groove in a base semiconductor layer of a semiconductor-on-insulator (SOI) substrate, wherein the V-groove is adapted to have a fiber optics cable positioned therein, and an optical component positioned above the V-groove. The device also includes a first layer of silicon dioxide positioned above the optical component, a second layer of silicon dioxide positioned on and in contact with the first layer of silicon dioxide and a third layer of silicon dioxide positioned on and in contact with the second layer of silicon dioxide.

公开(公告)号：US11587888B2

公开(公告)日：2023-02-21

申请号：US16713709

申请日：2019-12-13

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Asli Sahin ,  Thomas F. Houghton ,  Jennifer A. Oakley ,  Jeremy S. Alderman ,  Karen A. Nummy ,  Zhuojie Wu

IPC: G02B6/42 ,  H01L23/00 ,  G02B6/12

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a moisture seal for photonic devices and methods of manufacture. The structure includes: a first trench in at least one substrate material; a guard ring structure with an opening and which at least partially surrounds the first trench; and a second trench at a dicing edge of the substrate, the second trench being lined on sidewalls with barrier material and spacer material over the barrier material.

公开(公告)号：US11487059B2

公开(公告)日：2022-11-01

申请号：US17179532

申请日：2021-02-19

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Asli Sahin ,  Karen A. Nummy ,  Thomas Houghton ,  Kevin K. Dezfulian ,  Kenneth J. Giewont ,  Yusheng Bian

IPC: G02B6/122 ,  G02B6/13

Abstract: A photonics integrated circuit includes a semiconductor substrate; a buried insulator layer positioned over the semiconductor substrate; and a back-end-of-line (BEOL) insulator stack over a first portion of the buried insulator layer. In addition, the PIC includes a silicon nitride (SiN) waveguide edge coupler positioned in a first region over the buried insulator layer and at least partially under the BEOL insulator stack. An oxide layer extends over a side of the BEOL insulator stack. The SiN waveguide edge coupler provides better power handling and fabrication tolerance than silicon waveguide edge couplers, despite the location under various BEOL layers. The PIC can also include silicon waveguide edger coupler(s).