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公开(公告)号：US07960214B2
公开(公告)日：2011-06-14
申请号：US12169132
申请日：2008-07-08
申请人： Geng-Shin Shen , David Wei Wang
发明人： Geng-Shin Shen , David Wei Wang
IPC分类号： H01L21/44
CPC分类号： H01L24/16 , H01L24/28 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/85 , H01L24/90 , H01L25/0657 , H01L25/50 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/13144 , H01L2224/13147 , H01L2224/16145 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73104 , H01L2224/73207 , H01L2224/73265 , H01L2224/83136 , H01L2224/83192 , H01L2224/83194 , H01L2224/83856 , H01L2224/85 , H01L2225/0651 , H01L2225/06513 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/14 , H01L2924/351 , H01L2924/00 , H01L2924/00012 , H01L2224/05599 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2224/0555 , H01L2224/0556
摘要： A fabricating process of chip package structure is provided. First, a first substrate having a plurality of first bonding pads and a second substrate having a plurality of second bonding pads are provide, wherein a plurality of bumps are formed on the first bonding pads of the first substrate. A first two-stage adhesive layer is formed on the first substrate or on the second substrate and is B-stagized to form a first B-staged adhesive layer. A second two-stage adhesive layer is formed on the first B-staged adhesive layer and is B-stagized to form a second B-staged adhesive layer. Then, the first substrate and the second substrate are bonded via the first B-staged adhesive layer and the second B-staged adhesive layer such that each of the first bonding pads is respectively electrically connected to one of the second bonding pads via one of the bumps.
摘要翻译： 提供了芯片封装结构的制造工艺。 首先，提供具有多个第一接合焊盘的第一基板和具有多个第二接合焊盘的第二基板，其中在第一基板的第一接合焊盘上形成多个凸点。 在第一基板上或第二基板上形成第一两级粘合剂层，并且被B阶段化以形成第一B阶粘合剂层。 在第一B阶粘合剂层上形成第二两层粘合剂层，并且被B阶段化以形成第二B阶粘合剂层。 然后，第一基板和第二基板经由第一B阶粘合剂层和第二B阶粘合剂层接合，使得每个第一接合焊盘分别经由第一接合焊盘中的一个电连接到第二接合焊盘中的一个 颠簸
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公开(公告)号：US07847414B2
公开(公告)日：2010-12-07
申请号：US12147929
申请日：2008-06-27
申请人： Geng-Shin Shen , David Wei Wang
发明人： Geng-Shin Shen , David Wei Wang
IPC分类号： H01L23/48 , H01L23/538 , H01L29/40
CPC分类号： H01L25/0657 , H01L24/73 , H01L24/81 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/13144 , H01L2224/13147 , H01L2224/16 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/8121 , H01L2224/81815 , H01L2224/83193 , H01L2224/83194 , H01L2224/83856 , H01L2225/0651 , H01L2225/06513 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/351 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A chip package structure including a first substrate, a second substrate, a plurality of bumps, a first B-staged adhesive layer and a second B-staged adhesive layer is provided. The first substrate has a plurality of first bonding pads. The second substrate has a plurality of second bonding pads, and the second substrate is disposed above the first substrate. The bumps are disposed between the first substrate and the second substrate, wherein each of the first bonding pads is respectively electrically connected to one of the second bonding pads via one of the bumps. The first B-staged adhesive layer is adhered on the first substrate. The second B-staged adhesive layer is adhered between the first B-staged adhesive layer and the second substrate, wherein the first B-staged adhesive layer and the second B-staged adhesive layer encapsulate the bumps.
摘要翻译： 提供了包括第一基板，第二基板，多个凸块，第一B阶粘合剂层和第二B阶粘合剂层的芯片封装结构。 第一基板具有多个第一接合焊盘。 第二基板具有多个第二接合焊盘，第二基板设置在第一基板的上方。 所述凸块设置在所述第一基板和所述第二基板之间，其中所述第一接合焊盘中的每一个分别经由所述凸块之一电连接到所述第二接合焊盘中的一个。 第一B级粘合剂层粘附在第一基底上。 第二B阶粘合剂层粘附在第一B阶粘合剂层和第二基底之间，其中第一B阶粘合剂层和第二B阶粘合剂层包封凸块。
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公开(公告)号：US07749806B2
公开(公告)日：2010-07-06
申请号：US12169120
申请日：2008-07-08
申请人： Geng-Shin Shen , David Wei Wang
发明人： Geng-Shin Shen , David Wei Wang
IPC分类号： H01L21/00
CPC分类号： H01L24/90 , H01L24/12 , H01L24/16 , H01L24/28 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/83 , H01L25/0657 , H01L25/50 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/13099 , H01L2224/13144 , H01L2224/13147 , H01L2224/13565 , H01L2224/1601 , H01L2224/16145 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73104 , H01L2224/73204 , H01L2224/73265 , H01L2224/81141 , H01L2224/81191 , H01L2224/81193 , H01L2224/83192 , H01L2224/83194 , H01L2224/83856 , H01L2225/0651 , H01L2225/06513 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/14 , H01L2924/351 , H01L2924/00 , H01L2924/00012 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A fabricating process of a chip package structure is provided. First, a first substrate having a plurality of first bonding pads and a second substrate having a plurality of second bonding pads are provide, wherein a plurality of bumps are formed on the first bonding pads of the first substrate. A first two-stage adhesive layer is formed on the first substrate and is B-stagized to form a first B-staged adhesive layer. A second two-stage adhesive layer is formed on the second substrate and is B-stagized to form a second B-staged adhesive layer. Then, the first substrate and the second substrate are bonded via the first B-staged adhesive layer and the second B-staged adhesive layer such that each of the first bonding pads is respectively electrically connected to one of the second bonding pads via one of the bumps.
摘要翻译： 提供了芯片封装结构的制造工艺。 首先，提供具有多个第一接合焊盘的第一基板和具有多个第二接合焊盘的第二基板，其中在第一基板的第一接合焊盘上形成多个凸点。 在第一基板上形成第一两层粘合剂层，并将其B层状化以形成第一B阶粘合剂层。 在第二基板上形成第二两层粘合剂层，并且被B阶段化以形成第二B阶粘合剂层。 然后，第一基板和第二基板经由第一B阶粘合剂层和第二B阶粘合剂层接合，使得每个第一接合焊盘分别经由第一接合焊盘中的一个电连接到第二接合焊盘中的一个 颠簸
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公开(公告)号：US20100151624A1
公开(公告)日：2010-06-17
申请号：US12714646
申请日：2010-03-01
申请人： Geng-Shin Shen , David Wei Wang
发明人： Geng-Shin Shen , David Wei Wang
IPC分类号： H01L21/50
CPC分类号： H01L24/90 , H01L24/12 , H01L24/16 , H01L24/28 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/83 , H01L25/0657 , H01L25/50 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/13099 , H01L2224/13144 , H01L2224/13147 , H01L2224/13565 , H01L2224/1601 , H01L2224/16145 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73104 , H01L2224/73204 , H01L2224/73265 , H01L2224/81141 , H01L2224/81191 , H01L2224/81193 , H01L2224/83192 , H01L2224/83194 , H01L2224/83856 , H01L2225/0651 , H01L2225/06513 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/14 , H01L2924/351 , H01L2924/00 , H01L2924/00012 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A fabricating process of a chip package structure is provided. First, a first substrate having a plurality of first bonding pads and a second substrate having a plurality of second bonding pads are provided, wherein bumps are formed on the first bonding pads of the first substrate. A first two-stage adhesive layer is formed on the first substrate and is B-stagized to form a first B-staged adhesive layer. A second two-stage adhesive layer is formed on the second substrate and is B-stagized to form a second B-staged adhesive layer. Then, the first substrate and the second substrate are bonded via the first and second B-staged adhesive layer such that the bumps pierce through the second B-staged adhesive layer and are electrically connected to the second bonding pads, wherein each of the first bonding pads is respectively electrically connected to one of the second bonding pads via one of the bumps.
摘要翻译： 提供了芯片封装结构的制造工艺。 首先，提供具有多个第一接合焊盘的第一基板和具有多个第二接合焊盘的第二基板，其中在第一基板的第一接合焊盘上形成凸块。 在第一基板上形成第一两层粘合剂层，并将其B层状化以形成第一B阶粘合剂层。 在第二基板上形成第二两层粘合剂层，并且被B阶段化以形成第二B阶粘合剂层。 然后，第一基板和第二基板经由第一和第二B阶粘合剂层接合，使得凸块穿过第二B阶粘合剂层并电连接到第二接合焊盘，其中第一接合 焊盘经由凸块之一分别电连接到第二接合焊盘之一。
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公开(公告)号：US20080308915A1
公开(公告)日：2008-12-18
申请号：US12198526
申请日：2008-08-26
申请人： Geng-Shin Shen , David Wei Wang
发明人： Geng-Shin Shen , David Wei Wang
IPC分类号： H01L23/495
CPC分类号： H01L23/4951 , H01L23/3107 , H01L23/3121 , H01L23/3185 , H01L23/49513 , H01L23/49575 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/83 , H01L24/85 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83856 , H01L2224/85 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/07802 , H01L2924/181 , H01L2924/1815 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19104 , H01L2924/00 , H01L2924/00015 , H01L2224/05599 , H01L2924/00012
摘要： A chip package including a circuit substrate, a first chip, first bonding wires, a component, a first adhesive layer and a molding compound is provided. The first chip has a first active surface, a first rear surface and first bonding pads, the first rear surface is adhered on the circuit substrate and the first chip is electrically connected with the circuit substrate. The first bonding wires are electrically connected with the circuit substrate and the first bonding pads of the first chip. The component is disposed over the first active surface of the first chip. The first adhesive layer adhered between the first active surface and the component without covering the first bonding pads and includes a first B-staged adhesive layer adhered on a portion of the first active surface of the first chip and a second B-staged adhesive layer adhered between the first B-staged adhesive layer and the component.
摘要翻译： 提供了包括电路基板，第一芯片，第一接合线，部件，第一粘合层和模塑料的芯片封装。 第一芯片具有第一有源面，第一后表面和第一接合焊盘，第一后表面粘附在电路基板上，第一芯片与电路基板电连接。 第一接合线与电路基板和第一芯片的第一接合焊盘电连接。 该部件设置在第一芯片的第一有源表面上。 所述第一粘合剂层粘附在所述第一活性表面和所述组分之间，而不覆盖所述第一接合焊盘，并且包括附着在所述第一芯片的所述第一有源表面的一部分上的第一B阶粘合剂层和粘附到所述第一有源表面的第二B阶粘合剂层 在第一B阶粘合剂层和组分之间。
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公开(公告)号：US20080308914A1
公开(公告)日：2008-12-18
申请号：US12198517
申请日：2008-08-26
申请人： Geng-Shin Shen , David Wei Wang
发明人： Geng-Shin Shen , David Wei Wang
IPC分类号： H01L23/12
CPC分类号： H01L23/4951 , H01L23/3107 , H01L23/3121 , H01L23/3185 , H01L23/49513 , H01L23/49575 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/83 , H01L24/85 , H01L25/0657 , H01L2224/06135 , H01L2224/06136 , H01L2224/32145 , H01L2224/32265 , H01L2224/45144 , H01L2224/48091 , H01L2224/4824 , H01L2224/48247 , H01L2224/73215 , H01L2224/73265 , H01L2224/83856 , H01L2224/85 , H01L2225/0651 , H01L2225/06558 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/07802 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19104 , H01L2924/19107 , H01L2924/00015 , H01L2924/00 , H01L2224/05599 , H01L2224/48227 , H01L2924/00012
摘要： A chip package including a circuit substrate having an opening, a first chip, first bonding wires, a component, a first adhesive layer and a molding compound is provided. The first chip has a first active surface and a first rear surface opposite to the first active surface, the first chip is flipped on and electrically connected with the circuit substrate. The first bonding wires are electrically connected with the circuit substrate and the first chip, and each first bonding wire passes through the opening. The component is disposed over the first rear surface. The first adhesive layer adhered between the first rear surface and the component includes a first B-staged adhesive layer adhered on the first rear surface and the component and a second B-staged adhesive layer adhered between the first B-staged adhesive layer and the component. The molding compound is disposed on the circuit substrate.
摘要翻译： 提供了包括具有开口的电路基板，第一芯片，第一接合线，部件，第一粘合层和模塑料的芯片封装。 第一芯片具有第一有源表面和与第一有源表面相对的第一后表面，第一芯片被翻转并与电路基板电连接。 第一接合线与电路基板和第一芯片电连接，并且每个第一接合线穿过开口。 该部件设置在第一后表面上。 附着在第一后表面和部件之间的第一粘合剂层包括附着在第一后表面上的第一B阶粘合剂层和部件，以及粘附在第一B阶粘合剂层和部件之间的第二B阶粘合剂层 。 模塑料配置在电路基板上。
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公开(公告)号：US20080308916A1
公开(公告)日：2008-12-18
申请号：US12198536
申请日：2008-08-26
申请人： Geng-Shin Shen , David Wei Wang
发明人： Geng-Shin Shen , David Wei Wang
IPC分类号： H01L23/495 , H01L23/49
CPC分类号： H01L23/4951 , H01L23/3107 , H01L23/49513 , H01L23/49575 , H01L24/31 , H01L24/45 , H01L24/48 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/4824 , H01L2224/48247 , H01L2224/73215 , H01L2224/83856 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/181 , H01L2924/00015 , H01L2924/00 , H01L2224/05599
摘要： A chip package including a carrier having an opening, a first chip, bumps, a second chip, bonding wires, a first adhesive layer and a molding compound is provided. The first chip and the second chip are disposed at two opposite side of the carrier. The bumps are disposed between the carrier and a first active surface of the first chip to electrically connect with the first chip and the carrier. The bonding wires pass through the opening of the carrier and are electrically connected with the carrier and the second chip. The first adhesive layer adhered between the first active surface of the first chip and the carrier includes a first B-staged adhesive layer adhered on the first active surface of the first chip and a second B-staged adhesive layer adhered between the first B-staged adhesive layer and the carrier.
摘要翻译： 提供了包括具有开口的载体，第一芯片，凸块，第二芯片，接合线，第一粘合层和模塑料的芯片封装。 第一芯片和第二芯片设置在载体的相对两侧。 凸块设置在载体和第一芯片的第一有源表面之间以与第一芯片和载体电连接。 接合线穿过载体的开口并与载体和第二芯片电连接。 附着在第一芯片的第一活性表面和载体之间的第一粘合剂层包括附着在第一芯片的第一有源表面上的第一B阶粘合剂层和粘附在第一B层之间的第二B阶粘合剂层 粘合剂层和载体。
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公开(公告)号：US20080268572A1
公开(公告)日：2008-10-30
申请号：US12169132
申请日：2008-07-08
申请人： Geng-Shin Shen , David Wei Wang
发明人： Geng-Shin Shen , David Wei Wang
IPC分类号： H01L21/58
CPC分类号： H01L24/16 , H01L24/28 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/85 , H01L24/90 , H01L25/0657 , H01L25/50 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/13144 , H01L2224/13147 , H01L2224/16145 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73104 , H01L2224/73207 , H01L2224/73265 , H01L2224/83136 , H01L2224/83192 , H01L2224/83194 , H01L2224/83856 , H01L2224/85 , H01L2225/0651 , H01L2225/06513 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/14 , H01L2924/351 , H01L2924/00 , H01L2924/00012 , H01L2224/05599 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2224/0555 , H01L2224/0556
摘要： A fabricating process of chip package structure is provided. First, a first substrate having a plurality of first bonding pads and a second substrate having a plurality of second bonding pads are provide, wherein a plurality of bumps are formed on the first bonding pads of the first substrate. A first two-stage adhesive layer is formed on the first substrate or on the second substrate and is B-stagized to form a first B-staged adhesive layer. A second two-stage adhesive layer is formed on the first B-staged adhesive layer and is B-stagized to form a second B-staged adhesive layer. Then, the first substrate and the second substrate are bonded via the first B-staged adhesive layer and the second B-staged adhesive layer such that each of the first bonding pads is respectively electrically connected to one of the second bonding pads via one of the bumps.
摘要翻译： 提供了芯片封装结构的制造工艺。 首先，提供具有多个第一接合焊盘的第一基板和具有多个第二接合焊盘的第二基板，其中在第一基板的第一接合焊盘上形成多个凸点。 在第一基板上或第二基板上形成第一两级粘合剂层，并且被B阶段化以形成第一B阶粘合剂层。 在第一B阶粘合剂层上形成第二两层粘合剂层，并且被B阶段化以形成第二B阶粘合剂层。 然后，第一基板和第二基板经由第一B阶粘合剂层和第二B阶粘合剂层接合，使得每个第一接合焊盘分别经由第一接合焊盘中的一个电连接到第二接合焊盘中的一个 颠簸
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公开(公告)号：US20080268570A1
公开(公告)日：2008-10-30
申请号：US12169120
申请日：2008-07-08
申请人： Geng-Shin Shen , David Wei Wang
发明人： Geng-Shin Shen , David Wei Wang
IPC分类号： H01L21/58
CPC分类号： H01L24/90 , H01L24/12 , H01L24/16 , H01L24/28 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/83 , H01L25/0657 , H01L25/50 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/13099 , H01L2224/13144 , H01L2224/13147 , H01L2224/13565 , H01L2224/1601 , H01L2224/16145 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73104 , H01L2224/73204 , H01L2224/73265 , H01L2224/81141 , H01L2224/81191 , H01L2224/81193 , H01L2224/83192 , H01L2224/83194 , H01L2224/83856 , H01L2225/0651 , H01L2225/06513 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/14 , H01L2924/351 , H01L2924/00 , H01L2924/00012 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A fabricating process of a chip package structure is provided. First, a first substrate having a plurality of first bonding pads and a second substrate having a plurality of second bonding pads are provide, wherein a plurality of bumps are formed on the first bonding pads of the first substrate. A first two-stage adhesive layer is formed on the first substrate and is B-stagized to form a first B-staged adhesive layer. A second two-stage adhesive layer is formed on the second substrate and is B-stagized to form a second B-staged adhesive layer. Then, the first substrate and the second substrate are bonded via the first B-staged adhesive layer and the second B-staged adhesive layer such that each of the first bonding pads is respectively electrically connected to one of the second bonding pads via one of the bumps.
摘要翻译： 提供了芯片封装结构的制造工艺。 首先，提供具有多个第一接合焊盘的第一基板和具有多个第二接合焊盘的第二基板，其中在第一基板的第一接合焊盘上形成多个凸点。 在第一基板上形成第一两层粘合剂层，并将其B层状化以形成第一B阶粘合剂层。 在第二基板上形成第二两层粘合剂层，并且被B阶段化以形成第二B阶粘合剂层。 然后，第一基板和第二基板经由第一B阶粘合剂层和第二B阶粘合剂层接合，使得每个第一接合焊盘分别经由第一接合焊盘中的一个电连接到第二接合焊盘中的一个 颠簸
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公开(公告)号：US07981725B2
公开(公告)日：2011-07-19
申请号：US12714646
申请日：2010-03-01
申请人： Geng-Shin Shen , David Wei Wang
发明人： Geng-Shin Shen , David Wei Wang
IPC分类号： H01L21/00
CPC分类号： H01L24/90 , H01L24/12 , H01L24/16 , H01L24/28 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/83 , H01L25/0657 , H01L25/50 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/13099 , H01L2224/13144 , H01L2224/13147 , H01L2224/13565 , H01L2224/1601 , H01L2224/16145 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73104 , H01L2224/73204 , H01L2224/73265 , H01L2224/81141 , H01L2224/81191 , H01L2224/81193 , H01L2224/83192 , H01L2224/83194 , H01L2224/83856 , H01L2225/0651 , H01L2225/06513 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/14 , H01L2924/351 , H01L2924/00 , H01L2924/00012 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A fabricating process of a chip package structure is provided. First, a first substrate having a plurality of first bonding pads and a second substrate having a plurality of second bonding pads are provided, wherein bumps are formed on the first bonding pads of the first substrate. A first two-stage adhesive layer is formed on the first substrate and is B-stagized to form a first B-staged adhesive layer. A second two-stage adhesive layer is formed on the second substrate and is B-stagized to form a second B-staged adhesive layer. Then, the first substrate and the second substrate are bonded via the first and second B-staged adhesive layer such that the bumps pierce through the second B-staged adhesive layer and are electrically connected to the second bonding pads, wherein each of the first bonding pads is respectively electrically connected to one of the second bonding pads via one of the bumps.
摘要翻译： 提供了芯片封装结构的制造工艺。 首先，提供具有多个第一接合焊盘的第一基板和具有多个第二接合焊盘的第二基板，其中在第一基板的第一接合焊盘上形成凸块。 在第一基板上形成第一两层粘合剂层，并将其B层状化以形成第一B阶粘合剂层。 在第二基板上形成第二两层粘合剂层，并且被B阶段化以形成第二B阶粘合剂层。 然后，第一基板和第二基板经由第一和第二B阶粘合剂层接合，使得凸块穿过第二B阶粘合剂层并电连接到第二接合焊盘，其中第一接合 焊盘经由凸块之一分别电连接到第二接合焊盘之一。
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